stm8l15x_syscfg.h 21 KB

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  1. /**
  2. ******************************************************************************
  3. * @file stm8l15x_syscfg.h
  4. * @author MCD Application Team
  5. * @version V1.6.1
  6. * @date 30-September-2014
  7. * @brief This file contains all the functions prototypes for the SYSCFG firmware
  8. * library.
  9. ******************************************************************************
  10. * @attention
  11. *
  12. * <h2><center>&copy; COPYRIGHT 2014 STMicroelectronics</center></h2>
  13. *
  14. * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
  15. * You may not use this file except in compliance with the License.
  16. * You may obtain a copy of the License at:
  17. *
  18. * http://www.st.com/software_license_agreement_liberty_v2
  19. *
  20. * Unless required by applicable law or agreed to in writing, software
  21. * distributed under the License is distributed on an "AS IS" BASIS,
  22. * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  23. * See the License for the specific language governing permissions and
  24. * limitations under the License.
  25. *
  26. ******************************************************************************
  27. */
  28. /* Define to prevent recursive inclusion -------------------------------------*/
  29. #ifndef __STM8L15x_SYSCFG_H
  30. #define __STM8L15x_SYSCFG_H
  31. /* Includes ------------------------------------------------------------------*/
  32. #include "stm8l15x.h"
  33. /** @addtogroup STM8L15x_StdPeriph_Driver
  34. * @{
  35. */
  36. /** @addtogroup SYSCFG
  37. * @{
  38. */
  39. /* Exported types ------------------------------------------------------------*/
  40. /** @defgroup SYSCFG_Exported_Types
  41. * @{
  42. */
  43. /** @defgroup RI_Input_Capture
  44. * @{
  45. */
  46. typedef enum
  47. {
  48. RI_InputCapture_IC2 = ((uint8_t) 0x02), /*!< TIM1 Input Capture 2 is routed */
  49. RI_InputCapture_IC3 = ((uint8_t) 0x03) /*!< TIM1 Input Capture 3 is routed */
  50. }RI_InputCapture_TypeDef;
  51. /**
  52. * @}
  53. */
  54. /** @defgroup RI_Input_Capture_Routing
  55. * @{
  56. */
  57. typedef enum
  58. {
  59. RI_InputCaptureRouting_0 = ((uint8_t) 0x00), /*!< TIM1 IC2 is routed to PD4, IC3 to PD5 */
  60. RI_InputCaptureRouting_1 = ((uint8_t) 0x01), /*!< TIM1 IC2 is routed to PF0, IC3 to PF1 */
  61. RI_InputCaptureRouting_2 = ((uint8_t) 0x02), /*!< TIM1 IC2 is routed to PF2, IC3 to PF3 */
  62. RI_InputCaptureRouting_3 = ((uint8_t) 0x03), /*!< TIM1 IC2 is routed to PE0, IC3 to PE1 */
  63. RI_InputCaptureRouting_4 = ((uint8_t) 0x04), /*!< TIM1 IC2 is routed to PE2, IC3 to PE3 */
  64. RI_InputCaptureRouting_5 = ((uint8_t) 0x05), /*!< TIM1 IC2 is routed to PE4, IC3 to PE5 */
  65. RI_InputCaptureRouting_6 = ((uint8_t) 0x06), /*!< TIM1 IC2 is routed to PE6, IC3 to PE7 */
  66. RI_InputCaptureRouting_7 = ((uint8_t) 0x07), /*!< TIM1 IC2 is routed to PD0, IC3 to PD1 */
  67. RI_InputCaptureRouting_8 = ((uint8_t) 0x08), /*!< TIM1 IC2 is routed to PD2, IC3 to PD3 */
  68. RI_InputCaptureRouting_9 = ((uint8_t) 0x09), /*!< TIM1 IC2 is routed to PD4, IC3 to PD5 */
  69. RI_InputCaptureRouting_10 = ((uint8_t) 0x0A), /*!< TIM1 IC2 is routed to PD6, IC3 to PD7 */
  70. RI_InputCaptureRouting_11 = ((uint8_t) 0x0B), /*!< TIM1 IC2 is routed to PC0, IC3 to PC1 */
  71. RI_InputCaptureRouting_12 = ((uint8_t) 0x0C), /*!< TIM1 IC2 is routed to PC2, IC3 to PC3 */
  72. RI_InputCaptureRouting_13 = ((uint8_t) 0x0D), /*!< TIM1 IC2 is routed to PC4, IC3 to PC5 */
  73. RI_InputCaptureRouting_14 = ((uint8_t) 0x0E), /*!< TIM1 IC2 is routed to PC6, IC3 to PC7 */
  74. RI_InputCaptureRouting_15 = ((uint8_t) 0x0F), /*!< TIM1 IC2 is routed to PB0, IC3 to PB1 */
  75. RI_InputCaptureRouting_16 = ((uint8_t) 0x10), /*!< TIM1 IC2 is routed to PB2, IC3 to PB3 */
  76. RI_InputCaptureRouting_17 = ((uint8_t) 0x11), /*!< TIM1 IC2 is routed to PB4, IC3 to PB5 */
  77. RI_InputCaptureRouting_18 = ((uint8_t) 0x12), /*!< TIM1 IC2 is routed to PB6, IC3 to PB7 */
  78. RI_InputCaptureRouting_19 = ((uint8_t) 0x13), /*!< TIM1 IC2 is routed to PA0, IC3 to PA2 */
  79. RI_InputCaptureRouting_20 = ((uint8_t) 0x14), /*!< TIM1 IC2 is routed to PA3, IC3 to PA4 */
  80. RI_InputCaptureRouting_21 = ((uint8_t) 0x15), /*!< TIM1 IC2 is routed to PA5, IC3 to PA6 */
  81. RI_InputCaptureRouting_22 = ((uint8_t) 0x16) /*!< TIM1 IC2 is routed to PA7, IC3 to PD5 */
  82. }RI_InputCaptureRouting_TypeDef;
  83. /**
  84. * @}
  85. */
  86. /** @defgroup RI_Analog_Switch
  87. * @{
  88. */
  89. /**
  90. * @brief Definition of the Analog Switch to be controlled.
  91. * Values are coded in 0xXY format where
  92. * X: the register index (1: RI_ASCR1, 2: RI_ASCR2)
  93. * Y: the bit position which corresponds with the Analog Switch
  94. */
  95. typedef enum
  96. {
  97. RI_AnalogSwitch_0 = ((uint8_t) 0x10), /*!< Analog switch 0 */
  98. RI_AnalogSwitch_1 = ((uint8_t) 0x11), /*!< Analog switch 1 */
  99. RI_AnalogSwitch_2 = ((uint8_t) 0x12), /*!< Analog switch 2 */
  100. RI_AnalogSwitch_3 = ((uint8_t) 0x13), /*!< Analog switch 3 */
  101. RI_AnalogSwitch_4 = ((uint8_t) 0x14), /*!< Analog switch 4 */
  102. RI_AnalogSwitch_5 = ((uint8_t) 0x15), /*!< Analog switch 5 */
  103. RI_AnalogSwitch_6 = ((uint8_t) 0x16), /*!< Analog switch 6 */
  104. RI_AnalogSwitch_7 = ((uint8_t) 0x17), /*!< Analog switch 7 */
  105. RI_AnalogSwitch_8 = ((uint8_t) 0x20), /*!< Analog switch 8 */
  106. RI_AnalogSwitch_9 = ((uint8_t) 0x21), /*!< Analog switch 9 */
  107. RI_AnalogSwitch_10 = ((uint8_t) 0x22), /*!< Analog switch 10 */
  108. RI_AnalogSwitch_11 = ((uint8_t) 0x23), /*!< Analog switch 11 */
  109. RI_AnalogSwitch_14 = ((uint8_t) 0x26) /*!< Analog switch 14 */
  110. }RI_AnalogSwitch_TypeDef;
  111. /**
  112. * @}
  113. */
  114. /** @defgroup RI_IO_Switch
  115. * @{
  116. */
  117. /**
  118. * @brief Definition of the I/O Switch to be controlled.
  119. * Values are coded in 0xXY format where
  120. * X: the register index (1: RI_IOSR1, 2: RI_IOSR2, 3: RI_IOSR3 or 4: RI_IOSR4)
  121. * Y: the bit index of the Input Output Switch in RI_IOSRx register
  122. */
  123. typedef enum
  124. {
  125. RI_IOSwitch_1 = ((uint8_t) 0x10), /*!< Input Output Switch switch 1 */
  126. RI_IOSwitch_2 = ((uint8_t) 0x20), /*!< Input Output Switch switch 2 */
  127. RI_IOSwitch_3 = ((uint8_t) 0x30), /*!< Input Output Switch switch 3 */
  128. RI_IOSwitch_4 = ((uint8_t) 0x11), /*!< Input Output Switch switch 4 */
  129. RI_IOSwitch_5 = ((uint8_t) 0x21), /*!< Input Output Switch switch 4 */
  130. RI_IOSwitch_6 = ((uint8_t) 0x31), /*!< Input Output Switch switch 6 */
  131. RI_IOSwitch_7 = ((uint8_t) 0x12), /*!< Input Output Switch switch 7 */
  132. RI_IOSwitch_8 = ((uint8_t) 0x22), /*!< Input Output Switch switch 8 */
  133. RI_IOSwitch_9 = ((uint8_t) 0x32), /*!< Input Output Switch switch 9 */
  134. RI_IOSwitch_10 = ((uint8_t) 0x13), /*!< Input Output Switch switch 10 */
  135. RI_IOSwitch_11 = ((uint8_t) 0x23), /*!< Input Output Switch switch 11 */
  136. RI_IOSwitch_12 = ((uint8_t) 0x33), /*!< Input Output Switch switch 12 */
  137. RI_IOSwitch_13 = ((uint8_t) 0x14), /*!< Input Output Switch switch 13 */
  138. RI_IOSwitch_14 = ((uint8_t) 0x24), /*!< Input Output Switch switch 14 */
  139. RI_IOSwitch_15 = ((uint8_t) 0x34), /*!< Input Output Switch switch 15 */
  140. RI_IOSwitch_16 = ((uint8_t) 0x15), /*!< Input Output Switch switch 16 */
  141. RI_IOSwitch_17 = ((uint8_t) 0x25), /*!< Input Output Switch switch 17 */
  142. RI_IOSwitch_18 = ((uint8_t) 0x35), /*!< Input Output Switch switch 18 */
  143. RI_IOSwitch_19 = ((uint8_t) 0x16), /*!< Input Output Switch switch 19 */
  144. RI_IOSwitch_20 = ((uint8_t) 0x26), /*!< Input Output Switch switch 20 */
  145. RI_IOSwitch_21 = ((uint8_t) 0x36), /*!< Input Output Switch switch 21 */
  146. RI_IOSwitch_22 = ((uint8_t) 0x17), /*!< Input Output Switch switch 22 */
  147. RI_IOSwitch_23 = ((uint8_t) 0x27), /*!< Input Output Switch switch 23 */
  148. RI_IOSwitch_24 = ((uint8_t) 0x37), /*!< Input Output Switch switch 24 */
  149. RI_IOSwitch_26 = ((uint8_t) 0x41), /*!< Input Output Switch switch 26 */
  150. RI_IOSwitch_27 = ((uint8_t) 0x46), /*!< Input Output Switch switch 27 */
  151. RI_IOSwitch_28 = ((uint8_t) 0x47), /*!< Input Output Switch switch 28 */
  152. RI_IOSwitch_29 = ((uint8_t) 0x40) /*!< Input Output Switch switch 29 */
  153. }RI_IOSwitch_TypeDef;
  154. /**
  155. * @}
  156. */
  157. /** @defgroup RI_Resistor
  158. * @{
  159. */
  160. /**
  161. * @brief Definition of the pull-up and pull-down resistors for COMP1 and ADC.
  162. */
  163. typedef enum
  164. {
  165. RI_Resistor_10KPU = ((uint8_t) 0x01),
  166. RI_Resistor_400KPU = ((uint8_t) 0x02),
  167. RI_Resistor_10KPD = ((uint8_t) 0x04),
  168. RI_Resistor_400KPD = ((uint8_t) 0x08)
  169. }RI_Resistor_TypeDef;
  170. /**
  171. * @}
  172. */
  173. /** @defgroup REMAP_Pin
  174. * @{
  175. */
  176. /**
  177. * @brief Definition of the REMAP pins.
  178. * Elements values convention: 0xXY
  179. * X = RMPCRx registers index
  180. * X = 0x01 : RMPCR1
  181. * X = 0x02 : RMPCR2
  182. * X = 0x03 : RMPCR3
  183. * Y = Mask for setting/resetting bits in RMPCRx register
  184. */
  185. typedef enum
  186. {
  187. /* RMPCR1 register bits */
  188. REMAP_Pin_USART1TxRxPortA = ((uint16_t)0x011C), /*!< USART1 Tx- Rx (PC3- PC2) remapping to PA2- PA3 */
  189. REMAP_Pin_USART1TxRxPortC = ((uint16_t)0x012C), /*!< USART1 Tx- Rx (PC3- PC2) remapping to PC5- PC6 */
  190. REMAP_Pin_USART1Clk = ((uint16_t)0x014B), /*!< USART1 CK (PC4) remapping to PA0 */
  191. REMAP_Pin_SPI1Full = ((uint16_t)0x0187), /*!< SPI1 MISO- MOSI- SCK- NSS(PB7- PB6- PB5- PB4)
  192. remapping to PA2- PA3- PC6- PC5 */
  193. /* RMPCR2 register bits */
  194. REMAP_Pin_ADC1ExtTRIG1 = ((uint16_t)0x0201), /*!< ADC1 External Trigger 1 (PA6) remapping to PD0 */
  195. REMAP_Pin_TIM2TRIGPortA = ((uint16_t)0x0202), /*!< TIM2 Trigger (PB3) remapping to PA4 */
  196. REMAP_Pin_TIM3TRIGPortA = ((uint16_t)0x0204), /*!< TIM3 Trigger (PD1) remapping to PA5 */
  197. REMAP_Pin_TIM2TRIGLSE = ((uint16_t)0x0208), /*!< TIM2 Trigger remapping to LSE */
  198. REMAP_Pin_TIM3TRIGLSE = ((uint16_t)0x0210), /*!< TIM3 Trigger remapping to LSE */
  199. REMAP_Pin_SPI2Full = ((uint16_t)0x0220), /*!< SPI2 MISO- MOSI- SCK- NSS(PG7- PG6- PG5- PG4)
  200. remapping to PI3- PI2- PI1- PI0 */
  201. REMAP_Pin_TIM3TRIGPortG = ((uint16_t)0x0240), /*!< TIM3 Trigger (PD1) remapping to PG3 */
  202. REMAP_Pin_TIM23BKIN = ((uint16_t)0x0280), /*!< TIM2 Break Input (PA4) remapping to PG0
  203. and TIM3 Break Input (PA5) remapping to PG1 */
  204. /* RMPCR3 register bits */
  205. REMAP_Pin_SPI1PortF = ((uint16_t)0x0301), /*!< SPI1 MISO- MOSI- SCK- NSS(PB7- PB6- PB5- PB4)
  206. remapping to PF0- PF1- PF2- PF3 */
  207. REMAP_Pin_USART3TxRxPortF = ((uint16_t)0x0302), /*!< USART3 Tx- Rx (PG1- PG0) remapping to PF0- PF1 */
  208. REMAP_Pin_USART3Clk = ((uint16_t)0x0304), /*!< USART3 CK (PG2) remapping to PF2 */
  209. REMAP_Pin_TIM3Channel1 = ((uint16_t)0x0308), /*!< TIM3 Channel 1 (PB1) remapping to PI0 */
  210. REMAP_Pin_TIM3Channel2 = ((uint16_t)0x0310), /*!< TIM3 Channel 2 (PD0) remapping to PI3 */
  211. REMAP_Pin_CCO = ((uint16_t)0x0320), /*!< CCO (PC4) remapping to PE2 */
  212. REMAP_Pin_TIM2Channel1 = ((uint16_t)0x0340), /*!< TIM2 Channel 1 (PB0) remapping to PC5 */
  213. REMAP_Pin_TIM2Channel2 = ((uint16_t)0x0380) /*!< TIM2 Channel 2 (PB2) remapping to PC6 */
  214. }REMAP_Pin_TypeDef;
  215. /**
  216. * @}
  217. */
  218. /** @defgroup REMAP_DMA_Channel
  219. * @{
  220. */
  221. typedef enum
  222. {
  223. REMAP_DMA1Channel_ADC1ToChannel0 = ((uint8_t)0x00), /*!< ADC1 DMA1 req/ack mapped on DMA1 channel 0 */
  224. REMAP_DMA1Channel_ADC1ToChannel1 = ((uint8_t)0x01), /*!< ADC1 DMA1 req/ack mapped on DMA1 channel 1 */
  225. REMAP_DMA1Channel_ADC1ToChannel2 = ((uint8_t)0x02), /*!< ADC1 DMA1 req/ack mapped on DMA1 channel 2 */
  226. REMAP_DMA1Channel_ADC1ToChannel3 = ((uint8_t)0x03), /*!< ADC1 DMA1 req/ack mapped on DMA1 channel 3 */
  227. REMAP_DMA1Channel_TIM4ToChannel0 = ((uint8_t)0xF0), /*!< TIM4 DMA1 req/ack mapped on DMA1 channel 0 */
  228. REMAP_DMA1Channel_TIM4ToChannel1 = ((uint8_t)0xF4), /*!< TIM4 DMA1 req/ack mapped on DMA1 channel 1 */
  229. REMAP_DMA1Channel_TIM4ToChannel2 = ((uint8_t)0xF8), /*!< TIM4 DMA1 req/ack mapped on DMA1 channel 2 */
  230. REMAP_DMA1Channel_TIM4ToChannel3 = ((uint8_t)0xFC) /*!< TIM4 DMA1 req/ack mapped on DMA1 channel 3 */
  231. }REMAP_DMAChannel_TypeDef;
  232. /**
  233. * @}
  234. */
  235. /**
  236. * @}
  237. */
  238. /* Exported constants --------------------------------------------------------*/
  239. /* Exported macros -----------------------------------------------------------*/
  240. /** @defgroup SYSCFG_Exported_Macros
  241. * @{
  242. */
  243. /**
  244. * @brief Macro used by the assert function in order to check the different
  245. * values of @ref RI_InputCaptureTypeDef enum.
  246. */
  247. #define IS_RI_INPUTCAPTURE(RI_IC) (((RI_IC) == RI_InputCapture_IC2) || \
  248. ((RI_IC) == RI_InputCapture_IC3))
  249. /**
  250. * @brief Macro used by the assert function in order to check the different
  251. * values of @ref RI_InputCaptureRoutingTypeDef enum.
  252. */
  253. #define IS_RI_INPUTCAPTUREROUTING(RI_IC_ROUTING) (((RI_IC_ROUTING) == RI_InputCaptureRouting_0) || \
  254. ((RI_IC_ROUTING) == RI_InputCaptureRouting_1) || \
  255. ((RI_IC_ROUTING) == RI_InputCaptureRouting_2) || \
  256. ((RI_IC_ROUTING) == RI_InputCaptureRouting_3) || \
  257. ((RI_IC_ROUTING) == RI_InputCaptureRouting_4) || \
  258. ((RI_IC_ROUTING) == RI_InputCaptureRouting_5) || \
  259. ((RI_IC_ROUTING) == RI_InputCaptureRouting_6) || \
  260. ((RI_IC_ROUTING) == RI_InputCaptureRouting_7) || \
  261. ((RI_IC_ROUTING) == RI_InputCaptureRouting_8) || \
  262. ((RI_IC_ROUTING) == RI_InputCaptureRouting_9) || \
  263. ((RI_IC_ROUTING) == RI_InputCaptureRouting_10) || \
  264. ((RI_IC_ROUTING) == RI_InputCaptureRouting_11) || \
  265. ((RI_IC_ROUTING) == RI_InputCaptureRouting_12) || \
  266. ((RI_IC_ROUTING) == RI_InputCaptureRouting_13) || \
  267. ((RI_IC_ROUTING) == RI_InputCaptureRouting_14) || \
  268. ((RI_IC_ROUTING) == RI_InputCaptureRouting_15) || \
  269. ((RI_IC_ROUTING) == RI_InputCaptureRouting_16) || \
  270. ((RI_IC_ROUTING) == RI_InputCaptureRouting_17) || \
  271. ((RI_IC_ROUTING) == RI_InputCaptureRouting_18) || \
  272. ((RI_IC_ROUTING) == RI_InputCaptureRouting_19) || \
  273. ((RI_IC_ROUTING) == RI_InputCaptureRouting_20) || \
  274. ((RI_IC_ROUTING) == RI_InputCaptureRouting_21) || \
  275. ((RI_IC_ROUTING) == RI_InputCaptureRouting_22))
  276. /**
  277. * @brief Macro used by the assert function in order to check the different
  278. * values of @ref RI_AnalogSwitch_TypeDef enum.
  279. */
  280. #define IS_RI_ANALOGSWITCH(RI_ANALOGSWITCH) (((RI_ANALOGSWITCH) == RI_AnalogSwitch_0) || \
  281. ((RI_ANALOGSWITCH) == RI_AnalogSwitch_1) || \
  282. ((RI_ANALOGSWITCH) == RI_AnalogSwitch_2) || \
  283. ((RI_ANALOGSWITCH) == RI_AnalogSwitch_3) || \
  284. ((RI_ANALOGSWITCH) == RI_AnalogSwitch_4) || \
  285. ((RI_ANALOGSWITCH) == RI_AnalogSwitch_5) || \
  286. ((RI_ANALOGSWITCH) == RI_AnalogSwitch_6) || \
  287. ((RI_ANALOGSWITCH) == RI_AnalogSwitch_7) || \
  288. ((RI_ANALOGSWITCH) == RI_AnalogSwitch_8) || \
  289. ((RI_ANALOGSWITCH) == RI_AnalogSwitch_9) || \
  290. ((RI_ANALOGSWITCH) == RI_AnalogSwitch_10)|| \
  291. ((RI_ANALOGSWITCH) == RI_AnalogSwitch_11)|| \
  292. ((RI_ANALOGSWITCH) == RI_AnalogSwitch_14))
  293. /**
  294. * @brief Macro used by the assert function in order to check the different
  295. * values of @ref RI_IOSwitch_TypeDef enum.
  296. */
  297. #define IS_RI_IOSWITCH(RI_IOSWITCH) (((RI_IOSWITCH) == RI_IOSwitch_1) || \
  298. ((RI_IOSWITCH) == RI_IOSwitch_2) || \
  299. ((RI_IOSWITCH) == RI_IOSwitch_3) || \
  300. ((RI_IOSWITCH) == RI_IOSwitch_4) || \
  301. ((RI_IOSWITCH) == RI_IOSwitch_5) || \
  302. ((RI_IOSWITCH) == RI_IOSwitch_6) || \
  303. ((RI_IOSWITCH) == RI_IOSwitch_7) || \
  304. ((RI_IOSWITCH) == RI_IOSwitch_8) || \
  305. ((RI_IOSWITCH) == RI_IOSwitch_9) || \
  306. ((RI_IOSWITCH) == RI_IOSwitch_10) || \
  307. ((RI_IOSWITCH) == RI_IOSwitch_11) || \
  308. ((RI_IOSWITCH) == RI_IOSwitch_12) || \
  309. ((RI_IOSWITCH) == RI_IOSwitch_13) || \
  310. ((RI_IOSWITCH) == RI_IOSwitch_14) || \
  311. ((RI_IOSWITCH) == RI_IOSwitch_15) || \
  312. ((RI_IOSWITCH) == RI_IOSwitch_16) || \
  313. ((RI_IOSWITCH) == RI_IOSwitch_17) || \
  314. ((RI_IOSWITCH) == RI_IOSwitch_18) || \
  315. ((RI_IOSWITCH) == RI_IOSwitch_19) || \
  316. ((RI_IOSWITCH) == RI_IOSwitch_20) || \
  317. ((RI_IOSWITCH) == RI_IOSwitch_21) || \
  318. ((RI_IOSWITCH) == RI_IOSwitch_22) || \
  319. ((RI_IOSWITCH) == RI_IOSwitch_23) || \
  320. ((RI_IOSWITCH) == RI_IOSwitch_24) || \
  321. ((RI_IOSWITCH) == RI_IOSwitch_26) || \
  322. ((RI_IOSWITCH) == RI_IOSwitch_27) || \
  323. ((RI_IOSWITCH) == RI_IOSwitch_28) || \
  324. ((RI_IOSWITCH) == RI_IOSwitch_29))
  325. /**
  326. * @brief Macro used by the assert function in order to check the different
  327. * values of @ref RI_ResistorTypeDef enum.
  328. */
  329. #define IS_RI_RESISTOR(RI_RESISTOR) (((RI_RESISTOR) == RI_Resistor_10KPU) || \
  330. ((RI_RESISTOR) == RI_Resistor_400KPU) || \
  331. ((RI_RESISTOR) == RI_Resistor_10KPD) || \
  332. ((RI_RESISTOR) == RI_Resistor_400KPD))
  333. /**
  334. * @brief Macro used by the assert function in order to check the different
  335. * values of @ref REMAP_Pin_TypeDef enum.
  336. */
  337. #define IS_REMAP_PIN(PIN) (((PIN) == REMAP_Pin_USART1TxRxPortA) || \
  338. ((PIN) == REMAP_Pin_USART1TxRxPortC) || \
  339. ((PIN) == REMAP_Pin_USART1Clk) || \
  340. ((PIN) == REMAP_Pin_SPI1Full) || \
  341. ((PIN) == REMAP_Pin_ADC1ExtTRIG1) || \
  342. ((PIN) == REMAP_Pin_TIM2TRIGPortA) || \
  343. ((PIN) == REMAP_Pin_TIM3TRIGPortA) || \
  344. ((PIN) == REMAP_Pin_TIM2TRIGLSE) || \
  345. ((PIN) == REMAP_Pin_TIM3TRIGLSE) || \
  346. ((PIN) == REMAP_Pin_SPI2Full) || \
  347. ((PIN) == REMAP_Pin_TIM3TRIGPortG) || \
  348. ((PIN) == REMAP_Pin_TIM23BKIN) || \
  349. ((PIN) == REMAP_Pin_SPI1PortF) || \
  350. ((PIN) == REMAP_Pin_USART3TxRxPortF) || \
  351. ((PIN) == REMAP_Pin_USART3Clk) || \
  352. ((PIN) == REMAP_Pin_TIM3Channel1) || \
  353. ((PIN) == REMAP_Pin_TIM3Channel2) || \
  354. ((PIN) == REMAP_Pin_CCO) || \
  355. ((PIN) == REMAP_Pin_TIM2Channel1) || \
  356. ((PIN) == REMAP_Pin_TIM2Channel2))
  357. /**
  358. * @brief Macro used by the assert function in order to check the different
  359. * values of the @ref REMAP_DMAChannel_TypeDef enum.
  360. */
  361. #define IS_REMAP_DMACHANNEL(MAP) (((MAP) == REMAP_DMA1Channel_ADC1ToChannel0) || \
  362. ((MAP) == REMAP_DMA1Channel_ADC1ToChannel1) || \
  363. ((MAP) == REMAP_DMA1Channel_ADC1ToChannel2) || \
  364. ((MAP) == REMAP_DMA1Channel_ADC1ToChannel3) || \
  365. ((MAP) == REMAP_DMA1Channel_TIM4ToChannel0) || \
  366. ((MAP) == REMAP_DMA1Channel_TIM4ToChannel1) || \
  367. ((MAP) == REMAP_DMA1Channel_TIM4ToChannel2) || \
  368. ((MAP) == REMAP_DMA1Channel_TIM4ToChannel3))
  369. /**
  370. * @}
  371. */
  372. /* Exported functions ------------------------------------------------------- */
  373. /* Routing Interface (RI) configuration ***************************************/
  374. void SYSCFG_RIDeInit(void);
  375. void SYSCFG_RITIMInputCaptureConfig(RI_InputCapture_TypeDef RI_InputCapture,
  376. RI_InputCaptureRouting_TypeDef RI_InputCaptureRouting);
  377. void SYSCFG_RIAnalogSwitchConfig(RI_AnalogSwitch_TypeDef RI_AnalogSwitch,
  378. FunctionalState NewState);
  379. void SYSCFG_RIIOSwitchConfig(RI_IOSwitch_TypeDef RI_IOSwitch, FunctionalState NewState);
  380. void SYSCFG_RIResistorConfig(RI_Resistor_TypeDef RI_Resistor, FunctionalState NewState);
  381. /* SYSCFG configuration *******************************************************/
  382. void SYSCFG_REMAPDeInit(void);
  383. void SYSCFG_REMAPPinConfig(REMAP_Pin_TypeDef REMAP_Pin, FunctionalState NewState);
  384. void SYSCFG_REMAPDMAChannelConfig(REMAP_DMAChannel_TypeDef REMAP_DMAChannel);
  385. #endif /* __STM8L15x_SYSCFG_H */
  386. /**
  387. * @}
  388. */
  389. /**
  390. * @}
  391. */
  392. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/