board.c 23 KB

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  1. #include "board.h"
  2. /* private defines */
  3. #define SPI_BUFFER_SIZE 5
  4. /* private variables */
  5. /**
  6. * Nixi Tube cathodes map in Byte Array:
  7. * {E0 E9 E8 E7 E6 E5 E4 E3}
  8. * {E2 E1 D0 D9 D8 D7 D6 D5}
  9. * {D4 D3 D2 D1 B0 B9 B8 B7}
  10. * {B6 B5 B4 B3 B2 B1 A0 A9}
  11. * {A8 A7 A6 A5 A4 A3 A2 A1}
  12. *
  13. * Shift register bit map in Tube cathodes (from 0 to 1):
  14. * {5.7 5.6 5.5 5.4 5.3 5.2 5.1 5.0 4.7 4.6} VL5/E
  15. * {4.5 4.4 4.3 4.2 4.1 4.0 3.7 3.6 3.5 3.4} VL4/D
  16. * {3.3 3.2 3.1 3.0 2.7 2.6 2.5 2.4 2.3 2.2} VL2/B
  17. * {2.1 2.0 1.7 1.6 1.5 1.4 1.3 1.2 1.1 1.0} VL1/A
  18. */
  19. static const uint16_t nixieCathodeMap[4][11] = {
  20. {0x8000, 0x0040, 0x0080, 0x0100, 0x0200, 0x0400, 0x0800, 0x1000, 0x2000, 0x4000, 0x0000},
  21. {0x2000, 0x0010, 0x0020, 0x0040, 0x0080, 0x0100, 0x0200, 0x0400, 0x0800, 0x1000, 0x0000},
  22. {0x0800, 0x0004, 0x0008, 0x0010, 0x0020, 0x0040, 0x0080, 0x0100, 0x0200, 0x0400, 0x0000},
  23. {0x0200, 0x0001, 0x0002, 0x0004, 0x0008, 0x0010, 0x0020, 0x0040, 0x0080, 0x0100, 0x0000}
  24. };
  25. static uint8_t tubesBuffer[SPI_BUFFER_SIZE] = {0};
  26. /* private typedef */
  27. /* private functions */
  28. static void _show_digits(const uint32_t digits);
  29. static void GPIO_Init(void);
  30. static void DMA_Init(void);
  31. static void I2C1_Init(void);
  32. static void SPI1_Init(void);
  33. static void TIM1_Init(void);
  34. static void TIM3_Init(void);
  35. static void TIM14_Init(void);
  36. //static void TIM16_Init(void);
  37. //static void TIM17_Init(void);
  38. //static void USART1_UART_Init(void);
  39. /* Board perephireal Configuration */
  40. void Board_Init(void)
  41. {
  42. /* Main peripheral clock enable */
  43. RCC->APBENR1 = (RCC_APBENR1_PWREN | RCC_APBENR1_I2C1EN | RCC_APBENR1_TIM3EN);
  44. RCC->APBENR2 = (RCC_APBENR2_SYSCFGEN | RCC_APBENR2_SPI1EN | RCC_APBENR2_TIM1EN);
  45. /* GPIO Ports Clock Enable */
  46. RCC->IOPENR = (RCC_IOPENR_GPIOAEN | RCC_IOPENR_GPIOBEN | RCC_IOPENR_GPIOCEN);
  47. /* Peripheral interrupt init*/
  48. /* RCC_IRQn interrupt configuration */
  49. NVIC_SetPriority(RCC_IRQn, 0);
  50. NVIC_EnableIRQ(RCC_IRQn);
  51. /* Configure the system clock */
  52. SystemClock_Config();
  53. /* Processor uses sleep as its low power mode */
  54. SCB->SCR &= ~((uint32_t)SCB_SCR_SLEEPDEEP_Msk);
  55. /* DisableSleepOnExit */
  56. SCB->SCR &= ~((uint32_t)SCB_SCR_SLEEPONEXIT_Msk);
  57. /* Initialize all configured peripherals */
  58. GPIO_Init();
  59. DMA_Init();
  60. I2C1_Init();
  61. SPI1_Init();
  62. /** Star SPI transfer to shift registers */
  63. /* Set DMA source and destination addresses. */
  64. /* Source: Address of the SPI buffer. */
  65. DMA1_Channel1->CMAR = (uint32_t)&tubesBuffer;
  66. /* Destination: SPI1 data register. */
  67. DMA1_Channel1->CPAR = (uint32_t)&(SPI1->DR);
  68. /* Set DMA data transfer length (SPI buffer length). */
  69. DMA1_Channel1->CNDTR = SPI_BUFFER_SIZE;
  70. /* Enable SPI transfer */
  71. SPI1->CR1 |= SPI_CR1_SPE;
  72. Flag.SPI_TX_End = 1;
  73. /* Enable tube power */
  74. TUBE_PWR_ON;
  75. /* display work now */
  76. /* Start RGB & Tube Power PWM */
  77. TIM1_Init();
  78. TIM3_Init();
  79. /* Tube Blink timer */
  80. TIM14_Init();
  81. /* IN15 Fade In/Out timer */
  82. //TIM16_Init();
  83. //TIM17_Init();
  84. //USART1_UART_Init();
  85. }
  86. /**
  87. * @brief Out digits to SPI buffer. ON/off tube power.
  88. * @param : array with four BCD digits
  89. * @retval : None
  90. */
  91. void showDigits(tube4_t dig)
  92. {
  93. static uint32_t old_dig = 0;
  94. uint8_t st = 0, ov = FADE_START;
  95. if (old_dig != dig.u32) {
  96. while (ov < FADE_STOP) {
  97. if (st == 0) {
  98. // new tube value
  99. st = 1;
  100. _show_digits(dig.u32);
  101. ov += FADE_STEP;
  102. tdelay_ms(ov);
  103. } else {
  104. // old tube value
  105. st = 0;
  106. _show_digits(old_dig);
  107. tdelay_ms(FADE_STOP - ov);
  108. }
  109. } // End of while
  110. old_dig = dig.u32;
  111. } // End of if-else
  112. }
  113. void lShiftDigits(const tube4_t old, const tube4_t dig) {
  114. uint32_t * buf;
  115. uint8_t sbuf[12];
  116. sbuf[0] = dig.ar[0];
  117. sbuf[1] = dig.ar[1];
  118. sbuf[2] = dig.ar[2];
  119. sbuf[3] = dig.ar[3];
  120. sbuf[4] = TUBE_BLANK;
  121. sbuf[5] = TUBE_BLANK;
  122. sbuf[6] = TUBE_BLANK;
  123. sbuf[7] = TUBE_BLANK;
  124. sbuf[8] = old.ar[0];
  125. sbuf[9] = old.ar[1];
  126. sbuf[10] = old.ar[2];
  127. sbuf[11] = old.ar[3];
  128. int i;
  129. for (i=8; i>=0; i--) {
  130. buf = (uint32_t *)&sbuf[i];
  131. _show_digits(*buf);
  132. tdelay_ms(100);
  133. }
  134. }
  135. void slideDigits(tube4_t dig) {
  136. tube4_t buf;
  137. const uint8_t pause = 100;;
  138. buf.s8.tA = TUBE_BLANK;
  139. buf.s8.tB = TUBE_BLANK;
  140. buf.s8.tD = TUBE_BLANK;
  141. buf.s8.tE = TUBE_BLANK;
  142. _show_digits(buf.u32);
  143. tdelay_ms(pause);
  144. buf.s8.tE = dig.s8.tA;
  145. _show_digits(buf.u32);
  146. tdelay_ms(pause);
  147. buf.s8.tD = dig.s8.tA;
  148. buf.s8.tE = dig.s8.tB;
  149. _show_digits(buf.u32);
  150. tdelay_ms(pause);
  151. buf.s8.tB = dig.s8.tA;
  152. buf.s8.tD = dig.s8.tB;
  153. buf.s8.tE = dig.s8.tD;
  154. _show_digits(buf.u32);
  155. tdelay_ms(pause);
  156. buf.s8.tA = dig.s8.tA;
  157. buf.s8.tB = dig.s8.tB;
  158. buf.s8.tD = dig.s8.tD;
  159. buf.s8.tE = dig.s8.tE;
  160. _show_digits(buf.u32);
  161. tdelay_ms(pause);
  162. buf.s8.tA = dig.s8.tB;
  163. buf.s8.tB = dig.s8.tD;
  164. buf.s8.tD = dig.s8.tE;
  165. buf.s8.tE = TUBE_BLANK;
  166. _show_digits(buf.u32);
  167. tdelay_ms(pause);
  168. buf.s8.tA = dig.s8.tD;
  169. buf.s8.tB = dig.s8.tE;
  170. buf.s8.tD = TUBE_BLANK;
  171. _show_digits(buf.u32);
  172. tdelay_ms(pause);
  173. buf.s8.tA = dig.s8.tE;
  174. buf.s8.tB = TUBE_BLANK;
  175. _show_digits(buf.u32);
  176. tdelay_ms(pause);
  177. buf.s8.tA = TUBE_BLANK;
  178. _show_digits(buf.u32);
  179. tdelay_ms(pause);
  180. }
  181. static void _show_digits(const uint32_t digits)
  182. {
  183. tube4_t dig;
  184. dig.u32 = digits;
  185. /* Clear buffer */
  186. tubesBuffer[0] = 0;
  187. tubesBuffer[1] = 0;
  188. tubesBuffer[2] = 0;
  189. tubesBuffer[3] = 0;
  190. tubesBuffer[4] = 0;
  191. /* check values range */
  192. int i;
  193. for (i=0; i<4; i++) {
  194. if (dig.ar[i] > TUBE_BLANK) {
  195. dig.ar[i] = TUBE_BLANK;
  196. }
  197. }
  198. /* Wait for SPI */
  199. while (Flag.SPI_TX_End == 0);
  200. Flag.SPI_TX_End = 0;
  201. /* Feel buffer */
  202. tubesBuffer[0] = (uint8_t)(nixieCathodeMap[Tube_E][dig.s8.tE] >> 8);
  203. tubesBuffer[1] = (uint8_t)((nixieCathodeMap[Tube_E][dig.s8.tE]) | (nixieCathodeMap[Tube_D][dig.s8.tD] >> 8));
  204. tubesBuffer[2] = (uint8_t)((nixieCathodeMap[Tube_D][dig.s8.tD]) | (nixieCathodeMap[Tube_B][dig.s8.tB] >> 8));
  205. tubesBuffer[3] = (uint8_t)((nixieCathodeMap[Tube_B][dig.s8.tB]) | (nixieCathodeMap[Tube_A][dig.s8.tA] >> 8));
  206. tubesBuffer[4] = (uint8_t)(nixieCathodeMap[Tube_A][dig.s8.tA]);
  207. /* Start DMA transfer to SPI */
  208. DMA1_Channel1->CCR |= DMA_CCR_EN;
  209. /* On/Off tube power */
  210. for (i=0; i<4; i++) {
  211. if (dig.ar[i] == TUBE_BLANK) {
  212. tube_PowerOff((tube_pos_t)i);
  213. } else {
  214. tube_PowerOn((tube_pos_t)i);
  215. }
  216. }
  217. }
  218. /**
  219. * @brief Refresh unused tube digits for avoiding degrade
  220. *
  221. */
  222. void tube_Refresh(void)
  223. {
  224. static int cnt = 0;
  225. tube4_t buf;
  226. /* We start ourselves every 125 ms to update 8 digits in a second. */
  227. if (cnt == 0) {
  228. RTOS_SetTask(tube_Refresh, 125, 125);
  229. }
  230. /* Fill buffer with values */
  231. switch (cnt) {
  232. case 0:
  233. cnt = 1;
  234. buf.s8.tA = 0;
  235. buf.s8.tD = 6;
  236. break;
  237. case 1:
  238. cnt = 2;
  239. buf.s8.tA = 3;
  240. break;
  241. case 2:
  242. cnt = 3;
  243. buf.s8.tA = 4;
  244. buf.s8.tD = 7;
  245. break;
  246. case 3:
  247. cnt = 4;
  248. buf.s8.tA = 5;
  249. break;
  250. case 4:
  251. cnt = 5;
  252. buf.s8.tA = 6;
  253. buf.s8.tD = 8;
  254. break;
  255. case 5:
  256. cnt = 6;
  257. buf.s8.tA = 7;
  258. break;
  259. case 6:
  260. cnt = 7;
  261. buf.s8.tA = 8;
  262. buf.s8.tD = 9;
  263. break;
  264. case 7:
  265. cnt = 0;
  266. buf.s8.tA = 9;
  267. break;
  268. default:
  269. cnt = 0;
  270. }
  271. /* Self delete task */
  272. if (cnt == 0) {
  273. RTOS_DeleteTask(tube_Refresh);
  274. }
  275. /* Output buffer value to digits */
  276. _show_digits(buf.u32);
  277. }
  278. /**
  279. * Control power of tube
  280. */
  281. void tube_PowerOn(tube_pos_t tube)
  282. {
  283. switch (tube) {
  284. case Tube_A:
  285. TUBE_A_ON;
  286. break;
  287. case Tube_B:
  288. TUBE_B_ON;
  289. break;
  290. case Tube_D:
  291. TUBE_D_ON;
  292. break;
  293. case Tube_E:
  294. TUBE_E_ON;
  295. break;
  296. case Tube_All:
  297. TUBE_ALL_ON;
  298. break;
  299. default:
  300. break;
  301. }
  302. }
  303. void tube_PowerOff(tube_pos_t tube)
  304. {
  305. switch (tube) {
  306. case Tube_A:
  307. TUBE_A_OFF;
  308. break;
  309. case Tube_B:
  310. TUBE_B_OFF;
  311. break;
  312. case Tube_D:
  313. TUBE_D_OFF;
  314. break;
  315. case Tube_E:
  316. TUBE_E_OFF;
  317. break;
  318. case Tube_All:
  319. TUBE_ALL_OFF;
  320. break;
  321. default:
  322. break;
  323. }
  324. }
  325. void tube_BrightLevel(tube_pos_t tube, uint8_t bright)
  326. {
  327. switch (tube) {
  328. case Tube_A:
  329. TUBE_A_BRIGHT(bright);
  330. break;
  331. case Tube_B:
  332. TUBE_B_BRIGHT(bright);
  333. break;
  334. case Tube_C:
  335. TUBE_C_BRIGHT(bright);
  336. break;
  337. case Tube_D:
  338. TUBE_D_BRIGHT(bright);
  339. break;
  340. case Tube_E:
  341. TUBE_E_BRIGHT(bright);
  342. break;
  343. case Tube_All:
  344. TUBES_BRIGHT(bright);
  345. break;
  346. default:
  347. break;
  348. }
  349. }
  350. /**
  351. * @brief System Clock Configuration
  352. * @retval None
  353. */
  354. void SystemClock_Config(void)
  355. {
  356. /* HSI configuration and activation */
  357. RCC->CR |= RCC_CR_HSION; // Enable HSI
  358. while((RCC->CR & RCC_CR_HSIRDY) == 0);
  359. /* Main PLL configuration and activation */
  360. RCC->PLLCFGR = (RCC_PLLCFGR_PLLSRC_HSI | RCC_PLLCFGR_PLLM_0 | (9 << RCC_PLLCFGR_PLLN_Pos) | RCC_PLLCFGR_PLLR_1);
  361. RCC->PLLCFGR |= RCC_PLLCFGR_PLLREN; // RCC_PLL_EnableDomain_SYS
  362. RCC->CR |= RCC_CR_PLLON; // RCC_PLL_Enable
  363. while((RCC->CR & RCC_CR_PLLRDY) == 0);
  364. /* Sysclk activation on the main PLL */
  365. RCC->CFGR &= RCC_CFGR_SW;
  366. RCC->CFGR |= RCC_CFGR_SW_1;
  367. while((RCC->CFGR & RCC_CFGR_SWS) != RCC_CFGR_SWS_1);
  368. /* Update CMSIS variable (which can be updated also through SystemCoreClockUpdate function) */
  369. SystemCoreClock = 24000000;
  370. /* Set I2C Clock Source */
  371. RCC->CCIPR &= ~(RCC_CCIPR_I2C1SEL);
  372. RCC->CCIPR |= RCC_CCIPR_I2C1SEL_1;
  373. }
  374. /**
  375. * @brief GPIO Initialization Function
  376. * @param None
  377. * @retval None
  378. */
  379. static void GPIO_Init(void)
  380. {
  381. /* EXTI Line: falling, no pull, input */
  382. // interrupt on line 14
  383. EXTI->IMR1 |= EXTI_IMR1_IM14;
  384. // TRIGGER FALLING
  385. EXTI->FTSR1 = EXTI_FTSR1_FT14;
  386. // external interrupt selection - PC14 to EXTI14
  387. EXTI->EXTICR[3] = EXTI_EXTICR4_EXTI14_1;
  388. /* EXTI interrupt init*/
  389. NVIC_SetPriority(EXTI4_15_IRQn, 0);
  390. NVIC_EnableIRQ(EXTI4_15_IRQn);
  391. /* set GPIO modes */
  392. GPIO_SetPinMode(IRQ_GPIO_Port, IRQ_Pin, GPIO_MODE_IN);
  393. GPIO_SetPinPull(IRQ_GPIO_Port, IRQ_Pin, GPIO_PUPDR_UP);
  394. /* L0, L1, L2, L3 - IN-15 symbols control, PP out, high speed, pull down */
  395. GPIO_SetPinMode(LC0_GPIO_Port, LC0_Pin, GPIO_MODE_OUT);
  396. GPIO_SetPinSpeed(LC0_GPIO_Port, LC0_Pin, GPIO_OSPEED_HI);
  397. GPIO_SetPinPull(LC0_GPIO_Port, LC0_Pin, GPIO_PUPDR_DW);
  398. GPIO_SetPinMode(LC1_GPIO_Port, LC1_Pin, GPIO_MODE_OUT);
  399. GPIO_SetPinSpeed(LC1_GPIO_Port, LC1_Pin, GPIO_OSPEED_HI);
  400. GPIO_SetPinPull(LC1_GPIO_Port, LC1_Pin, GPIO_PUPDR_DW);
  401. GPIO_SetPinMode(LC2_GPIO_Port, LC2_Pin, GPIO_MODE_OUT);
  402. GPIO_SetPinSpeed(LC2_GPIO_Port, LC2_Pin, GPIO_OSPEED_HI);
  403. GPIO_SetPinPull(LC2_GPIO_Port, LC2_Pin, GPIO_PUPDR_DW);
  404. GPIO_SetPinMode(LC3_GPIO_Port, LC3_Pin, GPIO_MODE_OUT);
  405. GPIO_SetPinSpeed(LC3_GPIO_Port, LC3_Pin, GPIO_OSPEED_HI);
  406. GPIO_SetPinPull(LC3_GPIO_Port, LC3_Pin, GPIO_PUPDR_DW);
  407. /* Pwer Shutdown: PP out, high speed, pull down */
  408. GPIO_SetPinMode(SHDN_GPIO_Port, SHDN_Pin, GPIO_MODE_OUT);
  409. GPIO_SetPinSpeed(SHDN_GPIO_Port, SHDN_Pin, GPIO_OSPEED_HI);
  410. GPIO_SetPinPull(SHDN_GPIO_Port, SHDN_Pin, GPIO_PUPDR_DW);
  411. /* SPI Latch: OD out, high speed, no pull */
  412. GPIO_SetPinMode(Latch_GPIO_Port, Latch_Pin, GPIO_MODE_OUT);
  413. GPIO_SetPinOutputType(Latch_GPIO_Port, Latch_Pin, GPIO_OTYPE_OD);
  414. GPIO_SetPinSpeed(Latch_GPIO_Port, Latch_Pin, GPIO_OSPEED_HI);
  415. /* UART_Enable: PP out, low speed, no pull*/
  416. GPIO_SetPinMode(UART_EN_GPIO_Port, UART_EN_Pin, GPIO_MODE_OUT);
  417. /* UART_State: input, pull up */
  418. GPIO_SetPinPull(UART_ST_GPIO_Port, UART_ST_Pin, GPIO_PUPDR_UP);
  419. GPIO_SetPinMode(UART_ST_GPIO_Port, UART_ST_Pin, GPIO_MODE_IN);
  420. /* BTN1, BTN2, BTN3, BTN4: input, pull up */
  421. GPIO_SetPinPull(BTN1_GPIO_Port, BTN1_Pin, GPIO_PUPDR_UP);
  422. GPIO_SetPinMode(BTN1_GPIO_Port, BTN1_Pin, GPIO_MODE_IN);
  423. GPIO_SetPinPull(BTN2_GPIO_Port, BTN2_Pin, GPIO_PUPDR_UP);
  424. GPIO_SetPinMode(BTN2_GPIO_Port, BTN2_Pin, GPIO_MODE_IN);
  425. GPIO_SetPinPull(BTN3_GPIO_Port, BTN3_Pin, GPIO_PUPDR_UP);
  426. GPIO_SetPinMode(BTN3_GPIO_Port, BTN3_Pin, GPIO_MODE_IN);
  427. GPIO_SetPinPull(BTN4_GPIO_Port, BTN4_Pin, GPIO_PUPDR_UP);
  428. GPIO_SetPinMode(BTN4_GPIO_Port, BTN4_Pin, GPIO_MODE_IN);
  429. }
  430. /**
  431. * Enable DMA controller clock
  432. */
  433. static void DMA_Init(void)
  434. {
  435. /* DMA controller clock enable */
  436. RCC->AHBENR |= RCC_AHBENR_DMA1EN;
  437. /* enable DMA1 clock in Sleep/Stop mode */
  438. //RCC->AHBSMENR |= RCC_AHBSMENR_DMA1SMEN;
  439. /* DMA interrupt init */
  440. /* DMA1_Channel1_IRQn interrupt configuration */
  441. NVIC_SetPriority(DMA1_Channel1_IRQn, 0);
  442. NVIC_EnableIRQ(DMA1_Channel1_IRQn);
  443. /* DMA1_Channel2_3_IRQn interrupt configuration */
  444. NVIC_SetPriority(DMA1_Channel2_3_IRQn, 0);
  445. NVIC_EnableIRQ(DMA1_Channel2_3_IRQn);
  446. }
  447. /**
  448. * @brief I2C1 Initialization Function
  449. * @param None
  450. * @retval None
  451. */
  452. static void I2C1_Init(void)
  453. {
  454. /** I2C1 GPIO Configuration
  455. PB8 ------> I2C1_SCL
  456. PB9 ------> I2C1_SDA
  457. */
  458. GPIO_SetPinMode(GPIOB, GPIO_PIN_8, GPIO_MODE_AFF);
  459. GPIO_SetPinOutputType(GPIOB, GPIO_PIN_8, GPIO_OTYPE_OD);
  460. GPIO_SetPinSpeed(GPIOB, GPIO_PIN_8, GPIO_OSPEED_HI);
  461. GPIO_SetPinPull(GPIOB, GPIO_PIN_8, GPIO_PUPDR_UP);
  462. GPIO_SetAFPin_8_15(GPIOB, GPIO_PIN_8, GPIO_AF_6);
  463. GPIO_SetPinMode(GPIOB, GPIO_PIN_9, GPIO_MODE_AFF);
  464. GPIO_SetPinOutputType(GPIOB, GPIO_PIN_9, GPIO_OTYPE_OD);
  465. GPIO_SetPinSpeed(GPIOB, GPIO_PIN_9, GPIO_OSPEED_HI);
  466. GPIO_SetPinPull(GPIOB, GPIO_PIN_9, GPIO_PUPDR_UP);
  467. GPIO_SetAFPin_8_15(GPIOB, GPIO_PIN_9, GPIO_AF_6);
  468. /** I2C1 DMA Init */
  469. /* I2C1_RX Init: Priority medium, Memory increment, read from perephireal,
  470. transfer error interrupt enable, transfer complete interrupt enable */
  471. DMA1_Channel2->CCR = (DMA_CCR_PL_0 | DMA_CCR_MINC | DMA_CCR_TEIE | DMA_CCR_TCIE);
  472. /* Route DMA channel 2 to I2C1 RX */
  473. DMAMUX1_Channel1->CCR = 10;
  474. /* I2C1_TX Init: Priority medium, Memory increment, read from memory,
  475. transfer error interrupt enable, transfer complete interrupt enable */
  476. DMA1_Channel3->CCR = (DMA_CCR_PL_0 | DMA_CCR_MINC| DMA_CCR_DIR | DMA_CCR_TEIE | DMA_CCR_TCIE);
  477. /* Route DMA channel 3 to I2C1 TX */
  478. DMAMUX1_Channel2->CCR = 11;
  479. /** I2C Initialization: I2C_Fast */
  480. I2C1->TIMINGR = 0x0010061A;
  481. I2C1->CR2 = I2C_CR2_AUTOEND;
  482. I2C1->CR1 = I2C_CR1_PE;
  483. }
  484. /**
  485. * @brief SPI1 Initialization Function
  486. * @param None
  487. * @retval None
  488. */
  489. static void SPI1_Init(void)
  490. {
  491. /**SPI1 GPIO Configuration
  492. PB3 ------> SPI1_SCK
  493. PB5 ------> SPI1_MOSI
  494. */
  495. GPIO_SetPinMode(GPIOB, GPIO_PIN_3, GPIO_MODE_AFF);
  496. GPIO_SetPinOutputType(GPIOB, GPIO_PIN_3, GPIO_OTYPE_OD);
  497. GPIO_SetPinSpeed(GPIOB, GPIO_PIN_3, GPIO_OSPEED_HI);
  498. GPIO_SetPinMode(GPIOB, GPIO_PIN_5, GPIO_MODE_AFF);
  499. GPIO_SetPinOutputType(GPIOB, GPIO_PIN_5, GPIO_OTYPE_OD);
  500. GPIO_SetPinSpeed(GPIOB, GPIO_PIN_5, GPIO_OSPEED_HI);
  501. /* SPI1 DMA Init */
  502. /* SPI1_TX Init: Priority high, Memory increment, read from memory, circular mode,
  503. Enable DMA transfer complete/error interrupts */
  504. DMA1_Channel1->CCR = (DMA_CCR_PL_1 | DMA_CCR_MINC | DMA_CCR_CIRC | DMA_CCR_TEIE | DMA_CCR_DIR | DMA_CCR_TCIE);
  505. /* Route DMA channel 1 to SPI1 TX */
  506. DMAMUX1_Channel0->CCR = 0x11;
  507. /* SPI1 interrupt Init */
  508. NVIC_SetPriority(SPI1_IRQn, 0);
  509. NVIC_EnableIRQ(SPI1_IRQn);
  510. /* SPI1 parameter configuration: master mode, data 8 bit, divider = 16, TX DMA */
  511. SPI1->CR1 = (SPI_CR1_MSTR | SPI_CR1_BR_1 | SPI_CR1_BR_0 | SPI_CR1_SSM | SPI_CR1_SSI);
  512. SPI1->CR2 = (SPI_CR2_DS_2 | SPI_CR2_DS_1 | SPI_CR2_DS_0 | SPI_CR2_TXDMAEN | SPI_CR2_FRXTH);
  513. }
  514. /**
  515. * @brief TIM1 Initialization Function
  516. * @param None
  517. * @retval None
  518. */
  519. static void TIM1_Init(void)
  520. {
  521. /* target clock */
  522. TIM1->PSC = TIM1_PSC; // prescaler
  523. TIM1->ARR = TIM1_ARR; // auto reload value
  524. TIM1->CR1 = TIM_CR1_ARPE;
  525. // initial pwm value
  526. TIM1->CCR1 = PWM_TUBE_INIT_VAL;
  527. TIM1->CCR2 = PWM_LED_INIT_VAL;
  528. TIM1->CCR3 = PWM_LED_INIT_VAL;
  529. TIM1->CCR4 = PWM_LED_INIT_VAL;
  530. // pwm mode 1 for 4 chanels
  531. TIM1->CCMR1 = (TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC2M_1 | TIM_CCMR1_OC2M_2 | TIM_CCMR1_OC1PE | TIM_CCMR1_OC2PE);
  532. TIM1->CCMR2 = (TIM_CCMR2_OC3M_1 | TIM_CCMR2_OC3M_2 | TIM_CCMR2_OC4M_1 | TIM_CCMR2_OC4M_2 | TIM_CCMR2_OC3PE | TIM_CCMR2_OC4PE);
  533. // reset int flag - not needed, int unused
  534. //TIM1->SR |= TIM_SR_UIF;
  535. TIM1->BDTR = TIM_BDTR_MOE; // enable main output
  536. TIM1->EGR = TIM_EGR_UG; // force timer update
  537. /* TIM1 CC_EnableChannel */
  538. TIM1->CCER = (TIM_CCER_CC1E | TIM_CCER_CC2E | TIM_CCER_CC3E | TIM_CCER_CC4E);
  539. /* TIM_EnableCounter */
  540. TIM1->CR1 |= TIM_CR1_CEN;
  541. /** TIM1 GPIO Configuration
  542. PA8 ------> TIM1_CH1
  543. PA9 ------> TIM1_CH2
  544. PA10 ------> TIM1_CH3
  545. PA11 [PA9] ------> TIM1_CH4
  546. */
  547. GPIO_SetPinMode(PWM_1_GPIO_Port, PWM_1_Pin, GPIO_MODE_AFF);
  548. GPIO_SetPinSpeed(PWM_1_GPIO_Port, PWM_1_Pin, GPIO_OSPEED_HI);
  549. GPIO_SetPinPull(PWM_1_GPIO_Port, PWM_1_Pin, GPIO_PUPDR_DW);
  550. GPIO_SetAFPin_8_15(PWM_1_GPIO_Port, PWM_1_Pin, GPIO_AF_2);
  551. GPIO_SetPinMode(PWM_R_GPIO_Port, PWM_R_Pin, GPIO_MODE_AFF);
  552. GPIO_SetPinSpeed(PWM_R_GPIO_Port, PWM_R_Pin, GPIO_OSPEED_HI);
  553. GPIO_SetPinPull(PWM_R_GPIO_Port, PWM_R_Pin, GPIO_PUPDR_DW);
  554. GPIO_SetAFPin_8_15(PWM_R_GPIO_Port, PWM_R_Pin, GPIO_AF_2);
  555. GPIO_SetPinMode(PWM_B_GPIO_Port, PWM_B_Pin, GPIO_MODE_AFF);
  556. GPIO_SetPinSpeed(PWM_B_GPIO_Port, PWM_B_Pin, GPIO_OSPEED_HI);
  557. GPIO_SetPinPull(PWM_B_GPIO_Port, PWM_B_Pin, GPIO_PUPDR_DW);
  558. GPIO_SetAFPin_8_15(PWM_B_GPIO_Port, PWM_B_Pin, GPIO_AF_2);
  559. GPIO_SetPinMode(PWM_G_GPIO_Port, PWM_G_Pin, GPIO_MODE_AFF);
  560. GPIO_SetPinSpeed(PWM_G_GPIO_Port, PWM_G_Pin, GPIO_OSPEED_HI);
  561. GPIO_SetPinPull(PWM_G_GPIO_Port, PWM_G_Pin, GPIO_PUPDR_DW);
  562. GPIO_SetAFPin_8_15(PWM_G_GPIO_Port, PWM_G_Pin, GPIO_AF_2);
  563. }
  564. /**
  565. * @brief TIM3 Initialization Function
  566. * @param None
  567. * @retval None
  568. */
  569. static void TIM3_Init(void)
  570. {
  571. /* target clock */
  572. TIM3->PSC = TIM3_PSC; // prescaler
  573. TIM3->ARR = TIM3_ARR; // auto reload value
  574. TIM3->CR1 = TIM_CR1_ARPE;
  575. // initial pwm value
  576. TIM3->CCR1 = PWM_TUBE_INIT_VAL;
  577. TIM3->CCR2 = PWM_TUBE_INIT_VAL;
  578. TIM3->CCR3 = PWM_TUBE_INIT_VAL;
  579. TIM3->CCR4 = PWM_TUBE_INIT_VAL;
  580. // pwm mode 1 for 4 chanels
  581. TIM3->CCMR1 = (TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC2M_1 | TIM_CCMR1_OC2M_2 | TIM_CCMR1_OC1PE | TIM_CCMR1_OC2PE);
  582. TIM3->CCMR2 = (TIM_CCMR2_OC3M_1 | TIM_CCMR2_OC3M_2 | TIM_CCMR2_OC4M_1 | TIM_CCMR2_OC4M_2 | TIM_CCMR2_OC3PE | TIM_CCMR2_OC4PE);
  583. // launch timer
  584. TIM3->EGR = TIM_EGR_UG; // force timer update
  585. /* TIM3 TIM_CC_EnableChannel */
  586. TIM3->CCER = (TIM_CCER_CC1E | TIM_CCER_CC2E | TIM_CCER_CC3E | TIM_CCER_CC4E);
  587. /* TIM3 enable */
  588. TIM3->CR1 |= TIM_CR1_CEN;
  589. /**TIM3 GPIO Configuration
  590. PA6 ------> TIM3_CH1
  591. PA7 ------> TIM3_CH2
  592. PB0 ------> TIM3_CH3
  593. PB1 ------> TIM3_CH4
  594. */
  595. GPIO_SetPinMode(PWM_5_GPIO_Port, PWM_5_Pin, GPIO_MODE_AFF);
  596. GPIO_SetPinSpeed(PWM_5_GPIO_Port, PWM_5_Pin, GPIO_OSPEED_HI);
  597. GPIO_SetPinPull(PWM_5_GPIO_Port, PWM_5_Pin, GPIO_PUPDR_DW);
  598. GPIO_SetAFPin_0_7(PWM_5_GPIO_Port, PWM_5_Pin, GPIO_AF_1);
  599. GPIO_SetPinMode(PWM_4_GPIO_Port, PWM_4_Pin, GPIO_MODE_AFF);
  600. GPIO_SetPinSpeed(PWM_4_GPIO_Port, PWM_4_Pin, GPIO_OSPEED_HI);
  601. GPIO_SetPinPull(PWM_4_GPIO_Port, PWM_4_Pin, GPIO_PUPDR_DW);
  602. GPIO_SetAFPin_0_7(PWM_4_GPIO_Port, PWM_4_Pin, GPIO_AF_1);
  603. GPIO_SetPinMode(PWM_3_GPIO_Port, PWM_3_Pin, GPIO_MODE_AFF);
  604. GPIO_SetPinSpeed(PWM_3_GPIO_Port, PWM_3_Pin, GPIO_OSPEED_HI);
  605. GPIO_SetPinPull(PWM_3_GPIO_Port, PWM_3_Pin, GPIO_PUPDR_DW);
  606. GPIO_SetAFPin_0_7(PWM_3_GPIO_Port, PWM_3_Pin, GPIO_AF_1);
  607. GPIO_SetPinMode(PWM_2_GPIO_Port, PWM_2_Pin, GPIO_MODE_AFF);
  608. GPIO_SetPinSpeed(PWM_2_GPIO_Port, PWM_2_Pin, GPIO_OSPEED_HI);
  609. GPIO_SetPinPull(PWM_2_GPIO_Port, PWM_2_Pin, GPIO_PUPDR_DW);
  610. GPIO_SetAFPin_0_7(PWM_2_GPIO_Port, PWM_2_Pin, GPIO_AF_1);
  611. }
  612. /**
  613. * @brief TIM14 Initialization Function
  614. * @param None
  615. * @retval None
  616. * @desc "Блинкование" разрядами.
  617. */
  618. static void TIM14_Init(void)
  619. {
  620. /* Peripheral clock enable */
  621. RCC->APBENR2 |= RCC_APBENR2_TIM14EN;
  622. /* TIM14 interrupt Init */
  623. NVIC_SetPriority(TIM14_IRQn, 0);
  624. NVIC_EnableIRQ(TIM14_IRQn);
  625. /* Set TIM14 for 1 sec period */
  626. TIM14->PSC = TIM14_PSC;
  627. TIM14->ARR = TIM14_ARR;
  628. /* Enable: Auto-reload preload */
  629. TIM14->CR1 = (TIM_CR1_ARPE);
  630. /* Output compare 1 preload */
  631. TIM14->CCMR1 = (TIM_CCMR1_OC1M_0 | TIM_CCMR1_OC1PE);
  632. /* Enable Channel_1 */
  633. TIM14->CCER = TIM_CCER_CC1E;
  634. /* Impulse value in msek */
  635. TIM14->CCR1 = TIM14_PULSE_VAL;
  636. /* Enable IRQ for Update end CaptureCompare envents */
  637. TIM14->DIER = (TIM_DIER_UIE | TIM_DIER_CC1IE);
  638. }
  639. /**
  640. * На старте активируем все каналы, при совпадении отключаем (не)нужные.
  641. */
  642. void Blink_Start(void)
  643. {
  644. /* clear IRQ flags */
  645. TIM14->SR |= TIM_SR_UIF;
  646. TIM14->SR |= TIM_SR_CC1IF;
  647. /* clear counter value */
  648. TIM14->CNT = 0;
  649. /* enable timer */
  650. TIM14->CR1 |= TIM_CR1_CEN;
  651. }
  652. void Blink_Stop(void)
  653. {
  654. /* disable timer */
  655. TIM14->CR1 &= ~(TIM_CR1_CEN);
  656. /* enable channels & clean flag */
  657. if (Flag.Blink_1 != 0) {
  658. TUBE_A_ON;
  659. Flag.Blink_1 = 0;
  660. }
  661. if (Flag.Blink_2 != 0) {
  662. TUBE_B_ON;
  663. Flag.Blink_2 = 0;
  664. }
  665. if (Flag.Blink_3 != 0) {
  666. TUBE_C_ON;
  667. Flag.Blink_3 = 0;
  668. }
  669. if (Flag.Blink_4 != 0) {
  670. TUBE_D_ON;
  671. Flag.Blink_4 = 0;
  672. }
  673. if (Flag.Blink_5 != 0) {
  674. TUBE_E_ON;
  675. Flag.Blink_5 = 0;
  676. }
  677. }
  678. #ifdef USE_TIM16
  679. /**
  680. * @brief TIM16 Initialization Function
  681. * @param None
  682. * @retval None
  683. */
  684. static void TIM16_Init(void)
  685. {
  686. /* Peripheral clock enable */
  687. RCC->APBENR2 |= RCC_APBENR2_TIM16EN;
  688. /* TIM16 interrupt Init */
  689. NVIC_SetPriority(TIM16_IRQn, 0);
  690. NVIC_EnableIRQ(TIM16_IRQn);
  691. /* setup clock */
  692. TIM16->PSC = TIM16_PSC; // prescaler
  693. TIM16->ARR = TIM16_ARR; // auto reload value
  694. TIM16->CR1 = TIM_CR1_ARPE;
  695. // initial pwm value
  696. //TIM16->CCR1 = TIM16_ARR/2; //TIM16_PWM_VAL;
  697. // pwm mode 1 for 1 chanel
  698. //TIM16->CCMR1 = (TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1PE);
  699. // reset int flag
  700. TIM16->SR |= TIM_SR_UIF;
  701. TIM16->BDTR = TIM_BDTR_MOE; // enable main output
  702. TIM16->EGR = TIM_EGR_UG; // force timer update
  703. /* TIM16 CC_EnableChannel */
  704. //TIM16->CCER = TIM_CCER_CC1E;
  705. /* Enable IRQ */
  706. TIM16->DIER = TIM_DIER_UIE;
  707. /* TIM_EnableCounter */
  708. TIM16->CR1 |= TIM_CR1_CEN;
  709. }
  710. #endif /* USE_TIM16 */
  711. #ifdef USE_TIM17
  712. /**
  713. * @brief TIM17 Initialization Function
  714. * @param None
  715. * @retval None
  716. */
  717. static void TIM17_Init(void)
  718. {
  719. /* Peripheral clock enable */
  720. RCC->APBENR2 |= RCC_APBENR2_TIM17EN;
  721. /* TIM17 interrupt Init */
  722. NVIC_SetPriority(TIM17_IRQn, 0);
  723. NVIC_EnableIRQ(TIM17_IRQn);
  724. /* setup clock */
  725. TIM17->PSC = TIM17_PSC; // prescaler
  726. TIM17->ARR = TIM17_ARR; // auto reload value
  727. TIM17->CR1 = TIM_CR1_ARPE;
  728. // initial pwm value
  729. //TIM17->CCR1 = TIM17_PWM_VAL;
  730. // pwm mode 1 for 1 chanel
  731. TIM17->CCMR1 = (TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1PE);
  732. // reset int flag
  733. TIM17->SR |= TIM_SR_UIF;
  734. TIM17->BDTR = TIM_BDTR_MOE; // enable main output
  735. TIM17->EGR = TIM_EGR_UG; // force timer update
  736. /* TIM17 CC_EnableChannel */
  737. TIM17->CCER = TIM_CCER_CC1E;
  738. /* TIM_EnableCounter */
  739. TIM17->CR1 |= TIM_CR1_CEN;
  740. /* Enable IRQ */
  741. TIM17->DIER = TIM_DIER_UIE;
  742. }
  743. #endif /* USE_TIM17 */
  744. #ifdef USE_UART
  745. /**
  746. * @brief USART1 Initialization Function
  747. * @param None
  748. * @retval None
  749. */
  750. static void USART1_UART_Init(void)
  751. {
  752. /* Peripheral clock enable */
  753. RCC->APBENR2 |= RCC_APBENR2_USART1EN;
  754. /**USART1 GPIO Configuration
  755. PB6 ------> USART1_TX
  756. PB7 ------> USART1_RX
  757. */
  758. GPIO_SetPinMode(GPIOB, GPIO_PIN_6, GPIO_MODE_AFF);
  759. GPIO_SetPinSpeed(GPIOB, GPIO_PIN_6, GPIO_OSPEED_HI);
  760. GPIO_SetPinMode(GPIOB, GPIO_PIN_7, GPIO_MODE_AFF);
  761. GPIO_SetPinSpeed(GPIOB, GPIO_PIN_7, GPIO_OSPEED_HI);
  762. /* USART1 interrupt Init */
  763. NVIC_SetPriority(USART1_IRQn, 0);
  764. NVIC_EnableIRQ(USART1_IRQn);
  765. USART1->CR1 |= (USART_CR1_TE |USART_CR1_RE);
  766. USART1->BRR = 138;
  767. /* USART1 Enable */
  768. USART1->CR1 |= USART_CR1_UE;
  769. /* Polling USART1 initialisation */
  770. while((!(USART1->ISR & USART_ISR_TEACK)) || (!(USART1->ISR & USART_ISR_REACK)))
  771. {
  772. }
  773. }
  774. #endif /* USE_UART */