stm32g0xx_it.c 6.7 KB

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  1. /**
  2. ******************************************************************************
  3. * @file stm32g0xx_it.c
  4. * @brief Interrupt Service Routines.
  5. ******************************************************************************
  6. * @attention
  7. *
  8. * <h2><center>&copy; Copyright (c) 2021 STMicroelectronics.
  9. * All rights reserved.</center></h2>
  10. *
  11. * This software component is licensed by ST under BSD 3-Clause license,
  12. * the "License"; You may not use this file except in compliance with the
  13. * License. You may obtain a copy of the License at:
  14. * opensource.org/licenses/BSD-3-Clause
  15. *
  16. ******************************************************************************
  17. */
  18. /* Includes ------------------------------------------------------------------*/
  19. #include "main.h"
  20. #include "stm32g0xx_it.h"
  21. /* Private includes ----------------------------------------------------------*/
  22. /* Private typedef -----------------------------------------------------------*/
  23. /* Private define ------------------------------------------------------------*/
  24. /* Private macro -------------------------------------------------------------*/
  25. /* Private variables ---------------------------------------------------------*/
  26. /* Private function prototypes -----------------------------------------------*/
  27. /* Private user code ---------------------------------------------------------*/
  28. /* External variables --------------------------------------------------------*/
  29. extern volatile in15_pin_t SymbolIN15;
  30. /******************************************************************************/
  31. /* Cortex-M0+ Processor Interruption and Exception Handlers */
  32. /******************************************************************************/
  33. /**
  34. * @brief This function handles Non maskable interrupt.
  35. */
  36. void NMI_Handler(void)
  37. {
  38. while (1)
  39. {
  40. }
  41. }
  42. /**
  43. * @brief This function handles Hard fault interrupt.
  44. */
  45. void HardFault_Handler(void)
  46. {
  47. // tube power off
  48. TIM1->CCER &= ~(TIM_CCER_CC1E);
  49. TIM3->CCER &= ~(TIM_CCER_CC4E);
  50. TIM3->CCER &= ~(TIM_CCER_CC3E);
  51. TIM3->CCER &= ~(TIM_CCER_CC2E);
  52. TIM3->CCER &= ~(TIM_CCER_CC1E);
  53. GPIOA->BSRR = 0x10;
  54. // red led
  55. TIM1->CCR2 = 0xff; TIM1->CCR3 = 0; TIM1->CCR4 = 0;
  56. while (1)
  57. {
  58. }
  59. }
  60. /**
  61. * @brief This function handles System service call via SWI instruction.
  62. */
  63. void SVC_Handler(void)
  64. {
  65. }
  66. /**
  67. * @brief This function handles Pendable request for system service.
  68. */
  69. void PendSV_Handler(void)
  70. {
  71. }
  72. /******************************************************************************/
  73. /* STM32G0xx Peripheral Interrupt Handlers */
  74. /* Add here the Interrupt Handlers for the used peripherals. */
  75. /* For the available peripheral interrupt handler names, */
  76. /* please refer to the startup file (startup_stm32g0xx.s). */
  77. /******************************************************************************/
  78. /**
  79. * @brief This function handles EXTI line 4 to 15 interrupts.
  80. */
  81. void EXTI4_15_IRQHandler(void)
  82. {
  83. if ((EXTI->FPR1 & EXTI_IMR1_IM14) != 0)
  84. {
  85. EXTI->FPR1 = EXTI_IMR1_IM14;
  86. Flag.RTC_IRQ = 1;
  87. ES_PlaceEvent(evNewSecond);
  88. }
  89. }
  90. /**
  91. * @brief This function handles DMA1 channel 1 interrupt.
  92. */
  93. void DMA1_Channel1_IRQHandler(void)
  94. {
  95. if ((DMA1->ISR & DMA_IFCR_CTCIF1) != 0) {
  96. DMA1->IFCR |= DMA_IFCR_CTCIF1; // reset IRQ flag
  97. Flag.SPI_TX_End = 1;
  98. /* Stop SPI-DMA transfer */
  99. DMA1_Channel1->CCR &= ~DMA_CCR_EN;
  100. /* Wait for end SPI transmit */
  101. LATCH_DOWN;
  102. while ((SPI1->SR & SPI_SR_FTLVL) != 0);
  103. while ((SPI1->SR & SPI_SR_BSY) != 0);
  104. LATCH_UP;
  105. }
  106. }
  107. /**
  108. * @brief This function handles DMA1 channel 2 and channel 3 interrupts.
  109. */
  110. void DMA1_Channel2_3_IRQHandler(void)
  111. {
  112. if ((DMA1->ISR & DMA_ISR_TCIF2) != 0) {
  113. /* reset IRQ flag */
  114. DMA1->IFCR |= DMA_IFCR_CTCIF2;
  115. /* Disable DMA channels for I2C RX */
  116. DMA1_Channel2->CCR &= ~DMA_CCR_EN;
  117. Flag.I2C_RX_End = 1;
  118. }
  119. if ((DMA1->ISR & DMA_ISR_TEIF2) != 0) {
  120. DMA1->IFCR |= DMA_IFCR_CTEIF2;
  121. DMA1_Channel2->CCR &= ~DMA_CCR_EN;
  122. Flag.I2C_RX_End = 1;
  123. Flag.I2C_RX_Err = 1;
  124. }
  125. if ((DMA1->ISR & DMA_ISR_TCIF3) != 0) {
  126. /* reset IRQ flag */
  127. DMA1->IFCR |= DMA_IFCR_CTCIF3;
  128. /* Disable DMA channels for I2C TX */
  129. DMA1_Channel3->CCR &= ~DMA_CCR_EN;
  130. Flag.I2C_TX_End = 1;
  131. }
  132. if ((DMA1->ISR & DMA_ISR_TEIF3) != 0) {
  133. DMA1->IFCR |= DMA_IFCR_CTEIF3;
  134. DMA1_Channel3->CCR &= ~DMA_CCR_EN;
  135. Flag.I2C_TX_End = 1;
  136. Flag.I2C_TX_Err = 1;
  137. }
  138. }
  139. /**
  140. * @brief This function handles TIM14 global interrupt.
  141. */
  142. void TIM14_IRQHandler(void)
  143. {
  144. if ((TIM14->SR & TIM_SR_UIF) != 0) {
  145. /* Update interrupt flag */
  146. TIM14->SR &= ~TIM_SR_UIF;
  147. /* enable channels */
  148. if (Flag.Blink_1 != 0) {
  149. TUBE_A_ON;
  150. }
  151. if (Flag.Blink_2 != 0) {
  152. TUBE_B_ON;
  153. }
  154. if (Flag.Blink_3 != 0) {
  155. TUBE_C_ON;
  156. }
  157. if (Flag.Blink_4 != 0) {
  158. TUBE_D_ON;
  159. }
  160. if (Flag.Blink_5 != 0) {
  161. TUBE_E_ON;
  162. }
  163. }
  164. if ((TIM14->SR & TIM_SR_CC1IF) != 0) {
  165. /* Capture/Compare Interrupt flag */
  166. TIM14->SR &= ~TIM_SR_CC1IF;
  167. /* disable unneeded channel */
  168. if (Flag.Blink_1 != 0) {
  169. TUBE_A_OFF;
  170. }
  171. if (Flag.Blink_2 != 0) {
  172. TUBE_B_OFF;
  173. }
  174. if (Flag.Blink_3 != 0) {
  175. TUBE_C_OFF;
  176. }
  177. if (Flag.Blink_4 != 0) {
  178. TUBE_D_OFF;
  179. }
  180. if (Flag.Blink_5 != 0) {
  181. TUBE_E_OFF;
  182. }
  183. }
  184. }
  185. /**
  186. * @brief This function handles TIM16 global interrupt.
  187. */
  188. #define STOP_FADE_TIME 20
  189. void TIM16_IRQHandler(void)
  190. {
  191. static in15_pin_t sym_old = sym_Off;
  192. static uint8_t ph = 0;
  193. static uint8_t on = 0;
  194. static uint8_t cnt = 0;
  195. if ((TIM16->SR & TIM_SR_UIF) != 0) {
  196. /* Clear interrupt flag */
  197. TIM16->SR = 0;
  198. if (SymbolIN15 != sym_None) {
  199. if (cnt > 0) {
  200. cnt --;
  201. } else {
  202. if (ph == 0) {
  203. ph = 1;
  204. GPIOA->BSRR = SymbolIN15;
  205. if (on < STOP_FADE_TIME) {
  206. on += 2;
  207. cnt = on;
  208. } else {
  209. ph = 0; on = 0; cnt = 0;
  210. sym_old = SymbolIN15;
  211. SymbolIN15 = sym_None;
  212. }
  213. } else {
  214. ph = 0;
  215. GPIOA->BSRR = sym_old;
  216. cnt = STOP_FADE_TIME - on;
  217. }
  218. } /* cnt == 0 */
  219. } /* SymbolIN15 not empty */
  220. }
  221. }
  222. /**
  223. * @brief This function handles TIM17 global interrupt.
  224. */
  225. void TIM17_IRQHandler(void)
  226. {
  227. if ((TIM17->SR & TIM_SR_UIF) != 0) {
  228. /* Update interrupt flag */
  229. TIM17->SR = 0;
  230. }
  231. }
  232. /**
  233. * @brief This function handles SPI1 global interrupt.
  234. */
  235. void SPI1_IRQHandler(void)
  236. {
  237. }
  238. /**
  239. * @brief This function handles USART1 global interrupt / USART1 wake-up interrupt through EXTI line 25.
  240. */
  241. void USART1_IRQHandler(void)
  242. {
  243. }
  244. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/