/**
******************************************************************************
* @file stm32g0xx_it.c
* @brief Interrupt Service Routines.
******************************************************************************
* @attention
*
*
© Copyright (c) 2021 STMicroelectronics.
* All rights reserved.
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
#include "main.h"
#include "stm32g0xx_it.h"
/* Private includes ----------------------------------------------------------*/
/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private function prototypes -----------------------------------------------*/
/* Private user code ---------------------------------------------------------*/
/* External variables --------------------------------------------------------*/
extern volatile in15_pin_t SymbolIN15;
/******************************************************************************/
/* Cortex-M0+ Processor Interruption and Exception Handlers */
/******************************************************************************/
/**
* @brief This function handles Non maskable interrupt.
*/
void NMI_Handler(void)
{
while (1)
{
}
}
/**
* @brief This function handles Hard fault interrupt.
*/
void HardFault_Handler(void)
{
// tube power off
TIM1->CCER &= ~(TIM_CCER_CC1E);
TIM3->CCER &= ~(TIM_CCER_CC4E);
TIM3->CCER &= ~(TIM_CCER_CC3E);
TIM3->CCER &= ~(TIM_CCER_CC2E);
TIM3->CCER &= ~(TIM_CCER_CC1E);
GPIOA->BSRR = 0x10;
// red led
TIM1->CCR2 = 0xff; TIM1->CCR3 = 0; TIM1->CCR4 = 0;
while (1)
{
}
}
/**
* @brief This function handles System service call via SWI instruction.
*/
void SVC_Handler(void)
{
}
/**
* @brief This function handles Pendable request for system service.
*/
void PendSV_Handler(void)
{
}
/******************************************************************************/
/* STM32G0xx Peripheral Interrupt Handlers */
/* Add here the Interrupt Handlers for the used peripherals. */
/* For the available peripheral interrupt handler names, */
/* please refer to the startup file (startup_stm32g0xx.s). */
/******************************************************************************/
/**
* @brief This function handles EXTI line 4 to 15 interrupts.
*/
void EXTI4_15_IRQHandler(void)
{
if ((EXTI->FPR1 & EXTI_IMR1_IM14) != 0)
{
EXTI->FPR1 = EXTI_IMR1_IM14;
Flag.RTC_IRQ = 1;
ES_PlaceEvent(evNewSecond);
}
}
/**
* @brief This function handles DMA1 channel 1 interrupt.
*/
void DMA1_Channel1_IRQHandler(void)
{
if ((DMA1->ISR & DMA_IFCR_CTCIF1) != 0) {
DMA1->IFCR |= DMA_IFCR_CTCIF1; // reset IRQ flag
Flag.SPI_TX_End = 1;
/* Stop SPI-DMA transfer */
DMA1_Channel1->CCR &= ~DMA_CCR_EN;
/* Wait for end SPI transmit */
LATCH_DOWN;
while ((SPI1->SR & SPI_SR_FTLVL) != 0);
while ((SPI1->SR & SPI_SR_BSY) != 0);
LATCH_UP;
}
}
/**
* @brief This function handles DMA1 channel 2 and channel 3 interrupts.
*/
void DMA1_Channel2_3_IRQHandler(void)
{
if ((DMA1->ISR & DMA_ISR_TCIF2) != 0) {
/* reset IRQ flag */
DMA1->IFCR |= DMA_IFCR_CTCIF2;
/* Disable DMA channels for I2C RX */
DMA1_Channel2->CCR &= ~DMA_CCR_EN;
Flag.I2C_RX_End = 1;
}
if ((DMA1->ISR & DMA_ISR_TEIF2) != 0) {
DMA1->IFCR |= DMA_IFCR_CTEIF2;
DMA1_Channel2->CCR &= ~DMA_CCR_EN;
Flag.I2C_RX_End = 1;
Flag.I2C_RX_Err = 1;
}
if ((DMA1->ISR & DMA_ISR_TCIF3) != 0) {
/* reset IRQ flag */
DMA1->IFCR |= DMA_IFCR_CTCIF3;
/* Disable DMA channels for I2C TX */
DMA1_Channel3->CCR &= ~DMA_CCR_EN;
Flag.I2C_TX_End = 1;
}
if ((DMA1->ISR & DMA_ISR_TEIF3) != 0) {
DMA1->IFCR |= DMA_IFCR_CTEIF3;
DMA1_Channel3->CCR &= ~DMA_CCR_EN;
Flag.I2C_TX_End = 1;
Flag.I2C_TX_Err = 1;
}
}
/**
* @brief This function handles TIM14 global interrupt.
*/
void TIM14_IRQHandler(void)
{
if ((TIM14->SR & TIM_SR_UIF) != 0) {
/* Update interrupt flag */
TIM14->SR &= ~TIM_SR_UIF;
/* enable channels */
if (Flag.Blink_1 != 0) {
TUBE_A_ON;
}
if (Flag.Blink_2 != 0) {
TUBE_B_ON;
}
if (Flag.Blink_3 != 0) {
TUBE_C_ON;
}
if (Flag.Blink_4 != 0) {
TUBE_D_ON;
}
if (Flag.Blink_5 != 0) {
TUBE_E_ON;
}
}
if ((TIM14->SR & TIM_SR_CC1IF) != 0) {
/* Capture/Compare Interrupt flag */
TIM14->SR &= ~TIM_SR_CC1IF;
/* disable unneeded channel */
if (Flag.Blink_1 != 0) {
TUBE_A_OFF;
}
if (Flag.Blink_2 != 0) {
TUBE_B_OFF;
}
if (Flag.Blink_3 != 0) {
TUBE_C_OFF;
}
if (Flag.Blink_4 != 0) {
TUBE_D_OFF;
}
if (Flag.Blink_5 != 0) {
TUBE_E_OFF;
}
}
}
/**
* @brief This function handles TIM16 global interrupt.
*/
#define STOP_FADE_TIME 20
void TIM16_IRQHandler(void)
{
static in15_pin_t sym_old = sym_Off;
static uint8_t ph = 0;
static uint8_t on = 0;
static uint8_t cnt = 0;
if ((TIM16->SR & TIM_SR_UIF) != 0) {
/* Clear interrupt flag */
TIM16->SR = 0;
if (SymbolIN15 != sym_None) {
if (cnt > 0) {
cnt --;
} else {
if (ph == 0) {
ph = 1;
GPIOA->BSRR = SymbolIN15;
if (on < STOP_FADE_TIME) {
on += 2;
cnt = on;
} else {
ph = 0; on = 0; cnt = 0;
sym_old = SymbolIN15;
SymbolIN15 = sym_None;
}
} else {
ph = 0;
GPIOA->BSRR = sym_old;
cnt = STOP_FADE_TIME - on;
}
} /* cnt == 0 */
} /* SymbolIN15 not empty */
}
}
/**
* @brief This function handles TIM17 global interrupt.
*/
void TIM17_IRQHandler(void)
{
if ((TIM17->SR & TIM_SR_UIF) != 0) {
/* Update interrupt flag */
TIM17->SR = 0;
}
}
/**
* @brief This function handles SPI1 global interrupt.
*/
void SPI1_IRQHandler(void)
{
}
/**
* @brief This function handles USART1 global interrupt / USART1 wake-up interrupt through EXTI line 25.
*/
void USART1_IRQHandler(void)
{
}
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/