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@@ -69,38 +69,46 @@ typedef struct
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uint32_t PeripheralMode; /*!< Specifies the peripheral mode.
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This parameter can be a value of @ref I2C_LL_EC_PERIPHERAL_MODE.
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- This feature can be modified afterwards using unitary function @ref LL_I2C_SetMode(). */
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+ This feature can be modified afterwards using unitary function
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+ @ref LL_I2C_SetMode(). */
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uint32_t Timing; /*!< Specifies the SDA setup, hold time and the SCL high, low period values.
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This parameter must be set by referring to the STM32CubeMX Tool and
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the helper macro @ref __LL_I2C_CONVERT_TIMINGS().
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- This feature can be modified afterwards using unitary function @ref LL_I2C_SetTiming(). */
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+ This feature can be modified afterwards using unitary function
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+ @ref LL_I2C_SetTiming(). */
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uint32_t AnalogFilter; /*!< Enables or disables analog noise filter.
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This parameter can be a value of @ref I2C_LL_EC_ANALOGFILTER_SELECTION.
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- This feature can be modified afterwards using unitary functions @ref LL_I2C_EnableAnalogFilter() or LL_I2C_DisableAnalogFilter(). */
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+ This feature can be modified afterwards using unitary functions
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+ @ref LL_I2C_EnableAnalogFilter() or LL_I2C_DisableAnalogFilter(). */
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uint32_t DigitalFilter; /*!< Configures the digital noise filter.
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This parameter can be a number between Min_Data = 0x00 and Max_Data = 0x0F.
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- This feature can be modified afterwards using unitary function @ref LL_I2C_SetDigitalFilter(). */
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+ This feature can be modified afterwards using unitary function
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+ @ref LL_I2C_SetDigitalFilter(). */
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uint32_t OwnAddress1; /*!< Specifies the device own address 1.
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This parameter must be a value between Min_Data = 0x00 and Max_Data = 0x3FF.
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- This feature can be modified afterwards using unitary function @ref LL_I2C_SetOwnAddress1(). */
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+ This feature can be modified afterwards using unitary function
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+ @ref LL_I2C_SetOwnAddress1(). */
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- uint32_t TypeAcknowledge; /*!< Specifies the ACKnowledge or Non ACKnowledge condition after the address receive match code or next received byte.
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+ uint32_t TypeAcknowledge; /*!< Specifies the ACKnowledge or Non ACKnowledge condition after the address receive
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+ match code or next received byte.
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This parameter can be a value of @ref I2C_LL_EC_I2C_ACKNOWLEDGE.
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- This feature can be modified afterwards using unitary function @ref LL_I2C_AcknowledgeNextData(). */
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+ This feature can be modified afterwards using unitary function
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+ @ref LL_I2C_AcknowledgeNextData(). */
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uint32_t OwnAddrSize; /*!< Specifies the device own address 1 size (7-bit or 10-bit).
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This parameter can be a value of @ref I2C_LL_EC_OWNADDRESS1.
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- This feature can be modified afterwards using unitary function @ref LL_I2C_SetOwnAddress1(). */
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+ This feature can be modified afterwards using unitary function
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+ @ref LL_I2C_SetOwnAddress1(). */
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} LL_I2C_InitTypeDef;
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/**
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* @}
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@@ -170,10 +178,11 @@ typedef struct
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/** @defgroup I2C_LL_EC_PERIPHERAL_MODE Peripheral Mode
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* @{
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*/
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-#define LL_I2C_MODE_I2C 0x00000000U /*!< I2C Master or Slave mode */
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-#define LL_I2C_MODE_SMBUS_HOST I2C_CR1_SMBHEN /*!< SMBus Host address acknowledge */
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-#define LL_I2C_MODE_SMBUS_DEVICE 0x00000000U /*!< SMBus Device default mode (Default address not acknowledge) */
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-#define LL_I2C_MODE_SMBUS_DEVICE_ARP I2C_CR1_SMBDEN /*!< SMBus Device Default address acknowledge */
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+#define LL_I2C_MODE_I2C 0x00000000U /*!< I2C Master or Slave mode */
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+#define LL_I2C_MODE_SMBUS_HOST I2C_CR1_SMBHEN /*!< SMBus Host address acknowledge */
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+#define LL_I2C_MODE_SMBUS_DEVICE 0x00000000U /*!< SMBus Device default mode
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+ (Default address not acknowledge) */
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+#define LL_I2C_MODE_SMBUS_DEVICE_ARP I2C_CR1_SMBDEN /*!< SMBus Device Default address acknowledge */
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/**
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* @}
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*/
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@@ -208,14 +217,15 @@ typedef struct
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/** @defgroup I2C_LL_EC_OWNADDRESS2 Own Address 2 Masks
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* @{
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*/
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-#define LL_I2C_OWNADDRESS2_NOMASK I2C_OAR2_OA2NOMASK /*!< Own Address2 No mask. */
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-#define LL_I2C_OWNADDRESS2_MASK01 I2C_OAR2_OA2MASK01 /*!< Only Address2 bits[7:2] are compared. */
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-#define LL_I2C_OWNADDRESS2_MASK02 I2C_OAR2_OA2MASK02 /*!< Only Address2 bits[7:3] are compared. */
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-#define LL_I2C_OWNADDRESS2_MASK03 I2C_OAR2_OA2MASK03 /*!< Only Address2 bits[7:4] are compared. */
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-#define LL_I2C_OWNADDRESS2_MASK04 I2C_OAR2_OA2MASK04 /*!< Only Address2 bits[7:5] are compared. */
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-#define LL_I2C_OWNADDRESS2_MASK05 I2C_OAR2_OA2MASK05 /*!< Only Address2 bits[7:6] are compared. */
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-#define LL_I2C_OWNADDRESS2_MASK06 I2C_OAR2_OA2MASK06 /*!< Only Address2 bits[7] are compared. */
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-#define LL_I2C_OWNADDRESS2_MASK07 I2C_OAR2_OA2MASK07 /*!< No comparison is done. All Address2 are acknowledged.*/
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+#define LL_I2C_OWNADDRESS2_NOMASK I2C_OAR2_OA2NOMASK /*!< Own Address2 No mask. */
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+#define LL_I2C_OWNADDRESS2_MASK01 I2C_OAR2_OA2MASK01 /*!< Only Address2 bits[7:2] are compared. */
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+#define LL_I2C_OWNADDRESS2_MASK02 I2C_OAR2_OA2MASK02 /*!< Only Address2 bits[7:3] are compared. */
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+#define LL_I2C_OWNADDRESS2_MASK03 I2C_OAR2_OA2MASK03 /*!< Only Address2 bits[7:4] are compared. */
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+#define LL_I2C_OWNADDRESS2_MASK04 I2C_OAR2_OA2MASK04 /*!< Only Address2 bits[7:5] are compared. */
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+#define LL_I2C_OWNADDRESS2_MASK05 I2C_OAR2_OA2MASK05 /*!< Only Address2 bits[7:6] are compared. */
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+#define LL_I2C_OWNADDRESS2_MASK06 I2C_OAR2_OA2MASK06 /*!< Only Address2 bits[7] are compared. */
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+#define LL_I2C_OWNADDRESS2_MASK07 I2C_OAR2_OA2MASK07 /*!< No comparison is done.
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+ All Address2 are acknowledged. */
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/**
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* @}
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*/
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@@ -250,14 +260,21 @@ typedef struct
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/** @defgroup I2C_LL_EC_MODE Transfer End Mode
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* @{
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*/
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-#define LL_I2C_MODE_RELOAD I2C_CR2_RELOAD /*!< Enable I2C Reload mode. */
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-#define LL_I2C_MODE_AUTOEND I2C_CR2_AUTOEND /*!< Enable I2C Automatic end mode with no HW PEC comparison. */
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-#define LL_I2C_MODE_SOFTEND 0x00000000U /*!< Enable I2C Software end mode with no HW PEC comparison. */
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-#define LL_I2C_MODE_SMBUS_RELOAD LL_I2C_MODE_RELOAD /*!< Enable SMBUS Automatic end mode with HW PEC comparison. */
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-#define LL_I2C_MODE_SMBUS_AUTOEND_NO_PEC LL_I2C_MODE_AUTOEND /*!< Enable SMBUS Automatic end mode with HW PEC comparison. */
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-#define LL_I2C_MODE_SMBUS_SOFTEND_NO_PEC LL_I2C_MODE_SOFTEND /*!< Enable SMBUS Software end mode with HW PEC comparison. */
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-#define LL_I2C_MODE_SMBUS_AUTOEND_WITH_PEC (uint32_t)(LL_I2C_MODE_AUTOEND | I2C_CR2_PECBYTE) /*!< Enable SMBUS Automatic end mode with HW PEC comparison. */
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-#define LL_I2C_MODE_SMBUS_SOFTEND_WITH_PEC (uint32_t)(LL_I2C_MODE_SOFTEND | I2C_CR2_PECBYTE) /*!< Enable SMBUS Software end mode with HW PEC comparison. */
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+#define LL_I2C_MODE_RELOAD I2C_CR2_RELOAD /*!< Enable I2C Reload mode. */
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+#define LL_I2C_MODE_AUTOEND I2C_CR2_AUTOEND /*!< Enable I2C Automatic end mode
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+ with no HW PEC comparison. */
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+#define LL_I2C_MODE_SOFTEND 0x00000000U /*!< Enable I2C Software end mode
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+ with no HW PEC comparison. */
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+#define LL_I2C_MODE_SMBUS_RELOAD LL_I2C_MODE_RELOAD /*!< Enable SMBUS Automatic end mode
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+ with HW PEC comparison. */
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+#define LL_I2C_MODE_SMBUS_AUTOEND_NO_PEC LL_I2C_MODE_AUTOEND /*!< Enable SMBUS Automatic end mode
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+ with HW PEC comparison. */
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+#define LL_I2C_MODE_SMBUS_SOFTEND_NO_PEC LL_I2C_MODE_SOFTEND /*!< Enable SMBUS Software end mode
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+ with HW PEC comparison. */
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+#define LL_I2C_MODE_SMBUS_AUTOEND_WITH_PEC (uint32_t)(LL_I2C_MODE_AUTOEND | I2C_CR2_PECBYTE)
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+/*!< Enable SMBUS Automatic end mode with HW PEC comparison. */
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+#define LL_I2C_MODE_SMBUS_SOFTEND_WITH_PEC (uint32_t)(LL_I2C_MODE_SOFTEND | I2C_CR2_PECBYTE)
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+/*!< Enable SMBUS Software end mode with HW PEC comparison. */
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/**
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* @}
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*/
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@@ -265,14 +282,23 @@ typedef struct
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/** @defgroup I2C_LL_EC_GENERATE Start And Stop Generation
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* @{
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*/
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-#define LL_I2C_GENERATE_NOSTARTSTOP 0x00000000U /*!< Don't Generate Stop and Start condition. */
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-#define LL_I2C_GENERATE_STOP (uint32_t)(0x80000000U | I2C_CR2_STOP) /*!< Generate Stop condition (Size should be set to 0). */
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-#define LL_I2C_GENERATE_START_READ (uint32_t)(0x80000000U | I2C_CR2_START | I2C_CR2_RD_WRN) /*!< Generate Start for read request. */
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-#define LL_I2C_GENERATE_START_WRITE (uint32_t)(0x80000000U | I2C_CR2_START) /*!< Generate Start for write request. */
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-#define LL_I2C_GENERATE_RESTART_7BIT_READ (uint32_t)(0x80000000U | I2C_CR2_START | I2C_CR2_RD_WRN) /*!< Generate Restart for read request, slave 7Bit address. */
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-#define LL_I2C_GENERATE_RESTART_7BIT_WRITE (uint32_t)(0x80000000U | I2C_CR2_START) /*!< Generate Restart for write request, slave 7Bit address. */
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-#define LL_I2C_GENERATE_RESTART_10BIT_READ (uint32_t)(0x80000000U | I2C_CR2_START | I2C_CR2_RD_WRN | I2C_CR2_HEAD10R) /*!< Generate Restart for read request, slave 10Bit address. */
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-#define LL_I2C_GENERATE_RESTART_10BIT_WRITE (uint32_t)(0x80000000U | I2C_CR2_START) /*!< Generate Restart for write request, slave 10Bit address.*/
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+#define LL_I2C_GENERATE_NOSTARTSTOP 0x00000000U
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+/*!< Don't Generate Stop and Start condition. */
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+#define LL_I2C_GENERATE_STOP (uint32_t)(0x80000000U | I2C_CR2_STOP)
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+/*!< Generate Stop condition (Size should be set to 0). */
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+#define LL_I2C_GENERATE_START_READ (uint32_t)(0x80000000U | I2C_CR2_START | I2C_CR2_RD_WRN)
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+/*!< Generate Start for read request. */
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+#define LL_I2C_GENERATE_START_WRITE (uint32_t)(0x80000000U | I2C_CR2_START)
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+/*!< Generate Start for write request. */
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+#define LL_I2C_GENERATE_RESTART_7BIT_READ (uint32_t)(0x80000000U | I2C_CR2_START | I2C_CR2_RD_WRN)
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+/*!< Generate Restart for read request, slave 7Bit address. */
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+#define LL_I2C_GENERATE_RESTART_7BIT_WRITE (uint32_t)(0x80000000U | I2C_CR2_START)
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+/*!< Generate Restart for write request, slave 7Bit address. */
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+#define LL_I2C_GENERATE_RESTART_10BIT_READ (uint32_t)(0x80000000U | I2C_CR2_START | \
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+ I2C_CR2_RD_WRN | I2C_CR2_HEAD10R)
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+/*!< Generate Restart for read request, slave 10Bit address. */
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+#define LL_I2C_GENERATE_RESTART_10BIT_WRITE (uint32_t)(0x80000000U | I2C_CR2_START)
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+/*!< Generate Restart for write request, slave 10Bit address.*/
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/**
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* @}
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*/
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@@ -280,8 +306,10 @@ typedef struct
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/** @defgroup I2C_LL_EC_DIRECTION Read Write Direction
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* @{
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*/
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-#define LL_I2C_DIRECTION_WRITE 0x00000000U /*!< Write transfer request by master, slave enters receiver mode. */
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-#define LL_I2C_DIRECTION_READ I2C_ISR_DIR /*!< Read transfer request by master, slave enters transmitter mode.*/
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+#define LL_I2C_DIRECTION_WRITE 0x00000000U /*!< Write transfer request by master,
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+ slave enters receiver mode. */
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+#define LL_I2C_DIRECTION_READ I2C_ISR_DIR /*!< Read transfer request by master,
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+ slave enters transmitter mode.*/
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/**
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* @}
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*/
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@@ -289,8 +317,10 @@ typedef struct
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/** @defgroup I2C_LL_EC_DMA_REG_DATA DMA Register Data
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* @{
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*/
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-#define LL_I2C_DMA_REG_DATA_TRANSMIT 0x00000000U /*!< Get address of data register used for transmission */
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-#define LL_I2C_DMA_REG_DATA_RECEIVE 0x00000001U /*!< Get address of data register used for reception */
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+#define LL_I2C_DMA_REG_DATA_TRANSMIT 0x00000000U /*!< Get address of data register used for
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+ transmission */
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+#define LL_I2C_DMA_REG_DATA_RECEIVE 0x00000001U /*!< Get address of data register used for
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+ reception */
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/**
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* @}
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*/
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@@ -298,8 +328,10 @@ typedef struct
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/** @defgroup I2C_LL_EC_SMBUS_TIMEOUTA_MODE SMBus TimeoutA Mode SCL SDA Timeout
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* @{
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*/
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-#define LL_I2C_SMBUS_TIMEOUTA_MODE_SCL_LOW 0x00000000U /*!< TimeoutA is used to detect SCL low level timeout. */
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-#define LL_I2C_SMBUS_TIMEOUTA_MODE_SDA_SCL_HIGH I2C_TIMEOUTR_TIDLE /*!< TimeoutA is used to detect both SCL and SDA high level timeout.*/
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+#define LL_I2C_SMBUS_TIMEOUTA_MODE_SCL_LOW 0x00000000U /*!< TimeoutA is used to detect
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+ SCL low level timeout. */
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+#define LL_I2C_SMBUS_TIMEOUTA_MODE_SDA_SCL_HIGH I2C_TIMEOUTR_TIDLE /*!< TimeoutA is used to detect
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+ both SCL and SDA high level timeout.*/
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/**
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* @}
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*/
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@@ -307,9 +339,12 @@ typedef struct
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/** @defgroup I2C_LL_EC_SMBUS_TIMEOUT_SELECTION SMBus Timeout Selection
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* @{
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*/
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-#define LL_I2C_SMBUS_TIMEOUTA I2C_TIMEOUTR_TIMOUTEN /*!< TimeoutA enable bit */
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-#define LL_I2C_SMBUS_TIMEOUTB I2C_TIMEOUTR_TEXTEN /*!< TimeoutB (extended clock) enable bit */
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-#define LL_I2C_SMBUS_ALL_TIMEOUT (uint32_t)(I2C_TIMEOUTR_TIMOUTEN | I2C_TIMEOUTR_TEXTEN) /*!< TimeoutA and TimeoutB (extended clock) enable bits */
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+#define LL_I2C_SMBUS_TIMEOUTA I2C_TIMEOUTR_TIMOUTEN /*!< TimeoutA enable bit */
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+#define LL_I2C_SMBUS_TIMEOUTB I2C_TIMEOUTR_TEXTEN /*!< TimeoutB (extended clock)
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+ enable bit */
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+#define LL_I2C_SMBUS_ALL_TIMEOUT (uint32_t)(I2C_TIMEOUTR_TIMOUTEN | \
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+ I2C_TIMEOUTR_TEXTEN) /*!< TimeoutA and TimeoutB
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+(extended clock) enable bits */
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/**
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* @}
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*/
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@@ -353,18 +388,22 @@ typedef struct
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/**
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* @brief Configure the SDA setup, hold time and the SCL high, low period.
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* @param __PRESCALER__ This parameter must be a value between Min_Data=0 and Max_Data=0xF.
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- * @param __DATA_SETUP_TIME__ This parameter must be a value between Min_Data=0 and Max_Data=0xF. (tscldel = (SCLDEL+1)xtpresc)
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- * @param __DATA_HOLD_TIME__ This parameter must be a value between Min_Data=0 and Max_Data=0xF. (tsdadel = SDADELxtpresc)
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- * @param __CLOCK_HIGH_PERIOD__ This parameter must be a value between Min_Data=0 and Max_Data=0xFF. (tsclh = (SCLH+1)xtpresc)
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- * @param __CLOCK_LOW_PERIOD__ This parameter must be a value between Min_Data=0 and Max_Data=0xFF. (tscll = (SCLL+1)xtpresc)
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+ * @param __SETUP_TIME__ This parameter must be a value between Min_Data=0 and Max_Data=0xF.
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+ (tscldel = (SCLDEL+1)xtpresc)
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+ * @param __HOLD_TIME__ This parameter must be a value between Min_Data=0 and Max_Data=0xF.
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+ (tsdadel = SDADELxtpresc)
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+ * @param __SCLH_PERIOD__ This parameter must be a value between Min_Data=0 and Max_Data=0xFF.
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+ (tsclh = (SCLH+1)xtpresc)
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+ * @param __SCLL_PERIOD__ This parameter must be a value between Min_Data=0 and Max_Data=0xFF.
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+ (tscll = (SCLL+1)xtpresc)
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* @retval Value between Min_Data=0 and Max_Data=0xFFFFFFFF
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*/
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-#define __LL_I2C_CONVERT_TIMINGS(__PRESCALER__, __DATA_SETUP_TIME__, __DATA_HOLD_TIME__, __CLOCK_HIGH_PERIOD__, __CLOCK_LOW_PERIOD__) \
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- ((((uint32_t)(__PRESCALER__) << I2C_TIMINGR_PRESC_Pos) & I2C_TIMINGR_PRESC) | \
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- (((uint32_t)(__DATA_SETUP_TIME__) << I2C_TIMINGR_SCLDEL_Pos) & I2C_TIMINGR_SCLDEL) | \
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- (((uint32_t)(__DATA_HOLD_TIME__) << I2C_TIMINGR_SDADEL_Pos) & I2C_TIMINGR_SDADEL) | \
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- (((uint32_t)(__CLOCK_HIGH_PERIOD__) << I2C_TIMINGR_SCLH_Pos) & I2C_TIMINGR_SCLH) | \
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- (((uint32_t)(__CLOCK_LOW_PERIOD__) << I2C_TIMINGR_SCLL_Pos) & I2C_TIMINGR_SCLL))
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+#define __LL_I2C_CONVERT_TIMINGS(__PRESCALER__, __SETUP_TIME__, __HOLD_TIME__, __SCLH_PERIOD__, __SCLL_PERIOD__) \
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+ ((((uint32_t)(__PRESCALER__) << I2C_TIMINGR_PRESC_Pos) & I2C_TIMINGR_PRESC) | \
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+ (((uint32_t)(__SETUP_TIME__) << I2C_TIMINGR_SCLDEL_Pos) & I2C_TIMINGR_SCLDEL) | \
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+ (((uint32_t)(__HOLD_TIME__) << I2C_TIMINGR_SDADEL_Pos) & I2C_TIMINGR_SDADEL) | \
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+ (((uint32_t)(__SCLH_PERIOD__) << I2C_TIMINGR_SCLH_Pos) & I2C_TIMINGR_SCLH) | \
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+ (((uint32_t)(__SCLL_PERIOD__) << I2C_TIMINGR_SCLL_Pos) & I2C_TIMINGR_SCLL))
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/**
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* @}
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*/
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@@ -428,7 +467,8 @@ __STATIC_INLINE uint32_t LL_I2C_IsEnabled(I2C_TypeDef *I2Cx)
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* @param AnalogFilter This parameter can be one of the following values:
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* @arg @ref LL_I2C_ANALOGFILTER_ENABLE
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* @arg @ref LL_I2C_ANALOGFILTER_DISABLE
|
|
|
- * @param DigitalFilter This parameter must be a value between Min_Data=0x00 (Digital filter disabled) and Max_Data=0x0F (Digital filter enabled and filtering capability up to 15*ti2cclk).
|
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|
+ * @param DigitalFilter This parameter must be a value between Min_Data=0x00 (Digital filter disabled)
|
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|
+ and Max_Data=0x0F (Digital filter enabled and filtering capability up to 15*ti2cclk).
|
|
|
* This parameter is used to configure the digital noise filter on SDA and SCL input.
|
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|
* The digital filter will filter spikes with a length of up to DNF[3:0]*ti2cclk.
|
|
|
* @retval None
|
|
|
@@ -444,7 +484,8 @@ __STATIC_INLINE void LL_I2C_ConfigFilters(I2C_TypeDef *I2Cx, uint32_t AnalogFilt
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|
* This filter can only be programmed when the I2C is disabled (PE = 0).
|
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|
* @rmtoll CR1 DNF LL_I2C_SetDigitalFilter
|
|
|
* @param I2Cx I2C Instance.
|
|
|
- * @param DigitalFilter This parameter must be a value between Min_Data=0x00 (Digital filter disabled) and Max_Data=0x0F (Digital filter enabled and filtering capability up to 15*ti2cclk).
|
|
|
+ * @param DigitalFilter This parameter must be a value between Min_Data=0x00 (Digital filter disabled)
|
|
|
+ and Max_Data=0x0F (Digital filter enabled and filtering capability up to 15*ti2cclk).
|
|
|
* This parameter is used to configure the digital noise filter on SDA and SCL input.
|
|
|
* The digital filter will filter spikes with a length of up to DNF[3:0]*ti2cclk.
|
|
|
* @retval None
|
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|
@@ -583,12 +624,12 @@ __STATIC_INLINE uint32_t LL_I2C_DMA_GetRegAddr(I2C_TypeDef *I2Cx, uint32_t Direc
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|
if (Direction == LL_I2C_DMA_REG_DATA_TRANSMIT)
|
|
|
{
|
|
|
/* return address of TXDR register */
|
|
|
- data_reg_addr = (uint32_t) & (I2Cx->TXDR);
|
|
|
+ data_reg_addr = (uint32_t) &(I2Cx->TXDR);
|
|
|
}
|
|
|
else
|
|
|
{
|
|
|
/* return address of RXDR register */
|
|
|
- data_reg_addr = (uint32_t) & (I2Cx->RXDR);
|
|
|
+ data_reg_addr = (uint32_t) &(I2Cx->RXDR);
|
|
|
}
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|
|
|
|
|
return data_reg_addr;
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|
@@ -664,7 +705,7 @@ __STATIC_INLINE uint32_t LL_I2C_IsEnabledSlaveByteControl(I2C_TypeDef *I2Cx)
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|
|
|
|
/**
|
|
|
* @brief Enable Wakeup from STOP.
|
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|
- * @note Macro IS_I2C_WAKEUP_FROMSTOP_INSTANCE(I2Cx) can be used to check whether or not
|
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|
+ * @note The macro IS_I2C_WAKEUP_FROMSTOP_INSTANCE(I2Cx) can be used to check whether or not
|
|
|
* WakeUpFromStop feature is supported by the I2Cx Instance.
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|
|
* @note This bit can only be programmed when Digital Filter is disabled.
|
|
|
* @rmtoll CR1 WUPEN LL_I2C_EnableWakeUpFromStop
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|
@@ -678,7 +719,7 @@ __STATIC_INLINE void LL_I2C_EnableWakeUpFromStop(I2C_TypeDef *I2Cx)
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|
|
|
|
/**
|
|
|
* @brief Disable Wakeup from STOP.
|
|
|
- * @note Macro IS_I2C_WAKEUP_FROMSTOP_INSTANCE(I2Cx) can be used to check whether or not
|
|
|
+ * @note The macro IS_I2C_WAKEUP_FROMSTOP_INSTANCE(I2Cx) can be used to check whether or not
|
|
|
* WakeUpFromStop feature is supported by the I2Cx Instance.
|
|
|
* @rmtoll CR1 WUPEN LL_I2C_DisableWakeUpFromStop
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|
|
* @param I2Cx I2C Instance.
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|
|
@@ -691,7 +732,7 @@ __STATIC_INLINE void LL_I2C_DisableWakeUpFromStop(I2C_TypeDef *I2Cx)
|
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|
|
|
|
/**
|
|
|
* @brief Check if Wakeup from STOP is enabled or disabled.
|
|
|
- * @note Macro IS_I2C_WAKEUP_FROMSTOP_INSTANCE(I2Cx) can be used to check whether or not
|
|
|
+ * @note The macro IS_I2C_WAKEUP_FROMSTOP_INSTANCE(I2Cx) can be used to check whether or not
|
|
|
* WakeUpFromStop feature is supported by the I2Cx Instance.
|
|
|
* @rmtoll CR1 WUPEN LL_I2C_IsEnabledWakeUpFromStop
|
|
|
* @param I2Cx I2C Instance.
|
|
|
@@ -941,7 +982,7 @@ __STATIC_INLINE uint32_t LL_I2C_GetDataSetupTime(I2C_TypeDef *I2Cx)
|
|
|
|
|
|
/**
|
|
|
* @brief Configure peripheral mode.
|
|
|
- * @note Macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
|
|
|
+ * @note The macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
|
|
|
* SMBus feature is supported by the I2Cx Instance.
|
|
|
* @rmtoll CR1 SMBHEN LL_I2C_SetMode\n
|
|
|
* CR1 SMBDEN LL_I2C_SetMode
|
|
|
@@ -960,7 +1001,7 @@ __STATIC_INLINE void LL_I2C_SetMode(I2C_TypeDef *I2Cx, uint32_t PeripheralMode)
|
|
|
|
|
|
/**
|
|
|
* @brief Get peripheral mode.
|
|
|
- * @note Macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
|
|
|
+ * @note The macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
|
|
|
* SMBus feature is supported by the I2Cx Instance.
|
|
|
* @rmtoll CR1 SMBHEN LL_I2C_GetMode\n
|
|
|
* CR1 SMBDEN LL_I2C_GetMode
|
|
|
@@ -978,7 +1019,7 @@ __STATIC_INLINE uint32_t LL_I2C_GetMode(I2C_TypeDef *I2Cx)
|
|
|
|
|
|
/**
|
|
|
* @brief Enable SMBus alert (Host or Device mode)
|
|
|
- * @note Macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
|
|
|
+ * @note The macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
|
|
|
* SMBus feature is supported by the I2Cx Instance.
|
|
|
* @note SMBus Device mode:
|
|
|
* - SMBus Alert pin is drived low and
|
|
|
@@ -996,7 +1037,7 @@ __STATIC_INLINE void LL_I2C_EnableSMBusAlert(I2C_TypeDef *I2Cx)
|
|
|
|
|
|
/**
|
|
|
* @brief Disable SMBus alert (Host or Device mode)
|
|
|
- * @note Macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
|
|
|
+ * @note The macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
|
|
|
* SMBus feature is supported by the I2Cx Instance.
|
|
|
* @note SMBus Device mode:
|
|
|
* - SMBus Alert pin is not drived (can be used as a standard GPIO) and
|
|
|
@@ -1014,7 +1055,7 @@ __STATIC_INLINE void LL_I2C_DisableSMBusAlert(I2C_TypeDef *I2Cx)
|
|
|
|
|
|
/**
|
|
|
* @brief Check if SMBus alert (Host or Device mode) is enabled or disabled.
|
|
|
- * @note Macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
|
|
|
+ * @note The macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
|
|
|
* SMBus feature is supported by the I2Cx Instance.
|
|
|
* @rmtoll CR1 ALERTEN LL_I2C_IsEnabledSMBusAlert
|
|
|
* @param I2Cx I2C Instance.
|
|
|
@@ -1027,7 +1068,7 @@ __STATIC_INLINE uint32_t LL_I2C_IsEnabledSMBusAlert(I2C_TypeDef *I2Cx)
|
|
|
|
|
|
/**
|
|
|
* @brief Enable SMBus Packet Error Calculation (PEC).
|
|
|
- * @note Macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
|
|
|
+ * @note The macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
|
|
|
* SMBus feature is supported by the I2Cx Instance.
|
|
|
* @rmtoll CR1 PECEN LL_I2C_EnableSMBusPEC
|
|
|
* @param I2Cx I2C Instance.
|
|
|
@@ -1040,7 +1081,7 @@ __STATIC_INLINE void LL_I2C_EnableSMBusPEC(I2C_TypeDef *I2Cx)
|
|
|
|
|
|
/**
|
|
|
* @brief Disable SMBus Packet Error Calculation (PEC).
|
|
|
- * @note Macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
|
|
|
+ * @note The macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
|
|
|
* SMBus feature is supported by the I2Cx Instance.
|
|
|
* @rmtoll CR1 PECEN LL_I2C_DisableSMBusPEC
|
|
|
* @param I2Cx I2C Instance.
|
|
|
@@ -1053,7 +1094,7 @@ __STATIC_INLINE void LL_I2C_DisableSMBusPEC(I2C_TypeDef *I2Cx)
|
|
|
|
|
|
/**
|
|
|
* @brief Check if SMBus Packet Error Calculation (PEC) is enabled or disabled.
|
|
|
- * @note Macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
|
|
|
+ * @note The macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
|
|
|
* SMBus feature is supported by the I2Cx Instance.
|
|
|
* @rmtoll CR1 PECEN LL_I2C_IsEnabledSMBusPEC
|
|
|
* @param I2Cx I2C Instance.
|
|
|
@@ -1066,7 +1107,7 @@ __STATIC_INLINE uint32_t LL_I2C_IsEnabledSMBusPEC(I2C_TypeDef *I2Cx)
|
|
|
|
|
|
/**
|
|
|
* @brief Configure the SMBus Clock Timeout.
|
|
|
- * @note Macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
|
|
|
+ * @note The macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
|
|
|
* SMBus feature is supported by the I2Cx Instance.
|
|
|
* @note This configuration can only be programmed when associated Timeout is disabled (TimeoutA and/orTimeoutB).
|
|
|
* @rmtoll TIMEOUTR TIMEOUTA LL_I2C_ConfigSMBusTimeout\n
|
|
|
@@ -1089,7 +1130,7 @@ __STATIC_INLINE void LL_I2C_ConfigSMBusTimeout(I2C_TypeDef *I2Cx, uint32_t Timeo
|
|
|
|
|
|
/**
|
|
|
* @brief Configure the SMBus Clock TimeoutA (SCL low timeout or SCL and SDA high timeout depends on TimeoutA mode).
|
|
|
- * @note Macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
|
|
|
+ * @note The macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
|
|
|
* SMBus feature is supported by the I2Cx Instance.
|
|
|
* @note These bits can only be programmed when TimeoutA is disabled.
|
|
|
* @rmtoll TIMEOUTR TIMEOUTA LL_I2C_SetSMBusTimeoutA
|
|
|
@@ -1104,7 +1145,7 @@ __STATIC_INLINE void LL_I2C_SetSMBusTimeoutA(I2C_TypeDef *I2Cx, uint32_t Timeout
|
|
|
|
|
|
/**
|
|
|
* @brief Get the SMBus Clock TimeoutA setting.
|
|
|
- * @note Macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
|
|
|
+ * @note The macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
|
|
|
* SMBus feature is supported by the I2Cx Instance.
|
|
|
* @rmtoll TIMEOUTR TIMEOUTA LL_I2C_GetSMBusTimeoutA
|
|
|
* @param I2Cx I2C Instance.
|
|
|
@@ -1117,7 +1158,7 @@ __STATIC_INLINE uint32_t LL_I2C_GetSMBusTimeoutA(I2C_TypeDef *I2Cx)
|
|
|
|
|
|
/**
|
|
|
* @brief Set the SMBus Clock TimeoutA mode.
|
|
|
- * @note Macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
|
|
|
+ * @note The macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
|
|
|
* SMBus feature is supported by the I2Cx Instance.
|
|
|
* @note This bit can only be programmed when TimeoutA is disabled.
|
|
|
* @rmtoll TIMEOUTR TIDLE LL_I2C_SetSMBusTimeoutAMode
|
|
|
@@ -1134,7 +1175,7 @@ __STATIC_INLINE void LL_I2C_SetSMBusTimeoutAMode(I2C_TypeDef *I2Cx, uint32_t Tim
|
|
|
|
|
|
/**
|
|
|
* @brief Get the SMBus Clock TimeoutA mode.
|
|
|
- * @note Macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
|
|
|
+ * @note The macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
|
|
|
* SMBus feature is supported by the I2Cx Instance.
|
|
|
* @rmtoll TIMEOUTR TIDLE LL_I2C_GetSMBusTimeoutAMode
|
|
|
* @param I2Cx I2C Instance.
|
|
|
@@ -1149,7 +1190,7 @@ __STATIC_INLINE uint32_t LL_I2C_GetSMBusTimeoutAMode(I2C_TypeDef *I2Cx)
|
|
|
|
|
|
/**
|
|
|
* @brief Configure the SMBus Extended Cumulative Clock TimeoutB (Master or Slave mode).
|
|
|
- * @note Macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
|
|
|
+ * @note The macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
|
|
|
* SMBus feature is supported by the I2Cx Instance.
|
|
|
* @note These bits can only be programmed when TimeoutB is disabled.
|
|
|
* @rmtoll TIMEOUTR TIMEOUTB LL_I2C_SetSMBusTimeoutB
|
|
|
@@ -1164,7 +1205,7 @@ __STATIC_INLINE void LL_I2C_SetSMBusTimeoutB(I2C_TypeDef *I2Cx, uint32_t Timeout
|
|
|
|
|
|
/**
|
|
|
* @brief Get the SMBus Extended Cumulative Clock TimeoutB setting.
|
|
|
- * @note Macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
|
|
|
+ * @note The macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
|
|
|
* SMBus feature is supported by the I2Cx Instance.
|
|
|
* @rmtoll TIMEOUTR TIMEOUTB LL_I2C_GetSMBusTimeoutB
|
|
|
* @param I2Cx I2C Instance.
|
|
|
@@ -1177,7 +1218,7 @@ __STATIC_INLINE uint32_t LL_I2C_GetSMBusTimeoutB(I2C_TypeDef *I2Cx)
|
|
|
|
|
|
/**
|
|
|
* @brief Enable the SMBus Clock Timeout.
|
|
|
- * @note Macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
|
|
|
+ * @note The macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
|
|
|
* SMBus feature is supported by the I2Cx Instance.
|
|
|
* @rmtoll TIMEOUTR TIMOUTEN LL_I2C_EnableSMBusTimeout\n
|
|
|
* TIMEOUTR TEXTEN LL_I2C_EnableSMBusTimeout
|
|
|
@@ -1195,7 +1236,7 @@ __STATIC_INLINE void LL_I2C_EnableSMBusTimeout(I2C_TypeDef *I2Cx, uint32_t Clock
|
|
|
|
|
|
/**
|
|
|
* @brief Disable the SMBus Clock Timeout.
|
|
|
- * @note Macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
|
|
|
+ * @note The macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
|
|
|
* SMBus feature is supported by the I2Cx Instance.
|
|
|
* @rmtoll TIMEOUTR TIMOUTEN LL_I2C_DisableSMBusTimeout\n
|
|
|
* TIMEOUTR TEXTEN LL_I2C_DisableSMBusTimeout
|
|
|
@@ -1213,7 +1254,7 @@ __STATIC_INLINE void LL_I2C_DisableSMBusTimeout(I2C_TypeDef *I2Cx, uint32_t Cloc
|
|
|
|
|
|
/**
|
|
|
* @brief Check if the SMBus Clock Timeout is enabled or disabled.
|
|
|
- * @note Macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
|
|
|
+ * @note The macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
|
|
|
* SMBus feature is supported by the I2Cx Instance.
|
|
|
* @rmtoll TIMEOUTR TIMOUTEN LL_I2C_IsEnabledSMBusTimeout\n
|
|
|
* TIMEOUTR TEXTEN LL_I2C_IsEnabledSMBusTimeout
|
|
|
@@ -1226,7 +1267,8 @@ __STATIC_INLINE void LL_I2C_DisableSMBusTimeout(I2C_TypeDef *I2Cx, uint32_t Cloc
|
|
|
*/
|
|
|
__STATIC_INLINE uint32_t LL_I2C_IsEnabledSMBusTimeout(I2C_TypeDef *I2Cx, uint32_t ClockTimeout)
|
|
|
{
|
|
|
- return ((READ_BIT(I2Cx->TIMEOUTR, (I2C_TIMEOUTR_TIMOUTEN | I2C_TIMEOUTR_TEXTEN)) == (ClockTimeout)) ? 1UL : 0UL);
|
|
|
+ return ((READ_BIT(I2Cx->TIMEOUTR, (I2C_TIMEOUTR_TIMOUTEN | I2C_TIMEOUTR_TEXTEN)) == \
|
|
|
+ (ClockTimeout)) ? 1UL : 0UL);
|
|
|
}
|
|
|
|
|
|
/**
|
|
|
@@ -1443,7 +1485,7 @@ __STATIC_INLINE uint32_t LL_I2C_IsEnabledIT_TC(I2C_TypeDef *I2Cx)
|
|
|
|
|
|
/**
|
|
|
* @brief Enable Error interrupts.
|
|
|
- * @note Macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
|
|
|
+ * @note The macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
|
|
|
* SMBus feature is supported by the I2Cx Instance.
|
|
|
* @note Any of these errors will generate interrupt :
|
|
|
* Arbitration Loss (ARLO)
|
|
|
@@ -1463,7 +1505,7 @@ __STATIC_INLINE void LL_I2C_EnableIT_ERR(I2C_TypeDef *I2Cx)
|
|
|
|
|
|
/**
|
|
|
* @brief Disable Error interrupts.
|
|
|
- * @note Macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
|
|
|
+ * @note The macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
|
|
|
* SMBus feature is supported by the I2Cx Instance.
|
|
|
* @note Any of these errors will generate interrupt :
|
|
|
* Arbitration Loss (ARLO)
|
|
|
@@ -1645,7 +1687,7 @@ __STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_OVR(I2C_TypeDef *I2Cx)
|
|
|
|
|
|
/**
|
|
|
* @brief Indicate the status of SMBus PEC error flag in reception.
|
|
|
- * @note Macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
|
|
|
+ * @note The macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
|
|
|
* SMBus feature is supported by the I2Cx Instance.
|
|
|
* @note RESET: Clear default value.
|
|
|
* SET: When the received PEC does not match with the PEC register content.
|
|
|
@@ -1660,7 +1702,7 @@ __STATIC_INLINE uint32_t LL_I2C_IsActiveSMBusFlag_PECERR(I2C_TypeDef *I2Cx)
|
|
|
|
|
|
/**
|
|
|
* @brief Indicate the status of SMBus Timeout detection flag.
|
|
|
- * @note Macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
|
|
|
+ * @note The macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
|
|
|
* SMBus feature is supported by the I2Cx Instance.
|
|
|
* @note RESET: Clear default value.
|
|
|
* SET: When a timeout or extended clock timeout occurs.
|
|
|
@@ -1675,7 +1717,7 @@ __STATIC_INLINE uint32_t LL_I2C_IsActiveSMBusFlag_TIMEOUT(I2C_TypeDef *I2Cx)
|
|
|
|
|
|
/**
|
|
|
* @brief Indicate the status of SMBus alert flag.
|
|
|
- * @note Macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
|
|
|
+ * @note The macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
|
|
|
* SMBus feature is supported by the I2Cx Instance.
|
|
|
* @note RESET: Clear default value.
|
|
|
* SET: When SMBus host configuration, SMBus alert enabled and
|
|
|
@@ -1782,7 +1824,7 @@ __STATIC_INLINE void LL_I2C_ClearFlag_OVR(I2C_TypeDef *I2Cx)
|
|
|
|
|
|
/**
|
|
|
* @brief Clear SMBus PEC error flag.
|
|
|
- * @note Macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
|
|
|
+ * @note The macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
|
|
|
* SMBus feature is supported by the I2Cx Instance.
|
|
|
* @rmtoll ICR PECCF LL_I2C_ClearSMBusFlag_PECERR
|
|
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* @param I2Cx I2C Instance.
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@@ -1795,7 +1837,7 @@ __STATIC_INLINE void LL_I2C_ClearSMBusFlag_PECERR(I2C_TypeDef *I2Cx)
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/**
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* @brief Clear SMBus Timeout detection flag.
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- * @note Macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
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+ * @note The macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
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* SMBus feature is supported by the I2Cx Instance.
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* @rmtoll ICR TIMOUTCF LL_I2C_ClearSMBusFlag_TIMEOUT
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* @param I2Cx I2C Instance.
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@@ -1808,7 +1850,7 @@ __STATIC_INLINE void LL_I2C_ClearSMBusFlag_TIMEOUT(I2C_TypeDef *I2Cx)
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/**
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* @brief Clear SMBus Alert flag.
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- * @note Macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
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+ * @note The macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
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* SMBus feature is supported by the I2Cx Instance.
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* @rmtoll ICR ALERTCF LL_I2C_ClearSMBusFlag_ALERT
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* @param I2Cx I2C Instance.
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@@ -1923,7 +1965,8 @@ __STATIC_INLINE uint32_t LL_I2C_GetTransferSize(I2C_TypeDef *I2Cx)
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}
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/**
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- * @brief Prepare the generation of a ACKnowledge or Non ACKnowledge condition after the address receive match code or next received byte.
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+ * @brief Prepare the generation of a ACKnowledge or Non ACKnowledge condition after the address receive match code
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+ or next received byte.
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* @note Usage in Slave mode only.
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* @rmtoll CR2 NACK LL_I2C_AcknowledgeNextData
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* @param I2Cx I2C Instance.
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@@ -1964,7 +2007,8 @@ __STATIC_INLINE void LL_I2C_GenerateStopCondition(I2C_TypeDef *I2Cx)
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/**
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* @brief Enable automatic RESTART Read request condition for 10bit address header (master mode).
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* @note The master sends the complete 10bit slave address read sequence :
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- * Start + 2 bytes 10bit address in Write direction + Restart + first 7 bits of 10bit address in Read direction.
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+ * Start + 2 bytes 10bit address in Write direction + Restart + first 7 bits of 10bit address
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+ in Read direction.
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* @rmtoll CR2 HEAD10R LL_I2C_EnableAuto10BitRead
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* @param I2Cx I2C Instance.
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* @retval None
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@@ -2090,7 +2134,9 @@ __STATIC_INLINE uint32_t LL_I2C_GetSlaveAddr(I2C_TypeDef *I2Cx)
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__STATIC_INLINE void LL_I2C_HandleTransfer(I2C_TypeDef *I2Cx, uint32_t SlaveAddr, uint32_t SlaveAddrSize,
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uint32_t TransferSize, uint32_t EndMode, uint32_t Request)
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{
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- MODIFY_REG(I2Cx->CR2, I2C_CR2_SADD | I2C_CR2_ADD10 | (I2C_CR2_RD_WRN & (uint32_t)(Request >> (31U - I2C_CR2_RD_WRN_Pos))) | I2C_CR2_START | I2C_CR2_STOP | I2C_CR2_RELOAD |
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+ MODIFY_REG(I2Cx->CR2, I2C_CR2_SADD | I2C_CR2_ADD10 |
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+ (I2C_CR2_RD_WRN & (uint32_t)(Request >> (31U - I2C_CR2_RD_WRN_Pos))) |
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+ I2C_CR2_START | I2C_CR2_STOP | I2C_CR2_RELOAD |
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I2C_CR2_NBYTES | I2C_CR2_AUTOEND | I2C_CR2_HEAD10R,
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SlaveAddr | SlaveAddrSize | (TransferSize << I2C_CR2_NBYTES_Pos) | EndMode | Request);
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}
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@@ -2123,9 +2169,10 @@ __STATIC_INLINE uint32_t LL_I2C_GetAddressMatchCode(I2C_TypeDef *I2Cx)
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/**
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* @brief Enable internal comparison of the SMBus Packet Error byte (transmission or reception mode).
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- * @note Macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
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+ * @note The macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
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* SMBus feature is supported by the I2Cx Instance.
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- * @note This feature is cleared by hardware when the PEC byte is transferred, or when a STOP condition or an Address Matched is received.
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+ * @note This feature is cleared by hardware when the PEC byte is transferred, or when a STOP condition
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+ or an Address Matched is received.
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* This bit has no effect when RELOAD bit is set.
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* This bit has no effect in device mode when SBC bit is not set.
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* @rmtoll CR2 PECBYTE LL_I2C_EnableSMBusPECCompare
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@@ -2139,7 +2186,7 @@ __STATIC_INLINE void LL_I2C_EnableSMBusPECCompare(I2C_TypeDef *I2Cx)
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/**
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* @brief Check if the SMBus Packet Error byte internal comparison is requested or not.
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- * @note Macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
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+ * @note The macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
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* SMBus feature is supported by the I2Cx Instance.
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* @rmtoll CR2 PECBYTE LL_I2C_IsEnabledSMBusPECCompare
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* @param I2Cx I2C Instance.
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@@ -2152,12 +2199,12 @@ __STATIC_INLINE uint32_t LL_I2C_IsEnabledSMBusPECCompare(I2C_TypeDef *I2Cx)
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/**
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* @brief Get the SMBus Packet Error byte calculated.
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- * @note Macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
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+ * @note The macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
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* SMBus feature is supported by the I2Cx Instance.
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* @rmtoll PECR PEC LL_I2C_GetSMBusPEC
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* @param I2Cx I2C Instance.
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* @retval Value between Min_Data=0x00 and Max_Data=0xFF
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-*/
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+ */
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__STATIC_INLINE uint32_t LL_I2C_GetSMBusPEC(I2C_TypeDef *I2Cx)
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{
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return (uint32_t)(READ_BIT(I2Cx->PECR, I2C_PECR_PEC));
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Vladimir N. Shilov