stm8s_clk.h 16 KB

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  1. /**
  2. ******************************************************************************
  3. * @file stm8s_clk.h
  4. * @author MCD Application Team
  5. * @version V2.3.0
  6. * @date 16-June-2017
  7. * @brief This file contains all functions prototype and macros for the CLK peripheral.
  8. ******************************************************************************
  9. * @attention
  10. *
  11. * <h2><center>&copy; COPYRIGHT 2014 STMicroelectronics</center></h2>
  12. *
  13. * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
  14. * You may not use this file except in compliance with the License.
  15. * You may obtain a copy of the License at:
  16. *
  17. * http://www.st.com/software_license_agreement_liberty_v2
  18. *
  19. * Unless required by applicable law or agreed to in writing, software
  20. * distributed under the License is distributed on an "AS IS" BASIS,
  21. * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  22. * See the License for the specific language governing permissions and
  23. * limitations under the License.
  24. *
  25. ******************************************************************************
  26. */
  27. /* Define to prevent recursive inclusion -------------------------------------*/
  28. #ifndef __STM8S_CLK_H
  29. #define __STM8S_CLK_H
  30. /* Includes ------------------------------------------------------------------*/
  31. /* Contains the description of all STM8 hardware registers */
  32. #include "stm8s.h"
  33. /* Exported types ------------------------------------------------------------*/
  34. /** @addtogroup CLK_Exported_Types
  35. * @{
  36. */
  37. /**
  38. * @brief Switch Mode Auto, Manual.
  39. */
  40. typedef enum {
  41. CLK_SWITCHMODE_MANUAL = (uint8_t)0x00, /*!< Enable the manual clock switching mode */
  42. CLK_SWITCHMODE_AUTO = (uint8_t)0x01 /*!< Enable the automatic clock switching mode */
  43. } CLK_SwitchMode_TypeDef;
  44. /**
  45. * @brief Current Clock State.
  46. */
  47. typedef enum {
  48. CLK_CURRENTCLOCKSTATE_DISABLE = (uint8_t)0x00, /*!< Current clock disable */
  49. CLK_CURRENTCLOCKSTATE_ENABLE = (uint8_t)0x01 /*!< Current clock enable */
  50. } CLK_CurrentClockState_TypeDef;
  51. /**
  52. * @brief Clock security system configuration.
  53. */
  54. typedef enum {
  55. CLK_CSSCONFIG_ENABLEWITHIT = (uint8_t)0x05, /*!< Enable CSS with detection interrupt */
  56. CLK_CSSCONFIG_ENABLE = (uint8_t)0x01, /*!< Enable CSS without detection interrupt */
  57. CLK_CSSCONFIG_DISABLE = (uint8_t)0x00 /*!< Leave CSS desactivated (to be used in CLK_Init() function) */
  58. } CLK_CSSConfig_TypeDef;
  59. /**
  60. * @brief CLK Clock Source.
  61. */
  62. typedef enum {
  63. CLK_SOURCE_HSI = (uint8_t)0xE1, /*!< Clock Source HSI. */
  64. CLK_SOURCE_LSI = (uint8_t)0xD2, /*!< Clock Source LSI. */
  65. CLK_SOURCE_HSE = (uint8_t)0xB4 /*!< Clock Source HSE. */
  66. } CLK_Source_TypeDef;
  67. /**
  68. * @brief CLK HSI Calibration Value.
  69. */
  70. typedef enum {
  71. CLK_HSITRIMVALUE_0 = (uint8_t)0x00, /*!< HSI Calibration Value 0 */
  72. CLK_HSITRIMVALUE_1 = (uint8_t)0x01, /*!< HSI Calibration Value 1 */
  73. CLK_HSITRIMVALUE_2 = (uint8_t)0x02, /*!< HSI Calibration Value 2 */
  74. CLK_HSITRIMVALUE_3 = (uint8_t)0x03, /*!< HSI Calibration Value 3 */
  75. CLK_HSITRIMVALUE_4 = (uint8_t)0x04, /*!< HSI Calibration Value 4 */
  76. CLK_HSITRIMVALUE_5 = (uint8_t)0x05, /*!< HSI Calibration Value 5 */
  77. CLK_HSITRIMVALUE_6 = (uint8_t)0x06, /*!< HSI Calibration Value 6 */
  78. CLK_HSITRIMVALUE_7 = (uint8_t)0x07 /*!< HSI Calibration Value 7 */
  79. } CLK_HSITrimValue_TypeDef;
  80. /**
  81. * @brief CLK Clock Output
  82. */
  83. typedef enum {
  84. CLK_OUTPUT_HSI = (uint8_t)0x00, /*!< Clock Output HSI */
  85. CLK_OUTPUT_LSI = (uint8_t)0x02, /*!< Clock Output LSI */
  86. CLK_OUTPUT_HSE = (uint8_t)0x04, /*!< Clock Output HSE */
  87. CLK_OUTPUT_CPU = (uint8_t)0x08, /*!< Clock Output CPU */
  88. CLK_OUTPUT_CPUDIV2 = (uint8_t)0x0A, /*!< Clock Output CPU/2 */
  89. CLK_OUTPUT_CPUDIV4 = (uint8_t)0x0C, /*!< Clock Output CPU/4 */
  90. CLK_OUTPUT_CPUDIV8 = (uint8_t)0x0E, /*!< Clock Output CPU/8 */
  91. CLK_OUTPUT_CPUDIV16 = (uint8_t)0x10, /*!< Clock Output CPU/16 */
  92. CLK_OUTPUT_CPUDIV32 = (uint8_t)0x12, /*!< Clock Output CPU/32 */
  93. CLK_OUTPUT_CPUDIV64 = (uint8_t)0x14, /*!< Clock Output CPU/64 */
  94. CLK_OUTPUT_HSIRC = (uint8_t)0x16, /*!< Clock Output HSI RC */
  95. CLK_OUTPUT_MASTER = (uint8_t)0x18, /*!< Clock Output Master */
  96. CLK_OUTPUT_OTHERS = (uint8_t)0x1A /*!< Clock Output OTHER */
  97. } CLK_Output_TypeDef;
  98. /**
  99. * @brief CLK Enable peripheral
  100. */
  101. /* Elements values convention: 0xXY
  102. X = choice between the peripheral registers
  103. X = 0 : PCKENR1
  104. X = 1 : PCKENR2
  105. Y = Peripheral position in the register
  106. */
  107. typedef enum {
  108. CLK_PERIPHERAL_I2C = (uint8_t)0x00, /*!< Peripheral Clock Enable 1, I2C */
  109. CLK_PERIPHERAL_SPI = (uint8_t)0x01, /*!< Peripheral Clock Enable 1, SPI */
  110. #if defined(STM8S208) || defined(STM8S207) || defined(STM8S007) || defined(STM8AF52Ax) || defined(STM8AF62Ax)
  111. CLK_PERIPHERAL_UART1 = (uint8_t)0x02, /*!< Peripheral Clock Enable 1, UART1 */
  112. #else
  113. CLK_PERIPHERAL_UART1 = (uint8_t)0x03, /*!< Peripheral Clock Enable 1, UART1 */
  114. #endif
  115. CLK_PERIPHERAL_UART2 = (uint8_t)0x03, /*!< Peripheral Clock Enable 1, UART2 */
  116. CLK_PERIPHERAL_UART3 = (uint8_t)0x03, /*!< Peripheral Clock Enable 1, UART3 */
  117. CLK_PERIPHERAL_TIMER6 = (uint8_t)0x04, /*!< Peripheral Clock Enable 1, Timer6 */
  118. CLK_PERIPHERAL_TIMER4 = (uint8_t)0x04, /*!< Peripheral Clock Enable 1, Timer4 */
  119. CLK_PERIPHERAL_TIMER5 = (uint8_t)0x05, /*!< Peripheral Clock Enable 1, Timer5 */
  120. CLK_PERIPHERAL_TIMER2 = (uint8_t)0x05, /*!< Peripheral Clock Enable 1, Timer2 */
  121. CLK_PERIPHERAL_TIMER3 = (uint8_t)0x06, /*!< Peripheral Clock Enable 1, Timer3 */
  122. CLK_PERIPHERAL_TIMER1 = (uint8_t)0x07, /*!< Peripheral Clock Enable 1, Timer1 */
  123. CLK_PERIPHERAL_AWU = (uint8_t)0x12, /*!< Peripheral Clock Enable 2, AWU */
  124. CLK_PERIPHERAL_ADC = (uint8_t)0x13, /*!< Peripheral Clock Enable 2, ADC */
  125. CLK_PERIPHERAL_CAN = (uint8_t)0x17 /*!< Peripheral Clock Enable 2, CAN */
  126. } CLK_Peripheral_TypeDef;
  127. /**
  128. * @brief CLK Flags.
  129. */
  130. /* Elements values convention: 0xXZZ
  131. X = choice between the flags registers
  132. X = 1 : ICKR
  133. X = 2 : ECKR
  134. X = 3 : SWCR
  135. X = 4 : CSSR
  136. X = 5 : CCOR
  137. ZZ = flag mask in the register (same as map file)
  138. */
  139. typedef enum {
  140. CLK_FLAG_LSIRDY = (uint16_t)0x0110, /*!< Low speed internal oscillator ready Flag */
  141. CLK_FLAG_HSIRDY = (uint16_t)0x0102, /*!< High speed internal oscillator ready Flag */
  142. CLK_FLAG_HSERDY = (uint16_t)0x0202, /*!< High speed external oscillator ready Flag */
  143. CLK_FLAG_SWIF = (uint16_t)0x0308, /*!< Clock switch interrupt Flag */
  144. CLK_FLAG_SWBSY = (uint16_t)0x0301, /*!< Switch busy Flag */
  145. CLK_FLAG_CSSD = (uint16_t)0x0408, /*!< Clock security system detection Flag */
  146. CLK_FLAG_AUX = (uint16_t)0x0402, /*!< Auxiliary oscillator connected to master clock */
  147. CLK_FLAG_CCOBSY = (uint16_t)0x0504, /*!< Configurable clock output busy */
  148. CLK_FLAG_CCORDY = (uint16_t)0x0502 /*!< Configurable clock output ready */
  149. }CLK_Flag_TypeDef;
  150. /**
  151. * @brief CLK interrupt configuration and Flags cleared by software.
  152. */
  153. typedef enum {
  154. CLK_IT_CSSD = (uint8_t)0x0C, /*!< Clock security system detection Flag */
  155. CLK_IT_SWIF = (uint8_t)0x1C /*!< Clock switch interrupt Flag */
  156. }CLK_IT_TypeDef;
  157. /**
  158. * @brief CLK Clock Divisor.
  159. */
  160. /* Warning:
  161. 0xxxxxx = HSI divider
  162. 1xxxxxx = CPU divider
  163. Other bits correspond to the divider's bits mapping
  164. */
  165. typedef enum {
  166. CLK_PRESCALER_HSIDIV1 = (uint8_t)0x00, /*!< High speed internal clock prescaler: 1 */
  167. CLK_PRESCALER_HSIDIV2 = (uint8_t)0x08, /*!< High speed internal clock prescaler: 2 */
  168. CLK_PRESCALER_HSIDIV4 = (uint8_t)0x10, /*!< High speed internal clock prescaler: 4 */
  169. CLK_PRESCALER_HSIDIV8 = (uint8_t)0x18, /*!< High speed internal clock prescaler: 8 */
  170. CLK_PRESCALER_CPUDIV1 = (uint8_t)0x80, /*!< CPU clock division factors 1 */
  171. CLK_PRESCALER_CPUDIV2 = (uint8_t)0x81, /*!< CPU clock division factors 2 */
  172. CLK_PRESCALER_CPUDIV4 = (uint8_t)0x82, /*!< CPU clock division factors 4 */
  173. CLK_PRESCALER_CPUDIV8 = (uint8_t)0x83, /*!< CPU clock division factors 8 */
  174. CLK_PRESCALER_CPUDIV16 = (uint8_t)0x84, /*!< CPU clock division factors 16 */
  175. CLK_PRESCALER_CPUDIV32 = (uint8_t)0x85, /*!< CPU clock division factors 32 */
  176. CLK_PRESCALER_CPUDIV64 = (uint8_t)0x86, /*!< CPU clock division factors 64 */
  177. CLK_PRESCALER_CPUDIV128 = (uint8_t)0x87 /*!< CPU clock division factors 128 */
  178. } CLK_Prescaler_TypeDef;
  179. /**
  180. * @brief SWIM Clock divider.
  181. */
  182. typedef enum {
  183. CLK_SWIMDIVIDER_2 = (uint8_t)0x00, /*!< SWIM clock is divided by 2 */
  184. CLK_SWIMDIVIDER_OTHER = (uint8_t)0x01 /*!< SWIM clock is not divided by 2 */
  185. }CLK_SWIMDivider_TypeDef;
  186. /**
  187. * @}
  188. */
  189. /* Exported constants --------------------------------------------------------*/
  190. /** @addtogroup CLK_Exported_Constants
  191. * @{
  192. */
  193. #define CLK_TIMEOUT ((uint16_t)0xFFFF) /*!< Max Timeout for the clock switch operation. */
  194. /**
  195. * @}
  196. */
  197. /* Private macros ------------------------------------------------------------*/
  198. /** @addtogroup CLK_Private_Macros
  199. * @{
  200. */
  201. /**
  202. * @brief Macros used by the assert function in order to check the different functions parameters.
  203. */
  204. /**
  205. * @brief Macros used by the assert function in order to check the clock switching modes.
  206. */
  207. #define IS_CLK_SWITCHMODE_OK(MODE) (((MODE) == CLK_SWITCHMODE_MANUAL) || ((MODE) == CLK_SWITCHMODE_AUTO))
  208. /**
  209. * @brief Macros used by the assert function in order to check the current clock state.
  210. */
  211. #define IS_CLK_CURRENTCLOCKSTATE_OK(STATE) (((STATE) == CLK_CURRENTCLOCKSTATE_DISABLE) ||\
  212. ((STATE) == CLK_CURRENTCLOCKSTATE_ENABLE))
  213. /**
  214. * @brief Macros used by the assert function in order to check the CSS configuration.
  215. */
  216. #define IS_CLK_CSSCONFIG_OK(CSSVALUE) (((CSSVALUE) == CLK_CSSCONFIG_ENABLEWITHIT) ||\
  217. ((CSSVALUE) == CLK_CSSCONFIG_ENABLE) ||\
  218. ((CSSVALUE) == CLK_CSSCONFIG_DISABLE))
  219. /**
  220. * @brief Macros used by the assert function in order to check the different clock sources.
  221. */
  222. #define IS_CLK_SOURCE_OK(SOURCE) (((SOURCE) == CLK_SOURCE_HSI) ||\
  223. ((SOURCE) == CLK_SOURCE_LSI) ||\
  224. ((SOURCE) == CLK_SOURCE_HSE))
  225. /**
  226. * @brief Macros used by the assert function in order to check the different HSI trimming values.
  227. */
  228. #define IS_CLK_HSITRIMVALUE_OK(TRIMVALUE) (((TRIMVALUE) == CLK_HSITRIMVALUE_0) ||\
  229. ((TRIMVALUE) == CLK_HSITRIMVALUE_1) ||\
  230. ((TRIMVALUE) == CLK_HSITRIMVALUE_2) ||\
  231. ((TRIMVALUE) == CLK_HSITRIMVALUE_3) ||\
  232. ((TRIMVALUE) == CLK_HSITRIMVALUE_4) ||\
  233. ((TRIMVALUE) == CLK_HSITRIMVALUE_5) ||\
  234. ((TRIMVALUE) == CLK_HSITRIMVALUE_6) ||\
  235. ((TRIMVALUE) == CLK_HSITRIMVALUE_7))
  236. /**
  237. * @brief Macros used by the assert function in order to check the different clocks to output.
  238. */
  239. #define IS_CLK_OUTPUT_OK(OUTPUT) (((OUTPUT) == CLK_OUTPUT_HSI) ||\
  240. ((OUTPUT) == CLK_OUTPUT_HSE) ||\
  241. ((OUTPUT) == CLK_OUTPUT_LSI) ||\
  242. ((OUTPUT) == CLK_OUTPUT_CPU) ||\
  243. ((OUTPUT) == CLK_OUTPUT_CPUDIV2) ||\
  244. ((OUTPUT) == CLK_OUTPUT_CPUDIV4) ||\
  245. ((OUTPUT) == CLK_OUTPUT_CPUDIV8) ||\
  246. ((OUTPUT) == CLK_OUTPUT_CPUDIV16) ||\
  247. ((OUTPUT) == CLK_OUTPUT_CPUDIV32) ||\
  248. ((OUTPUT) == CLK_OUTPUT_CPUDIV64) ||\
  249. ((OUTPUT) == CLK_OUTPUT_HSIRC) ||\
  250. ((OUTPUT) == CLK_OUTPUT_MASTER) ||\
  251. ((OUTPUT) == CLK_OUTPUT_OTHERS))
  252. /**
  253. * @brief Macros used by the assert function in order to check the different peripheral's clock.
  254. */
  255. #define IS_CLK_PERIPHERAL_OK(PERIPHERAL) (((PERIPHERAL) == CLK_PERIPHERAL_I2C) ||\
  256. ((PERIPHERAL) == CLK_PERIPHERAL_SPI) ||\
  257. ((PERIPHERAL) == CLK_PERIPHERAL_UART3) ||\
  258. ((PERIPHERAL) == CLK_PERIPHERAL_UART2) ||\
  259. ((PERIPHERAL) == CLK_PERIPHERAL_UART1) ||\
  260. ((PERIPHERAL) == CLK_PERIPHERAL_TIMER4) ||\
  261. ((PERIPHERAL) == CLK_PERIPHERAL_TIMER2) ||\
  262. ((PERIPHERAL) == CLK_PERIPHERAL_TIMER5) ||\
  263. ((PERIPHERAL) == CLK_PERIPHERAL_TIMER6) ||\
  264. ((PERIPHERAL) == CLK_PERIPHERAL_TIMER3) ||\
  265. ((PERIPHERAL) == CLK_PERIPHERAL_TIMER1) ||\
  266. ((PERIPHERAL) == CLK_PERIPHERAL_CAN) ||\
  267. ((PERIPHERAL) == CLK_PERIPHERAL_ADC) ||\
  268. ((PERIPHERAL) == CLK_PERIPHERAL_AWU))
  269. /**
  270. * @brief Macros used by the assert function in order to check the different clock flags.
  271. */
  272. #define IS_CLK_FLAG_OK(FLAG) (((FLAG) == CLK_FLAG_LSIRDY) ||\
  273. ((FLAG) == CLK_FLAG_HSIRDY) ||\
  274. ((FLAG) == CLK_FLAG_HSERDY) ||\
  275. ((FLAG) == CLK_FLAG_SWIF) ||\
  276. ((FLAG) == CLK_FLAG_SWBSY) ||\
  277. ((FLAG) == CLK_FLAG_CSSD) ||\
  278. ((FLAG) == CLK_FLAG_AUX) ||\
  279. ((FLAG) == CLK_FLAG_CCOBSY) ||\
  280. ((FLAG) == CLK_FLAG_CCORDY))
  281. /**
  282. * @brief Macros used by the assert function in order to check the different clock IT pending bits.
  283. */
  284. #define IS_CLK_IT_OK(IT) (((IT) == CLK_IT_CSSD) || ((IT) == CLK_IT_SWIF))
  285. /**
  286. * @brief Macros used by the assert function in order to check the different HSI prescaler values.
  287. */
  288. #define IS_CLK_HSIPRESCALER_OK(PRESCALER) (((PRESCALER) == CLK_PRESCALER_HSIDIV1) ||\
  289. ((PRESCALER) == CLK_PRESCALER_HSIDIV2) ||\
  290. ((PRESCALER) == CLK_PRESCALER_HSIDIV4) ||\
  291. ((PRESCALER) == CLK_PRESCALER_HSIDIV8))
  292. /**
  293. * @brief Macros used by the assert function in order to check the different clock prescaler values.
  294. */
  295. #define IS_CLK_PRESCALER_OK(PRESCALER) (((PRESCALER) == CLK_PRESCALER_HSIDIV1) ||\
  296. ((PRESCALER) == CLK_PRESCALER_HSIDIV2) ||\
  297. ((PRESCALER) == CLK_PRESCALER_HSIDIV4) ||\
  298. ((PRESCALER) == CLK_PRESCALER_HSIDIV8) ||\
  299. ((PRESCALER) == CLK_PRESCALER_CPUDIV1) ||\
  300. ((PRESCALER) == CLK_PRESCALER_CPUDIV2) ||\
  301. ((PRESCALER) == CLK_PRESCALER_CPUDIV4) ||\
  302. ((PRESCALER) == CLK_PRESCALER_CPUDIV8) ||\
  303. ((PRESCALER) == CLK_PRESCALER_CPUDIV16) ||\
  304. ((PRESCALER) == CLK_PRESCALER_CPUDIV32) ||\
  305. ((PRESCALER) == CLK_PRESCALER_CPUDIV64) ||\
  306. ((PRESCALER) == CLK_PRESCALER_CPUDIV128))
  307. /**
  308. * @brief Macros used by the assert function in order to check the different SWIM dividers values.
  309. */
  310. #define IS_CLK_SWIMDIVIDER_OK(SWIMDIVIDER) (((SWIMDIVIDER) == CLK_SWIMDIVIDER_2) || ((SWIMDIVIDER) == CLK_SWIMDIVIDER_OTHER))
  311. /**
  312. * @}
  313. */
  314. /** @addtogroup CLK_Exported_functions
  315. * @{
  316. */
  317. void CLK_DeInit(void);
  318. void CLK_HSECmd(FunctionalState NewState);
  319. void CLK_HSICmd(FunctionalState NewState);
  320. void CLK_LSICmd(FunctionalState NewState);
  321. void CLK_CCOCmd(FunctionalState NewState);
  322. void CLK_ClockSwitchCmd(FunctionalState NewState);
  323. void CLK_FastHaltWakeUpCmd(FunctionalState NewState);
  324. void CLK_SlowActiveHaltWakeUpCmd(FunctionalState NewState);
  325. void CLK_PeripheralClockConfig(CLK_Peripheral_TypeDef CLK_Peripheral, FunctionalState NewState);
  326. ErrorStatus CLK_ClockSwitchConfig(CLK_SwitchMode_TypeDef CLK_SwitchMode, CLK_Source_TypeDef CLK_NewClock, FunctionalState ITState, CLK_CurrentClockState_TypeDef CLK_CurrentClockState);
  327. void CLK_HSIPrescalerConfig(CLK_Prescaler_TypeDef HSIPrescaler);
  328. void CLK_CCOConfig(CLK_Output_TypeDef CLK_CCO);
  329. void CLK_ITConfig(CLK_IT_TypeDef CLK_IT, FunctionalState NewState);
  330. void CLK_SYSCLKConfig(CLK_Prescaler_TypeDef CLK_Prescaler);
  331. void CLK_SWIMConfig(CLK_SWIMDivider_TypeDef CLK_SWIMDivider);
  332. void CLK_ClockSecuritySystemEnable(void);
  333. void CLK_SYSCLKEmergencyClear(void);
  334. void CLK_AdjustHSICalibrationValue(CLK_HSITrimValue_TypeDef CLK_HSICalibrationValue);
  335. uint32_t CLK_GetClockFreq(void);
  336. CLK_Source_TypeDef CLK_GetSYSCLKSource(void);
  337. FlagStatus CLK_GetFlagStatus(CLK_Flag_TypeDef CLK_FLAG);
  338. ITStatus CLK_GetITStatus(CLK_IT_TypeDef CLK_IT);
  339. void CLK_ClearITPendingBit(CLK_IT_TypeDef CLK_IT);
  340. /**
  341. * @}
  342. */
  343. #endif /* __STM8S_CLK_H */
  344. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/