stm8s_adc1.c 21 KB

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  1. /**
  2. ******************************************************************************
  3. * @file stm8s_adc1.c
  4. * @author MCD Application Team
  5. * @version V2.3.0
  6. * @date 16-June-2017
  7. * @brief This file contains all the functions/macros for the ADC1 peripheral.
  8. ******************************************************************************
  9. * @attention
  10. *
  11. * <h2><center>&copy; COPYRIGHT 2014 STMicroelectronics</center></h2>
  12. *
  13. * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
  14. * You may not use this file except in compliance with the License.
  15. * You may obtain a copy of the License at:
  16. *
  17. * http://www.st.com/software_license_agreement_liberty_v2
  18. *
  19. * Unless required by applicable law or agreed to in writing, software
  20. * distributed under the License is distributed on an "AS IS" BASIS,
  21. * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  22. * See the License for the specific language governing permissions and
  23. * limitations under the License.
  24. *
  25. ******************************************************************************
  26. */
  27. /* Includes ------------------------------------------------------------------*/
  28. #include "stm8s_adc1.h"
  29. /** @addtogroup STM8S_StdPeriph_Driver
  30. * @{
  31. */
  32. /* Private typedef -----------------------------------------------------------*/
  33. /* Private define ------------------------------------------------------------*/
  34. /* Private macro -------------------------------------------------------------*/
  35. /* Private variables ---------------------------------------------------------*/
  36. /* Private function prototypes -----------------------------------------------*/
  37. /* Private functions ---------------------------------------------------------*/
  38. /* Public functions ----------------------------------------------------------*/
  39. /**
  40. * @addtogroup ADC1_Public_Functions
  41. * @{
  42. */
  43. /**
  44. * @brief Deinitializes the ADC1 peripheral registers to their default reset values.
  45. * @param None
  46. * @retval None
  47. */
  48. void ADC1_DeInit(void)
  49. {
  50. ADC1->CSR = ADC1_CSR_RESET_VALUE;
  51. ADC1->CR1 = ADC1_CR1_RESET_VALUE;
  52. ADC1->CR2 = ADC1_CR2_RESET_VALUE;
  53. ADC1->CR3 = ADC1_CR3_RESET_VALUE;
  54. ADC1->TDRH = ADC1_TDRH_RESET_VALUE;
  55. ADC1->TDRL = ADC1_TDRL_RESET_VALUE;
  56. ADC1->HTRH = ADC1_HTRH_RESET_VALUE;
  57. ADC1->HTRL = ADC1_HTRL_RESET_VALUE;
  58. ADC1->LTRH = ADC1_LTRH_RESET_VALUE;
  59. ADC1->LTRL = ADC1_LTRL_RESET_VALUE;
  60. ADC1->AWCRH = ADC1_AWCRH_RESET_VALUE;
  61. ADC1->AWCRL = ADC1_AWCRL_RESET_VALUE;
  62. }
  63. /**
  64. * @brief Initializes the ADC1 peripheral according to the specified parameters
  65. * @param ADC1_ConversionMode: specifies the conversion mode
  66. * can be one of the values of @ref ADC1_ConvMode_TypeDef.
  67. * @param ADC1_Channel: specifies the channel to convert
  68. * can be one of the values of @ref ADC1_Channel_TypeDef.
  69. * @param ADC1_PrescalerSelection: specifies the ADC1 prescaler
  70. * can be one of the values of @ref ADC1_PresSel_TypeDef.
  71. * @param ADC1_ExtTrigger: specifies the external trigger
  72. * can be one of the values of @ref ADC1_ExtTrig_TypeDef.
  73. * @param ADC1_ExtTriggerState: specifies the external trigger new state
  74. * can be one of the values of @ref FunctionalState.
  75. * @param ADC1_Align: specifies the converted data alignment
  76. * can be one of the values of @ref ADC1_Align_TypeDef.
  77. * @param ADC1_SchmittTriggerChannel: specifies the schmitt trigger channel
  78. * can be one of the values of @ref ADC1_SchmittTrigg_TypeDef.
  79. * @param ADC1_SchmittTriggerState: specifies the schmitt trigger state
  80. * can be one of the values of @ref FunctionalState.
  81. * @retval None
  82. */
  83. void ADC1_Init(ADC1_ConvMode_TypeDef ADC1_ConversionMode, ADC1_Channel_TypeDef ADC1_Channel, ADC1_PresSel_TypeDef ADC1_PrescalerSelection, ADC1_ExtTrig_TypeDef ADC1_ExtTrigger, FunctionalState ADC1_ExtTriggerState, ADC1_Align_TypeDef ADC1_Align, ADC1_SchmittTrigg_TypeDef ADC1_SchmittTriggerChannel, FunctionalState ADC1_SchmittTriggerState)
  84. {
  85. /* Check the parameters */
  86. assert_param(IS_ADC1_CONVERSIONMODE_OK(ADC1_ConversionMode));
  87. assert_param(IS_ADC1_CHANNEL_OK(ADC1_Channel));
  88. assert_param(IS_ADC1_PRESSEL_OK(ADC1_PrescalerSelection));
  89. assert_param(IS_ADC1_EXTTRIG_OK(ADC1_ExtTrigger));
  90. assert_param(IS_FUNCTIONALSTATE_OK(((ADC1_ExtTriggerState))));
  91. assert_param(IS_ADC1_ALIGN_OK(ADC1_Align));
  92. assert_param(IS_ADC1_SCHMITTTRIG_OK(ADC1_SchmittTriggerChannel));
  93. assert_param(IS_FUNCTIONALSTATE_OK(ADC1_SchmittTriggerState));
  94. /*-----------------CR1 & CSR configuration --------------------*/
  95. /* Configure the conversion mode and the channel to convert
  96. respectively according to ADC1_ConversionMode & ADC1_Channel values & ADC1_Align values */
  97. ADC1_ConversionConfig(ADC1_ConversionMode, ADC1_Channel, ADC1_Align);
  98. /* Select the prescaler division factor according to ADC1_PrescalerSelection values */
  99. ADC1_PrescalerConfig(ADC1_PrescalerSelection);
  100. /*-----------------CR2 configuration --------------------*/
  101. /* Configure the external trigger state and event respectively
  102. according to NewState, ADC1_ExtTrigger */
  103. ADC1_ExternalTriggerConfig(ADC1_ExtTrigger, ADC1_ExtTriggerState);
  104. /*------------------TDR configuration ---------------------------*/
  105. /* Configure the schmitt trigger channel and state respectively
  106. according to ADC1_SchmittTriggerChannel & ADC1_SchmittTriggerNewState values */
  107. ADC1_SchmittTriggerConfig(ADC1_SchmittTriggerChannel, ADC1_SchmittTriggerState);
  108. /* Enable the ADC1 peripheral */
  109. ADC1->CR1 |= ADC1_CR1_ADON;
  110. }
  111. /**
  112. * @brief Enables or Disables the ADC1 peripheral.
  113. * @param NewState: specifies the peripheral enabled or disabled state.
  114. * @retval None
  115. */
  116. void ADC1_Cmd(FunctionalState NewState)
  117. {
  118. /* Check the parameters */
  119. assert_param(IS_FUNCTIONALSTATE_OK(NewState));
  120. if (NewState != DISABLE)
  121. {
  122. ADC1->CR1 |= ADC1_CR1_ADON;
  123. }
  124. else /* NewState == DISABLE */
  125. {
  126. ADC1->CR1 &= (uint8_t)(~ADC1_CR1_ADON);
  127. }
  128. }
  129. /**
  130. * @brief Enables or Disables the ADC1 scan mode.
  131. * @param NewState: specifies the selected mode enabled or disabled state.
  132. * @retval None
  133. */
  134. void ADC1_ScanModeCmd(FunctionalState NewState)
  135. {
  136. /* Check the parameters */
  137. assert_param(IS_FUNCTIONALSTATE_OK(NewState));
  138. if (NewState != DISABLE)
  139. {
  140. ADC1->CR2 |= ADC1_CR2_SCAN;
  141. }
  142. else /* NewState == DISABLE */
  143. {
  144. ADC1->CR2 &= (uint8_t)(~ADC1_CR2_SCAN);
  145. }
  146. }
  147. /**
  148. * @brief Enables or Disables the ADC1 data store into the Data Buffer registers rather than in the Data Register
  149. * @param NewState: specifies the selected mode enabled or disabled state.
  150. * @retval None
  151. */
  152. void ADC1_DataBufferCmd(FunctionalState NewState)
  153. {
  154. /* Check the parameters */
  155. assert_param(IS_FUNCTIONALSTATE_OK(NewState));
  156. if (NewState != DISABLE)
  157. {
  158. ADC1->CR3 |= ADC1_CR3_DBUF;
  159. }
  160. else /* NewState == DISABLE */
  161. {
  162. ADC1->CR3 &= (uint8_t)(~ADC1_CR3_DBUF);
  163. }
  164. }
  165. /**
  166. * @brief Enables or disables the ADC1 interrupt.
  167. * @param ADC1_IT specifies the name of the interrupt to enable or disable.
  168. * This parameter can be one of the following values:
  169. * - ADC1_IT_AWDITEN : Analog WDG interrupt enable
  170. * - ADC1_IT_EOCITEN : EOC iterrupt enable
  171. * @param NewState specifies the state of the interrupt to apply.
  172. * @retval None
  173. */
  174. void ADC1_ITConfig(ADC1_IT_TypeDef ADC1_IT, FunctionalState NewState)
  175. {
  176. /* Check the parameters */
  177. assert_param(IS_ADC1_IT_OK(ADC1_IT));
  178. assert_param(IS_FUNCTIONALSTATE_OK(NewState));
  179. if (NewState != DISABLE)
  180. {
  181. /* Enable the ADC1 interrupts */
  182. ADC1->CSR |= (uint8_t)ADC1_IT;
  183. }
  184. else /* NewState == DISABLE */
  185. {
  186. /* Disable the ADC1 interrupts */
  187. ADC1->CSR &= (uint8_t)((uint16_t)~(uint16_t)ADC1_IT);
  188. }
  189. }
  190. /**
  191. * @brief Configure the ADC1 prescaler division factor.
  192. * @param ADC1_Prescaler: the selected precaler.
  193. * It can be one of the values of @ref ADC1_PresSel_TypeDef.
  194. * @retval None
  195. */
  196. void ADC1_PrescalerConfig(ADC1_PresSel_TypeDef ADC1_Prescaler)
  197. {
  198. /* Check the parameter */
  199. assert_param(IS_ADC1_PRESSEL_OK(ADC1_Prescaler));
  200. /* Clear the SPSEL bits */
  201. ADC1->CR1 &= (uint8_t)(~ADC1_CR1_SPSEL);
  202. /* Select the prescaler division factor according to ADC1_PrescalerSelection values */
  203. ADC1->CR1 |= (uint8_t)(ADC1_Prescaler);
  204. }
  205. /**
  206. * @brief Enables or disables the ADC1 Schmitt Trigger on a selected channel.
  207. * @param ADC1_SchmittTriggerChannel specifies the desired Channel.
  208. * It can be set of the values of @ref ADC1_SchmittTrigg_TypeDef.
  209. * @param NewState specifies Channel new status.
  210. * can have one of the values of @ref FunctionalState.
  211. * @retval None
  212. */
  213. void ADC1_SchmittTriggerConfig(ADC1_SchmittTrigg_TypeDef ADC1_SchmittTriggerChannel, FunctionalState NewState)
  214. {
  215. /* Check the parameters */
  216. assert_param(IS_ADC1_SCHMITTTRIG_OK(ADC1_SchmittTriggerChannel));
  217. assert_param(IS_FUNCTIONALSTATE_OK(NewState));
  218. if (ADC1_SchmittTriggerChannel == ADC1_SCHMITTTRIG_ALL)
  219. {
  220. if (NewState != DISABLE)
  221. {
  222. ADC1->TDRL &= (uint8_t)0x0;
  223. ADC1->TDRH &= (uint8_t)0x0;
  224. }
  225. else /* NewState == DISABLE */
  226. {
  227. ADC1->TDRL |= (uint8_t)0xFF;
  228. ADC1->TDRH |= (uint8_t)0xFF;
  229. }
  230. }
  231. else if (ADC1_SchmittTriggerChannel < ADC1_SCHMITTTRIG_CHANNEL8)
  232. {
  233. if (NewState != DISABLE)
  234. {
  235. ADC1->TDRL &= (uint8_t)(~(uint8_t)((uint8_t)0x01 << (uint8_t)ADC1_SchmittTriggerChannel));
  236. }
  237. else /* NewState == DISABLE */
  238. {
  239. ADC1->TDRL |= (uint8_t)((uint8_t)0x01 << (uint8_t)ADC1_SchmittTriggerChannel);
  240. }
  241. }
  242. else /* ADC1_SchmittTriggerChannel >= ADC1_SCHMITTTRIG_CHANNEL8 */
  243. {
  244. if (NewState != DISABLE)
  245. {
  246. ADC1->TDRH &= (uint8_t)(~(uint8_t)((uint8_t)0x01 << ((uint8_t)ADC1_SchmittTriggerChannel - (uint8_t)8)));
  247. }
  248. else /* NewState == DISABLE */
  249. {
  250. ADC1->TDRH |= (uint8_t)((uint8_t)0x01 << ((uint8_t)ADC1_SchmittTriggerChannel - (uint8_t)8));
  251. }
  252. }
  253. }
  254. /**
  255. * @brief Configure the ADC1 conversion on selected channel.
  256. * @param ADC1_ConversionMode Specifies the conversion type.
  257. * It can be set of the values of @ref ADC1_ConvMode_TypeDef
  258. * @param ADC1_Channel specifies the ADC1 Channel.
  259. * It can be set of the values of @ref ADC1_Channel_TypeDef
  260. * @param ADC1_Align specifies the converted data alignment.
  261. * It can be set of the values of @ref ADC1_Align_TypeDef
  262. * @retval None
  263. */
  264. void ADC1_ConversionConfig(ADC1_ConvMode_TypeDef ADC1_ConversionMode, ADC1_Channel_TypeDef ADC1_Channel, ADC1_Align_TypeDef ADC1_Align)
  265. {
  266. /* Check the parameters */
  267. assert_param(IS_ADC1_CONVERSIONMODE_OK(ADC1_ConversionMode));
  268. assert_param(IS_ADC1_CHANNEL_OK(ADC1_Channel));
  269. assert_param(IS_ADC1_ALIGN_OK(ADC1_Align));
  270. /* Clear the align bit */
  271. ADC1->CR2 &= (uint8_t)(~ADC1_CR2_ALIGN);
  272. /* Configure the data alignment */
  273. ADC1->CR2 |= (uint8_t)(ADC1_Align);
  274. if (ADC1_ConversionMode == ADC1_CONVERSIONMODE_CONTINUOUS)
  275. {
  276. /* Set the continuous conversion mode */
  277. ADC1->CR1 |= ADC1_CR1_CONT;
  278. }
  279. else /* ADC1_ConversionMode == ADC1_CONVERSIONMODE_SINGLE */
  280. {
  281. /* Set the single conversion mode */
  282. ADC1->CR1 &= (uint8_t)(~ADC1_CR1_CONT);
  283. }
  284. /* Clear the ADC1 channels */
  285. ADC1->CSR &= (uint8_t)(~ADC1_CSR_CH);
  286. /* Select the ADC1 channel */
  287. ADC1->CSR |= (uint8_t)(ADC1_Channel);
  288. }
  289. /**
  290. * @brief Configure the ADC1 conversion on external trigger event.
  291. * @par Full description:
  292. * The selected external trigger event can be enabled or disabled.
  293. * @param ADC1_ExtTrigger to select the External trigger event.
  294. * can have one of the values of @ref ADC1_ExtTrig_TypeDef.
  295. * @param NewState to enable/disable the selected external trigger
  296. * can have one of the values of @ref FunctionalState.
  297. * @retval None
  298. */
  299. void ADC1_ExternalTriggerConfig(ADC1_ExtTrig_TypeDef ADC1_ExtTrigger, FunctionalState NewState)
  300. {
  301. /* Check the parameters */
  302. assert_param(IS_ADC1_EXTTRIG_OK(ADC1_ExtTrigger));
  303. assert_param(IS_FUNCTIONALSTATE_OK(NewState));
  304. /* Clear the external trigger selection bits */
  305. ADC1->CR2 &= (uint8_t)(~ADC1_CR2_EXTSEL);
  306. if (NewState != DISABLE)
  307. {
  308. /* Enable the selected external Trigger */
  309. ADC1->CR2 |= (uint8_t)(ADC1_CR2_EXTTRIG);
  310. }
  311. else /* NewState == DISABLE */
  312. {
  313. /* Disable the selected external trigger */
  314. ADC1->CR2 &= (uint8_t)(~ADC1_CR2_EXTTRIG);
  315. }
  316. /* Set the selected external trigger */
  317. ADC1->CR2 |= (uint8_t)(ADC1_ExtTrigger);
  318. }
  319. /**
  320. * @brief Start ADC1 conversion
  321. * @par Full description:
  322. * This function triggers the start of conversion, after ADC1 configuration.
  323. * @param None
  324. * @retval None
  325. * @par Required preconditions:
  326. * Enable the ADC1 peripheral before calling this function
  327. */
  328. void ADC1_StartConversion(void)
  329. {
  330. ADC1->CR1 |= ADC1_CR1_ADON;
  331. }
  332. /**
  333. * @brief Get one sample of measured signal.
  334. * @param None
  335. * @retval ConversionValue: value of the measured signal.
  336. * @par Required preconditions:
  337. * ADC1 conversion finished.
  338. */
  339. uint16_t ADC1_GetConversionValue(void)
  340. {
  341. uint16_t temph = 0;
  342. uint8_t templ = 0;
  343. if ((ADC1->CR2 & ADC1_CR2_ALIGN) != 0) /* Right alignment */
  344. {
  345. /* Read LSB first */
  346. templ = ADC1->DRL;
  347. /* Then read MSB */
  348. temph = ADC1->DRH;
  349. temph = (uint16_t)(templ | (uint16_t)(temph << (uint8_t)8));
  350. }
  351. else /* Left alignment */
  352. {
  353. /* Read MSB first*/
  354. temph = ADC1->DRH;
  355. /* Then read LSB */
  356. templ = ADC1->DRL;
  357. temph = (uint16_t)((uint16_t)((uint16_t)templ << 6) | (uint16_t)((uint16_t)temph << 8));
  358. }
  359. return ((uint16_t)temph);
  360. }
  361. /**
  362. * @brief Enables or disables the analog watchdog for the given channel.
  363. * @param Channel specifies the desired Channel.
  364. * It can be set of the values of @ref ADC1_Channel_TypeDef.
  365. * @param NewState specifies the analog watchdog new state.
  366. * can have one of the values of @ref FunctionalState.
  367. * @retval None
  368. */
  369. void ADC1_AWDChannelConfig(ADC1_Channel_TypeDef Channel, FunctionalState NewState)
  370. {
  371. /* Check the parameters */
  372. assert_param(IS_FUNCTIONALSTATE_OK(NewState));
  373. assert_param(IS_ADC1_CHANNEL_OK(Channel));
  374. if (Channel < (uint8_t)8)
  375. {
  376. if (NewState != DISABLE)
  377. {
  378. ADC1->AWCRL |= (uint8_t)((uint8_t)1 << Channel);
  379. }
  380. else /* NewState == DISABLE */
  381. {
  382. ADC1->AWCRL &= (uint8_t)~(uint8_t)((uint8_t)1 << Channel);
  383. }
  384. }
  385. else
  386. {
  387. if (NewState != DISABLE)
  388. {
  389. ADC1->AWCRH |= (uint8_t)((uint8_t)1 << (Channel - (uint8_t)8));
  390. }
  391. else /* NewState == DISABLE */
  392. {
  393. ADC1->AWCRH &= (uint8_t)~(uint8_t)((uint8_t)1 << (uint8_t)(Channel - (uint8_t)8));
  394. }
  395. }
  396. }
  397. /**
  398. * @brief Sets the high threshold of the analog watchdog.
  399. * @param Threshold specifies the high threshold value.
  400. * this value depends on the reference voltage range.
  401. * @retval None
  402. */
  403. void ADC1_SetHighThreshold(uint16_t Threshold)
  404. {
  405. ADC1->HTRH = (uint8_t)(Threshold >> (uint8_t)2);
  406. ADC1->HTRL = (uint8_t)Threshold;
  407. }
  408. /**
  409. * @brief Sets the low threshold of the analog watchdog.
  410. * @param Threshold specifies the low threshold value.
  411. * this value depends on the reference voltage range.
  412. * @retval None
  413. */
  414. void ADC1_SetLowThreshold(uint16_t Threshold)
  415. {
  416. ADC1->LTRL = (uint8_t)Threshold;
  417. ADC1->LTRH = (uint8_t)(Threshold >> (uint8_t)2);
  418. }
  419. /**
  420. * @brief Get one sample of measured signal.
  421. * @param Buffer specifies the buffer to read.
  422. * @retval BufferValue: value read from the given buffer.
  423. * @par Required preconditions:
  424. * ADC1 conversion finished.
  425. */
  426. uint16_t ADC1_GetBufferValue(uint8_t Buffer)
  427. {
  428. uint16_t temph = 0;
  429. uint8_t templ = 0;
  430. /* Check the parameters */
  431. assert_param(IS_ADC1_BUFFER_OK(Buffer));
  432. if ((ADC1->CR2 & ADC1_CR2_ALIGN) != 0) /* Right alignment */
  433. {
  434. /* Read LSB first */
  435. templ = *(uint8_t*)(uint16_t)((uint16_t)ADC1_BaseAddress + (uint8_t)(Buffer << 1) + 1);
  436. /* Then read MSB */
  437. temph = *(uint8_t*)(uint16_t)((uint16_t)ADC1_BaseAddress + (uint8_t)(Buffer << 1));
  438. temph = (uint16_t)(templ | (uint16_t)(temph << (uint8_t)8));
  439. }
  440. else /* Left alignment */
  441. {
  442. /* Read MSB first*/
  443. temph = *(uint8_t*)(uint16_t)((uint16_t)ADC1_BaseAddress + (uint8_t)(Buffer << 1));
  444. /* Then read LSB */
  445. templ = *(uint8_t*)(uint16_t)((uint16_t)ADC1_BaseAddress + (uint8_t)(Buffer << 1) + 1);
  446. temph = (uint16_t)((uint16_t)((uint16_t)templ << 6) | (uint16_t)(temph << 8));
  447. }
  448. return ((uint16_t)temph);
  449. }
  450. /**
  451. * @brief Checks the specified analog watchdog channel status.
  452. * @param Channel: specify the channel of which to check the analog watchdog
  453. * can be one of the values of @ref ADC1_Channel_TypeDef.
  454. * @retval FlagStatus Status of the analog watchdog.
  455. */
  456. FlagStatus ADC1_GetAWDChannelStatus(ADC1_Channel_TypeDef Channel)
  457. {
  458. uint8_t status = 0;
  459. /* Check the parameters */
  460. assert_param(IS_ADC1_CHANNEL_OK(Channel));
  461. if (Channel < (uint8_t)8)
  462. {
  463. status = (uint8_t)(ADC1->AWSRL & (uint8_t)((uint8_t)1 << Channel));
  464. }
  465. else /* Channel = 8 | 9 */
  466. {
  467. status = (uint8_t)(ADC1->AWSRH & (uint8_t)((uint8_t)1 << (Channel - (uint8_t)8)));
  468. }
  469. return ((FlagStatus)status);
  470. }
  471. /**
  472. * @brief Checks the specified ADC1 flag status.
  473. * @param Flag: ADC1 flag.
  474. * can be one of the values of @ref ADC1_Flag_TypeDef.
  475. * @retval FlagStatus Status of the ADC1 flag.
  476. */
  477. FlagStatus ADC1_GetFlagStatus(ADC1_Flag_TypeDef Flag)
  478. {
  479. uint8_t flagstatus = 0;
  480. uint8_t temp = 0;
  481. /* Check the parameters */
  482. assert_param(IS_ADC1_FLAG_OK(Flag));
  483. if ((Flag & 0x0F) == 0x01)
  484. {
  485. /* Get OVR flag status */
  486. flagstatus = (uint8_t)(ADC1->CR3 & ADC1_CR3_OVR);
  487. }
  488. else if ((Flag & 0xF0) == 0x10)
  489. {
  490. /* Get analog watchdog channel status */
  491. temp = (uint8_t)(Flag & (uint8_t)0x0F);
  492. if (temp < 8)
  493. {
  494. flagstatus = (uint8_t)(ADC1->AWSRL & (uint8_t)((uint8_t)1 << temp));
  495. }
  496. else
  497. {
  498. flagstatus = (uint8_t)(ADC1->AWSRH & (uint8_t)((uint8_t)1 << (temp - 8)));
  499. }
  500. }
  501. else /* Get EOC | AWD flag status */
  502. {
  503. flagstatus = (uint8_t)(ADC1->CSR & Flag);
  504. }
  505. return ((FlagStatus)flagstatus);
  506. }
  507. /**
  508. * @brief Clear the specified ADC1 Flag.
  509. * @param Flag: ADC1 flag.
  510. * can be one of the values of @ref ADC1_Flag_TypeDef.
  511. * @retval None
  512. */
  513. void ADC1_ClearFlag(ADC1_Flag_TypeDef Flag)
  514. {
  515. uint8_t temp = 0;
  516. /* Check the parameters */
  517. assert_param(IS_ADC1_FLAG_OK(Flag));
  518. if ((Flag & 0x0F) == 0x01)
  519. {
  520. /* Clear OVR flag status */
  521. ADC1->CR3 &= (uint8_t)(~ADC1_CR3_OVR);
  522. }
  523. else if ((Flag & 0xF0) == 0x10)
  524. {
  525. /* Clear analog watchdog channel status */
  526. temp = (uint8_t)(Flag & (uint8_t)0x0F);
  527. if (temp < 8)
  528. {
  529. ADC1->AWSRL &= (uint8_t)~(uint8_t)((uint8_t)1 << temp);
  530. }
  531. else
  532. {
  533. ADC1->AWSRH &= (uint8_t)~(uint8_t)((uint8_t)1 << (temp - 8));
  534. }
  535. }
  536. else /* Clear EOC | AWD flag status */
  537. {
  538. ADC1->CSR &= (uint8_t) (~Flag);
  539. }
  540. }
  541. /**
  542. * @brief Returns the specified pending bit status
  543. * @param ITPendingBit : the IT pending bit to check.
  544. * This parameter can be one of the following values:
  545. * - ADC1_IT_AWD : Analog WDG IT status
  546. * - ADC1_IT_AWS0 : Analog channel 0 IT status
  547. * - ADC1_IT_AWS1 : Analog channel 1 IT status
  548. * - ADC1_IT_AWS2 : Analog channel 2 IT status
  549. * - ADC1_IT_AWS3 : Analog channel 3 IT status
  550. * - ADC1_IT_AWS4 : Analog channel 4 IT status
  551. * - ADC1_IT_AWS5 : Analog channel 5 IT status
  552. * - ADC1_IT_AWS6 : Analog channel 6 IT status
  553. * - ADC1_IT_AWS7 : Analog channel 7 IT status
  554. * - ADC1_IT_AWS8 : Analog channel 8 IT status
  555. * - ADC1_IT_AWS9 : Analog channel 9 IT status
  556. * - ADC1_IT_EOC : EOC pending bit
  557. * @retval ITStatus: status of the specified pending bit.
  558. */
  559. ITStatus ADC1_GetITStatus(ADC1_IT_TypeDef ITPendingBit)
  560. {
  561. ITStatus itstatus = RESET;
  562. uint8_t temp = 0;
  563. /* Check the parameters */
  564. assert_param(IS_ADC1_ITPENDINGBIT_OK(ITPendingBit));
  565. if (((uint16_t)ITPendingBit & 0xF0) == 0x10)
  566. {
  567. /* Get analog watchdog channel status */
  568. temp = (uint8_t)((uint16_t)ITPendingBit & 0x0F);
  569. if (temp < 8)
  570. {
  571. itstatus = (ITStatus)(ADC1->AWSRL & (uint8_t)((uint8_t)1 << temp));
  572. }
  573. else
  574. {
  575. itstatus = (ITStatus)(ADC1->AWSRH & (uint8_t)((uint8_t)1 << (temp - 8)));
  576. }
  577. }
  578. else /* Get EOC | AWD flag status */
  579. {
  580. itstatus = (ITStatus)(ADC1->CSR & (uint8_t)ITPendingBit);
  581. }
  582. return ((ITStatus)itstatus);
  583. }
  584. /**
  585. * @brief Clear the ADC1 End of Conversion pending bit.
  586. * @param ITPendingBit : the IT pending bit to clear.
  587. * This parameter can be one of the following values:
  588. * - ADC1_IT_AWD : Analog WDG IT status
  589. * - ADC1_IT_AWS0 : Analog channel 0 IT status
  590. * - ADC1_IT_AWS1 : Analog channel 1 IT status
  591. * - ADC1_IT_AWS2 : Analog channel 2 IT status
  592. * - ADC1_IT_AWS3 : Analog channel 3 IT status
  593. * - ADC1_IT_AWS4 : Analog channel 4 IT status
  594. * - ADC1_IT_AWS5 : Analog channel 5 IT status
  595. * - ADC1_IT_AWS6 : Analog channel 6 IT status
  596. * - ADC1_IT_AWS7 : Analog channel 7 IT status
  597. * - ADC1_IT_AWS8 : Analog channel 8 IT status
  598. * - ADC1_IT_AWS9 : Analog channel 9 IT status
  599. * - ADC1_IT_EOC : EOC pending bit
  600. * @retval None
  601. */
  602. void ADC1_ClearITPendingBit(ADC1_IT_TypeDef ITPendingBit)
  603. {
  604. uint8_t temp = 0;
  605. /* Check the parameters */
  606. assert_param(IS_ADC1_ITPENDINGBIT_OK(ITPendingBit));
  607. if (((uint16_t)ITPendingBit & 0xF0) == 0x10)
  608. {
  609. /* Clear analog watchdog channel status */
  610. temp = (uint8_t)((uint16_t)ITPendingBit & 0x0F);
  611. if (temp < 8)
  612. {
  613. ADC1->AWSRL &= (uint8_t)~(uint8_t)((uint8_t)1 << temp);
  614. }
  615. else
  616. {
  617. ADC1->AWSRH &= (uint8_t)~(uint8_t)((uint8_t)1 << (temp - 8));
  618. }
  619. }
  620. else /* Clear EOC | AWD flag status */
  621. {
  622. ADC1->CSR &= (uint8_t)((uint16_t)~(uint16_t)ITPendingBit);
  623. }
  624. }
  625. /**
  626. * @}
  627. */
  628. /**
  629. * @}
  630. */
  631. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/