; Автор: shilow@ukr.net ; Дата: ; Название: ; Версия: ; Имя файла: ; Для AVR: ATTiny2313 ; Тактовая частота: 8 МГц ; Выполняемые функции: ; Шаблон для ATtiny2313 ; .listmac ; развернём макросы .nolist .include "tn2313adef.inc" .list ;****************************** ; ячейки в СОЗУ .DSEG ;.ORG SRAM_START Sample: .byte 30 ; rjmp RESET ; Reset Handler rjmp INT0 ; External Interrupt0 Handler rjmp INT1 ; External Interrupt1 Handler rjmp TIM1_CAPT ; Timer1 Capture Handler rjmp TIM1_COMPA ; Timer1 CompareA Handler rjmp TIM1_OVF ; Timer1 Overflow Handler rjmp TIM0_OVF ; Timer0 Overflow Handler rjmp USART0_RXC ; USART0 RX Complete Handler rjmp USART0_DRE ; USART0,UDR Empty Handler rjmp USART0_TXC ; USART0 TX Complete Handler rjmp ANA_COMP ; Analog Comparator Handler rjmp PCINT ; Pin Change Interrupt rjmp TIMER1_COMPB ; Timer1 Compare B Handler rjmp TIMER0_COMPA ; Timer0 Compare A Handler rjmp TIMER0_COMPB ; Timer0 Compare B Handler rjmp USI_START ; USI Start Handler rjmp USI_OVERFLOW ; USI Overflow Handler rjmp EE_READY ; EEPROM Ready Handler rjmp WDT_OVERFLOW ; Watchdog Overflow Handler ; RESET: ldi r16,low(RAMEND) ; Main program start out SPL,r16 ; Set Stack Pointer to top of RAM sei ; Enable interrupts BEGIN: ;;;; rjmp BEGIN ; ; External Interrupt0 Handler INT0: reti ; External Interrupt1 Handler INT1: reti ; Timer1 Capture Handler TIM1_CAPT: reti ; Timer1 CompareA Handler TIM1_COMPA: reti ; Timer1 Overflow Handler TIM1_OVF: reti ; Timer0 Overflow Handler TIM0_OVF: reti ; USART0 RX Complete Handler USART0_RXC: reti ; USART0,UDR Empty Handler USART0_DRE: reti ; USART0 TX Complete Handler USART0_TXC: reti ; Analog Comparator Handler ANA_COMP: reti ; Pin Change Interrupt PCINT: reti ; Timer1 Compare B Handler TIMER1_COMPB: reti ; Timer0 Compare A Handler TIMER0_COMPA: reti ; Timer0 Compare B Handler TIMER0_COMPB: reti ; USI Start Handler USI_START: reti ; USI Overflow Handler USI_OVERFLOW: reti ; EEPROM Ready Handler EE_READY: reti ; Watchdog Overflow Handler WDT_OVERFLOW: reti