stm8s_tim5.h 19 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473
  1. /**
  2. ******************************************************************************
  3. * @file stm8s_tim5.h
  4. * @author MCD Application Team
  5. * @version V2.3.0
  6. * @date 16-June-2017
  7. * @brief This file contains all functions prototype and macros for the TIM5 peripheral.
  8. ******************************************************************************
  9. * @attention
  10. *
  11. * <h2><center>&copy; COPYRIGHT 2014 STMicroelectronics</center></h2>
  12. *
  13. * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
  14. * You may not use this file except in compliance with the License.
  15. * You may obtain a copy of the License at:
  16. *
  17. * http://www.st.com/software_license_agreement_liberty_v2
  18. *
  19. * Unless required by applicable law or agreed to in writing, software
  20. * distributed under the License is distributed on an "AS IS" BASIS,
  21. * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  22. * See the License for the specific language governing permissions and
  23. * limitations under the License.
  24. *
  25. ******************************************************************************
  26. */
  27. /* Define to prevent recursive inclusion -------------------------------------*/
  28. #ifndef __STM8S_TIM5_H
  29. #define __STM8S_TIM5_H
  30. /* Includes ------------------------------------------------------------------*/
  31. #include "stm8s.h"
  32. /** @addtogroup STM8S_StdPeriph_Driver
  33. * @{
  34. */
  35. /* Exported types ------------------------------------------------------------*/
  36. /** TIM5 Forced Action */
  37. typedef enum
  38. {
  39. TIM5_FORCEDACTION_ACTIVE =((uint8_t)0x50),
  40. TIM5_FORCEDACTION_INACTIVE =((uint8_t)0x40)
  41. }TIM5_ForcedAction_TypeDef;
  42. #define IS_TIM5_FORCED_ACTION_OK(ACTION) (((ACTION) == TIM5_FORCEDACTION_ACTIVE) || \
  43. ((ACTION) == TIM5_FORCEDACTION_INACTIVE))
  44. /** TIM5 Prescaler */
  45. typedef enum
  46. {
  47. TIM5_PRESCALER_1 =((uint8_t)0x00),
  48. TIM5_PRESCALER_2 =((uint8_t)0x01),
  49. TIM5_PRESCALER_4 =((uint8_t)0x02),
  50. TIM5_PRESCALER_8 =((uint8_t)0x03),
  51. TIM5_PRESCALER_16 =((uint8_t)0x04),
  52. TIM5_PRESCALER_32 =((uint8_t)0x05),
  53. TIM5_PRESCALER_64 =((uint8_t)0x06),
  54. TIM5_PRESCALER_128 =((uint8_t)0x07),
  55. TIM5_PRESCALER_256 =((uint8_t)0x08),
  56. TIM5_PRESCALER_512 =((uint8_t)0x09),
  57. TIM5_PRESCALER_1024 =((uint8_t)0x0A),
  58. TIM5_PRESCALER_2048 =((uint8_t)0x0B),
  59. TIM5_PRESCALER_4096 =((uint8_t)0x0C),
  60. TIM5_PRESCALER_8192 =((uint8_t)0x0D),
  61. TIM5_PRESCALER_16384 =((uint8_t)0x0E),
  62. TIM5_PRESCALER_32768 =((uint8_t)0x0F)
  63. }TIM5_Prescaler_TypeDef;
  64. #define IS_TIM5_PRESCALER_OK(PRESCALER) (((PRESCALER) == TIM5_PRESCALER_1) || \
  65. ((PRESCALER) == TIM5_PRESCALER_2 ) || \
  66. ((PRESCALER) == TIM5_PRESCALER_4 ) || \
  67. ((PRESCALER) == TIM5_PRESCALER_8 ) || \
  68. ((PRESCALER) == TIM5_PRESCALER_16 ) || \
  69. ((PRESCALER) == TIM5_PRESCALER_32 ) || \
  70. ((PRESCALER) == TIM5_PRESCALER_64 ) || \
  71. ((PRESCALER) == TIM5_PRESCALER_128 ) || \
  72. ((PRESCALER) == TIM5_PRESCALER_256 ) || \
  73. ((PRESCALER) == TIM5_PRESCALER_512 ) || \
  74. ((PRESCALER) == TIM5_PRESCALER_1024 ) || \
  75. ((PRESCALER) == TIM5_PRESCALER_2048 ) || \
  76. ((PRESCALER) == TIM5_PRESCALER_4096 ) || \
  77. ((PRESCALER) == TIM5_PRESCALER_8192 ) || \
  78. ((PRESCALER) == TIM5_PRESCALER_16384 ) || \
  79. ((PRESCALER) == TIM5_PRESCALER_32768 ))
  80. /** TIM5 Output Compare and PWM modes */
  81. typedef enum
  82. {
  83. TIM5_OCMODE_TIMING =((uint8_t)0x00),
  84. TIM5_OCMODE_ACTIVE =((uint8_t)0x10),
  85. TIM5_OCMODE_INACTIVE =((uint8_t)0x20),
  86. TIM5_OCMODE_TOGGLE =((uint8_t)0x30),
  87. TIM5_OCMODE_PWM1 =((uint8_t)0x60),
  88. TIM5_OCMODE_PWM2 =((uint8_t)0x70)
  89. }TIM5_OCMode_TypeDef;
  90. #define IS_TIM5_OC_MODE_OK(MODE) (((MODE) == TIM5_OCMODE_TIMING) || \
  91. ((MODE) == TIM5_OCMODE_ACTIVE) || \
  92. ((MODE) == TIM5_OCMODE_INACTIVE) || \
  93. ((MODE) == TIM5_OCMODE_TOGGLE)|| \
  94. ((MODE) == TIM5_OCMODE_PWM1) || \
  95. ((MODE) == TIM5_OCMODE_PWM2))
  96. #define IS_TIM5_OCM_OK(MODE)(((MODE) == TIM5_OCMODE_TIMING) || \
  97. ((MODE) == TIM5_OCMODE_ACTIVE) || \
  98. ((MODE) == TIM5_OCMODE_INACTIVE) || \
  99. ((MODE) == TIM5_OCMODE_TOGGLE)|| \
  100. ((MODE) == TIM5_OCMODE_PWM1) || \
  101. ((MODE) == TIM5_OCMODE_PWM2) || \
  102. ((MODE) == (uint8_t)TIM5_FORCEDACTION_ACTIVE) || \
  103. ((MODE) == (uint8_t)TIM5_FORCEDACTION_INACTIVE))
  104. /** TIM5 One Pulse Mode */
  105. typedef enum
  106. {
  107. TIM5_OPMODE_SINGLE =((uint8_t)0x01),
  108. TIM5_OPMODE_REPETITIVE =((uint8_t)0x00)
  109. }TIM5_OPMode_TypeDef;
  110. #define IS_TIM5_OPM_MODE_OK(MODE) (((MODE) == TIM5_OPMODE_SINGLE) || \
  111. ((MODE) == TIM5_OPMODE_REPETITIVE))
  112. /** TIM5 Channel */
  113. typedef enum
  114. {
  115. TIM5_CHANNEL_1 =((uint8_t)0x00),
  116. TIM5_CHANNEL_2 =((uint8_t)0x01),
  117. TIM5_CHANNEL_3 =((uint8_t)0x02)
  118. }TIM5_Channel_TypeDef;
  119. #define IS_TIM5_CHANNEL_OK(CHANNEL) (((CHANNEL) == TIM5_CHANNEL_1) || \
  120. ((CHANNEL) == TIM5_CHANNEL_2) || \
  121. ((CHANNEL) == TIM5_CHANNEL_3))
  122. #define IS_TIM5_PWMI_CHANNEL_OK(CHANNEL) (((CHANNEL) == TIM5_CHANNEL_1) || \
  123. ((CHANNEL) == TIM5_CHANNEL_2))
  124. /** TIM5 Output Compare Polarity */
  125. typedef enum
  126. {
  127. TIM5_OCPOLARITY_HIGH =((uint8_t)0x00),
  128. TIM5_OCPOLARITY_LOW =((uint8_t)0x22)
  129. }TIM5_OCPolarity_TypeDef;
  130. #define IS_TIM5_OC_POLARITY_OK(POLARITY) (((POLARITY) == TIM5_OCPOLARITY_HIGH) || \
  131. ((POLARITY) == TIM5_OCPOLARITY_LOW))
  132. /** TIM5 Output Compare states */
  133. typedef enum
  134. {
  135. TIM5_OUTPUTSTATE_DISABLE =((uint8_t)0x00),
  136. TIM5_OUTPUTSTATE_ENABLE =((uint8_t)0x11)
  137. }TIM5_OutputState_TypeDef;
  138. #define IS_TIM5_OUTPUT_STATE_OK(STATE) (((STATE) == TIM5_OUTPUTSTATE_DISABLE) || \
  139. ((STATE) == TIM5_OUTPUTSTATE_ENABLE))
  140. /** TIM5 Input Capture Polarity */
  141. typedef enum
  142. {
  143. TIM5_ICPOLARITY_RISING =((uint8_t)0x00),
  144. TIM5_ICPOLARITY_FALLING =((uint8_t)0x44)
  145. }TIM5_ICPolarity_TypeDef;
  146. #define IS_TIM5_IC_POLARITY_OK(POLARITY) (((POLARITY) == TIM5_ICPOLARITY_RISING) || \
  147. ((POLARITY) == TIM5_ICPOLARITY_FALLING))
  148. /** TIM5 Input Capture Selection */
  149. typedef enum
  150. {
  151. TIM5_ICSELECTION_DIRECTTI =((uint8_t)0x01),
  152. TIM5_ICSELECTION_INDIRECTTI =((uint8_t)0x02),
  153. TIM5_ICSELECTION_TRGI =((uint8_t)0x03)
  154. }TIM5_ICSelection_TypeDef;
  155. #define IS_TIM5_IC_SELECTION_OK(SELECTION) (((SELECTION) == TIM5_ICSELECTION_DIRECTTI) || \
  156. ((SELECTION) == TIM5_ICSELECTION_INDIRECTTI) || \
  157. ((SELECTION) == TIM5_ICSELECTION_TRGI))
  158. #define IS_TIM5_IC_SELECTION1_OK(SELECTION) (((SELECTION) == TIM5_ICSELECTION_DIRECTTI) || \
  159. ((SELECTION) == TIM5_ICSELECTION_TRGI))
  160. /** TIM5 Input Capture Prescaler */
  161. typedef enum
  162. {
  163. TIM5_ICPSC_DIV1 =((uint8_t)0x00),
  164. TIM5_ICPSC_DIV2 =((uint8_t)0x04),
  165. TIM5_ICPSC_DIV4 =((uint8_t)0x08),
  166. TIM5_ICPSC_DIV8 =((uint8_t)0x0C)
  167. }TIM5_ICPSC_TypeDef;
  168. #define IS_TIM5_IC_PRESCALER_OK(PRESCALER) (((PRESCALER) == TIM5_ICPSC_DIV1) || \
  169. ((PRESCALER) == TIM5_ICPSC_DIV2) || \
  170. ((PRESCALER) == TIM5_ICPSC_DIV4) || \
  171. ((PRESCALER) == TIM5_ICPSC_DIV8))
  172. /** TIM5 Input Capture Filer Value */
  173. #define IS_TIM5_IC_FILTER_OK(ICFILTER) ((ICFILTER) <= 0x0F)
  174. /** TIM5 interrupt sources */
  175. typedef enum
  176. {
  177. TIM5_IT_UPDATE =((uint8_t)0x01),
  178. TIM5_IT_CC1 =((uint8_t)0x02),
  179. TIM5_IT_CC2 =((uint8_t)0x04),
  180. TIM5_IT_CC3 =((uint8_t)0x08),
  181. TIM5_IT_TRIGGER = ((uint8_t)0x40)
  182. }TIM5_IT_TypeDef;
  183. #define IS_TIM5_IT_OK(IT) (((IT) != 0x00) && ((IT) <= 0x4F))
  184. #define IS_TIM5_GET_IT_OK(IT) (((IT) == TIM5_IT_UPDATE) || \
  185. ((IT) == TIM5_IT_CC1) || \
  186. ((IT) == TIM5_IT_CC2) || \
  187. ((IT) == TIM5_IT_CC3) || \
  188. ((IT) == TIM5_IT_TRIGGER))
  189. /** TIM5 Prescaler Reload Mode */
  190. typedef enum
  191. {
  192. TIM5_PSCRELOADMODE_UPDATE =((uint8_t)0x00),
  193. TIM5_PSCRELOADMODE_IMMEDIATE =((uint8_t)0x01)
  194. }TIM5_PSCReloadMode_TypeDef;
  195. #define IS_TIM5_PRESCALER_RELOAD_OK(RELOAD) (((RELOAD) == TIM5_PSCRELOADMODE_UPDATE) || \
  196. ((RELOAD) == TIM5_PSCRELOADMODE_IMMEDIATE))
  197. /** TIM5 Event Source */
  198. typedef enum
  199. {
  200. TIM5_EVENTSOURCE_UPDATE =((uint8_t)0x01),
  201. TIM5_EVENTSOURCE_CC1 =((uint8_t)0x02),
  202. TIM5_EVENTSOURCE_CC2 =((uint8_t)0x04),
  203. TIM5_EVENTSOURCE_CC3 =((uint8_t)0x08),
  204. TIM5_EVENTSOURCE_TRIGGER = ((uint8_t)0x40)
  205. }TIM5_EventSource_TypeDef;
  206. #define IS_TIM5_EVENT_SOURCE_OK(SOURCE) (((SOURCE) != 0x00))
  207. /** TIM5 Update Source */
  208. typedef enum
  209. {
  210. TIM5_UPDATESOURCE_GLOBAL =((uint8_t)0x00),
  211. TIM5_UPDATESOURCE_REGULAR =((uint8_t)0x01)
  212. }TIM5_UpdateSource_TypeDef;
  213. #define IS_TIM5_UPDATE_SOURCE_OK(SOURCE) (((SOURCE) == TIM5_UPDATESOURCE_GLOBAL) || \
  214. ((SOURCE) == TIM5_UPDATESOURCE_REGULAR))
  215. /**
  216. * @brief TIM5 Trigger Output Source
  217. */
  218. typedef enum
  219. {
  220. TIM5_TRGOSOURCE_RESET = ((uint8_t)0x00), /*!< Trigger Output source = Reset*/
  221. TIM5_TRGOSOURCE_ENABLE = ((uint8_t)0x10), /*!< Trigger Output source = TIM5 is enabled*/
  222. TIM5_TRGOSOURCE_UPDATE = ((uint8_t)0x20), /*!< Trigger Output source = Update event*/
  223. TIM5_TRGOSOURCE_OC1 = ((uint8_t)0x30), /*!< Trigger Output source = output compare channel1 */
  224. TIM5_TRGOSOURCE_OC1REF = ((uint8_t)0x40), /*!< Trigger Output source = output compare channel 1 reference */
  225. TIM5_TRGOSOURCE_OC2REF = ((uint8_t)0x50) /*!< Trigger Output source = output compare channel 2 reference */
  226. }TIM5_TRGOSource_TypeDef;
  227. /**
  228. * @brief Macro TIM5 TRGO source
  229. */
  230. #define IS_TIM5_TRGO_SOURCE_OK(SOURCE) \
  231. (((SOURCE) == TIM5_TRGOSOURCE_RESET) || \
  232. ((SOURCE) == TIM5_TRGOSOURCE_ENABLE) || \
  233. ((SOURCE) == TIM5_TRGOSOURCE_UPDATE) || \
  234. ((SOURCE) == TIM5_TRGOSOURCE_OC1) || \
  235. ((SOURCE) == TIM5_TRGOSOURCE_OC1REF) || \
  236. ((SOURCE) == TIM5_TRGOSOURCE_OC2REF))
  237. /** TIM5 Flags */
  238. typedef enum
  239. {
  240. TIM5_FLAG_UPDATE =((uint16_t)0x0001),
  241. TIM5_FLAG_CC1 =((uint16_t)0x0002),
  242. TIM5_FLAG_CC2 =((uint16_t)0x0004),
  243. TIM5_FLAG_CC3 =((uint16_t)0x0008),
  244. TIM5_FLAG_TRIGGER = ((uint16_t)0x0040),
  245. TIM5_FLAG_CC1OF =((uint16_t)0x0200),
  246. TIM5_FLAG_CC2OF =((uint16_t)0x0400),
  247. TIM5_FLAG_CC3OF =((uint16_t)0x0800)
  248. }TIM5_FLAG_TypeDef;
  249. #define IS_TIM5_GET_FLAG_OK(FLAG) (((FLAG) == TIM5_FLAG_UPDATE) || \
  250. ((FLAG) == TIM5_FLAG_CC1) || \
  251. ((FLAG) == TIM5_FLAG_CC2) || \
  252. ((FLAG) == TIM5_FLAG_CC3) || \
  253. ((FLAG) == TIM5_FLAG_TRIGGER) || \
  254. ((FLAG) == TIM5_FLAG_CC1OF) || \
  255. ((FLAG) == TIM5_FLAG_CC2OF) || \
  256. ((FLAG) == TIM5_FLAG_CC3OF))
  257. #define IS_TIM5_CLEAR_FLAG_OK(FLAG) ((((uint16_t)(FLAG) & 0xF1F0) == 0x0000) && ((uint16_t)(FLAG) != 0x0000))
  258. /**
  259. * @brief TIM5 Slave Mode
  260. */
  261. typedef enum
  262. {
  263. TIM5_SLAVEMODE_RESET = ((uint8_t)0x04), /*!< Slave Mode Selection = Reset*/
  264. TIM5_SLAVEMODE_GATED = ((uint8_t)0x05), /*!< Slave Mode Selection = Gated*/
  265. TIM5_SLAVEMODE_TRIGGER = ((uint8_t)0x06), /*!< Slave Mode Selection = Trigger*/
  266. TIM5_SLAVEMODE_EXTERNAL1 = ((uint8_t)0x07) /*!< Slave Mode Selection = External 1*/
  267. }TIM5_SlaveMode_TypeDef;
  268. /**
  269. * @brief Macro TIM5 Slave mode
  270. */
  271. #define IS_TIM5_SLAVE_MODE_OK(MODE) \
  272. (((MODE) == TIM5_SLAVEMODE_RESET) || \
  273. ((MODE) == TIM5_SLAVEMODE_GATED) || \
  274. ((MODE) == TIM5_SLAVEMODE_TRIGGER) || \
  275. ((MODE) == TIM5_SLAVEMODE_EXTERNAL1))
  276. /**
  277. * @brief TIM5 Internal Trigger Selection
  278. */
  279. typedef enum
  280. {
  281. TIM5_TS_TIM6 = ((uint8_t)0x00), /*!< TRIG Input source = TIM6 TRIG Output */
  282. TIM5_TS_TIM1 = ((uint8_t)0x03) /*!< TRIG Input source = TIM1 TRIG Output */
  283. }TIM5_TS_TypeDef;
  284. /**
  285. * @brief Macro TIM5 Trigger Selection
  286. */
  287. #define IS_TIM5_TRIGGER_SELECTION_OK(SELECTION) \
  288. (((SELECTION) == TIM5_TS_TIM6) || \
  289. ((SELECTION) == TIM5_TS_TIM1) )
  290. #define IS_TIM5_TIX_TRIGGER_SELECTION_OK(SELECTION) \
  291. (((SELECTION) == TIM5_TS_TI1F_ED) || \
  292. ((SELECTION) == TIM5_TS_TI1FP1) || \
  293. ((SELECTION) == TIM5_TS_TI2FP2))
  294. /**
  295. * @brief TIM5 Encoder Mode
  296. */
  297. typedef enum
  298. {
  299. TIM5_ENCODERMODE_TI1 = ((uint8_t)0x01), /*!< Encoder mode 1*/
  300. TIM5_ENCODERMODE_TI2 = ((uint8_t)0x02), /*!< Encoder mode 2*/
  301. TIM5_ENCODERMODE_TI12 = ((uint8_t)0x03) /*!< Encoder mode 3*/
  302. }TIM5_EncoderMode_TypeDef;
  303. /**
  304. * @brief Macro TIM5 encoder mode
  305. */
  306. #define IS_TIM5_ENCODER_MODE_OK(MODE) \
  307. (((MODE) == TIM5_ENCODERMODE_TI1) || \
  308. ((MODE) == TIM5_ENCODERMODE_TI2) || \
  309. ((MODE) == TIM5_ENCODERMODE_TI12))
  310. /**
  311. * @brief TIM5 External Trigger Prescaler
  312. */
  313. typedef enum
  314. {
  315. TIM5_EXTTRGPSC_OFF = ((uint8_t)0x00), /*!< No External Trigger prescaler */
  316. TIM5_EXTTRGPSC_DIV2 = ((uint8_t)0x10), /*!< External Trigger prescaler = 2 (ETRP frequency divided by 2) */
  317. TIM5_EXTTRGPSC_DIV4 = ((uint8_t)0x20), /*!< External Trigger prescaler = 4 (ETRP frequency divided by 4) */
  318. TIM5_EXTTRGPSC_DIV8 = ((uint8_t)0x30) /*!< External Trigger prescaler = 8 (ETRP frequency divided by 8) */
  319. }TIM5_ExtTRGPSC_TypeDef;
  320. /**
  321. * @brief Macro TIM5 external trigger prescaler
  322. */
  323. #define IS_TIM5_EXT_PRESCALER_OK(PRESCALER) \
  324. (((PRESCALER) == TIM5_EXTTRGPSC_OFF) || \
  325. ((PRESCALER) == TIM5_EXTTRGPSC_DIV2) || \
  326. ((PRESCALER) == TIM5_EXTTRGPSC_DIV4) || \
  327. ((PRESCALER) == TIM5_EXTTRGPSC_DIV8))
  328. /**
  329. * @brief TIM5 External Trigger Polarity
  330. */
  331. typedef enum
  332. {
  333. TIM5_EXTTRGPOLARITY_INVERTED = ((uint8_t)0x80), /*!< External Trigger Polarity = inverted */
  334. TIM5_EXTTRGPOLARITY_NONINVERTED = ((uint8_t)0x00) /*!< External Trigger Polarity = non inverted */
  335. }TIM5_ExtTRGPolarity_TypeDef;
  336. /**
  337. * @brief Macro TIM5 Trigger Polarity
  338. */
  339. #define IS_TIM5_EXT_POLARITY_OK(POLARITY) \
  340. (((POLARITY) == TIM5_EXTTRGPOLARITY_INVERTED) || \
  341. ((POLARITY) == TIM5_EXTTRGPOLARITY_NONINVERTED))
  342. /**
  343. * @brief Macro TIM5 External Trigger Filter
  344. */
  345. #define IS_TIM5_EXT_FILTER_OK(EXTFILTER) ((EXTFILTER) <= 0x0F)
  346. /**
  347. * @}
  348. */
  349. /* Exported macro ------------------------------------------------------------*/
  350. /* Exported functions --------------------------------------------------------*/
  351. /** @addtogroup TIM5_Exported_Functions
  352. * @{
  353. */
  354. void TIM5_DeInit(void);
  355. void TIM5_TimeBaseInit(TIM5_Prescaler_TypeDef TIM5_Prescaler, uint16_t TIM5_Period);
  356. void TIM5_OC1Init(TIM5_OCMode_TypeDef TIM5_OCMode, TIM5_OutputState_TypeDef TIM5_OutputState,uint16_t TIM5_Pulse, TIM5_OCPolarity_TypeDef TIM5_OCPolarity);
  357. void TIM5_OC2Init(TIM5_OCMode_TypeDef TIM5_OCMode, TIM5_OutputState_TypeDef TIM5_OutputState,uint16_t TIM5_Pulse, TIM5_OCPolarity_TypeDef TIM5_OCPolarity);
  358. void TIM5_OC3Init(TIM5_OCMode_TypeDef TIM5_OCMode, TIM5_OutputState_TypeDef TIM5_OutputState,uint16_t TIM5_Pulse, TIM5_OCPolarity_TypeDef TIM5_OCPolarity);
  359. void TIM5_ICInit(TIM5_Channel_TypeDef TIM5_Channel, TIM5_ICPolarity_TypeDef TIM5_ICPolarity, TIM5_ICSelection_TypeDef TIM5_ICSelection, TIM5_ICPSC_TypeDef TIM5_ICPrescaler, uint8_t TIM5_ICFilter);
  360. void TIM5_PWMIConfig(TIM5_Channel_TypeDef TIM5_Channel, TIM5_ICPolarity_TypeDef TIM5_ICPolarity, TIM5_ICSelection_TypeDef TIM5_ICSelection, TIM5_ICPSC_TypeDef TIM5_ICPrescaler, uint8_t TIM5_ICFilter);
  361. void TIM5_Cmd(FunctionalState NewState);
  362. void TIM5_ITConfig(TIM5_IT_TypeDef TIM5_IT, FunctionalState NewState);
  363. void TIM5_InternalClockConfig(void);
  364. void TIM5_UpdateDisableConfig(FunctionalState NewState);
  365. void TIM5_UpdateRequestConfig(TIM5_UpdateSource_TypeDef TIM5_UpdateSource);
  366. void TIM5_SelectOnePulseMode(TIM5_OPMode_TypeDef TIM5_OPMode);
  367. void TIM5_PrescalerConfig(TIM5_Prescaler_TypeDef Prescaler, TIM5_PSCReloadMode_TypeDef TIM5_PSCReloadMode);
  368. void TIM5_SelectOutputTrigger(TIM5_TRGOSource_TypeDef TIM5_TRGOSource);
  369. void TIM5_ForcedOC1Config(TIM5_ForcedAction_TypeDef TIM5_ForcedAction);
  370. void TIM5_ForcedOC2Config(TIM5_ForcedAction_TypeDef TIM5_ForcedAction);
  371. void TIM5_ForcedOC3Config(TIM5_ForcedAction_TypeDef TIM5_ForcedAction);
  372. void TIM5_ARRPreloadConfig(FunctionalState NewState);
  373. void TIM5_CCPreloadControl(FunctionalState NewState);
  374. void TIM5_OC1PreloadConfig(FunctionalState NewState);
  375. void TIM5_OC2PreloadConfig(FunctionalState NewState);
  376. void TIM5_OC3PreloadConfig(FunctionalState NewState);
  377. void TIM5_GenerateEvent(TIM5_EventSource_TypeDef TIM5_EventSource);
  378. void TIM5_OC1PolarityConfig(TIM5_OCPolarity_TypeDef TIM5_OCPolarity);
  379. void TIM5_OC2PolarityConfig(TIM5_OCPolarity_TypeDef TIM5_OCPolarity);
  380. void TIM5_OC3PolarityConfig(TIM5_OCPolarity_TypeDef TIM5_OCPolarity);
  381. void TIM5_CCxCmd(TIM5_Channel_TypeDef TIM5_Channel, FunctionalState NewState);
  382. void TIM5_SelectOCxM(TIM5_Channel_TypeDef TIM5_Channel, TIM5_OCMode_TypeDef TIM5_OCMode);
  383. void TIM5_SetCounter(uint16_t Counter);
  384. void TIM5_SetAutoreload(uint16_t Autoreload);
  385. void TIM5_SetCompare1(uint16_t Compare1);
  386. void TIM5_SetCompare2(uint16_t Compare2);
  387. void TIM5_SetCompare3(uint16_t Compare3);
  388. void TIM5_SetIC1Prescaler(TIM5_ICPSC_TypeDef TIM5_IC1Prescaler);
  389. void TIM5_SetIC2Prescaler(TIM5_ICPSC_TypeDef TIM5_IC2Prescaler);
  390. void TIM5_SetIC3Prescaler(TIM5_ICPSC_TypeDef TIM5_IC3Prescaler);
  391. uint16_t TIM5_GetCapture1(void);
  392. uint16_t TIM5_GetCapture2(void);
  393. uint16_t TIM5_GetCapture3(void);
  394. uint16_t TIM5_GetCounter(void);
  395. TIM5_Prescaler_TypeDef TIM5_GetPrescaler(void);
  396. FlagStatus TIM5_GetFlagStatus(TIM5_FLAG_TypeDef TIM5_FLAG);
  397. void TIM5_ClearFlag(TIM5_FLAG_TypeDef TIM5_FLAG);
  398. ITStatus TIM5_GetITStatus(TIM5_IT_TypeDef TIM5_IT);
  399. void TIM5_ClearITPendingBit(TIM5_IT_TypeDef TIM5_IT);
  400. void TIM5_SelectInputTrigger(TIM5_TS_TypeDef TIM5_InputTriggerSource);
  401. void TIM5_SelectSlaveMode(TIM5_SlaveMode_TypeDef TIM5_SlaveMode);
  402. void TIM5_EncoderInterfaceConfig(TIM5_EncoderMode_TypeDef TIM5_EncoderMode, TIM5_ICPolarity_TypeDef TIM5_IC1Polarity,TIM5_ICPolarity_TypeDef TIM5_IC2Polarity);
  403. /**
  404. * @}
  405. */
  406. #endif /* __STM8S_TIM5_H */
  407. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/