stm8l15x_pwr.c 11 KB

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  1. /**
  2. ******************************************************************************
  3. * @file stm8l15x_pwr.c
  4. * @author MCD Application Team
  5. * @version V1.6.1
  6. * @date 30-September-2014
  7. * @brief This file provides firmware functions to manage the following
  8. * functionalities of the Power Controller (PWR) peripheral:
  9. * - PVD configuration
  10. * - Ultra Low Power mode configuration
  11. * - Interrupts and flags management
  12. *
  13. ******************************************************************************
  14. * @attention
  15. *
  16. * <h2><center>&copy; COPYRIGHT 2014 STMicroelectronics</center></h2>
  17. *
  18. * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
  19. * You may not use this file except in compliance with the License.
  20. * You may obtain a copy of the License at:
  21. *
  22. * http://www.st.com/software_license_agreement_liberty_v2
  23. *
  24. * Unless required by applicable law or agreed to in writing, software
  25. * distributed under the License is distributed on an "AS IS" BASIS,
  26. * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  27. * See the License for the specific language governing permissions and
  28. * limitations under the License.
  29. *
  30. ******************************************************************************
  31. */
  32. /* Includes ------------------------------------------------------------------*/
  33. #include "stm8l15x_pwr.h"
  34. /** @addtogroup STM8L15x_StdPeriph_Driver
  35. * @{
  36. */
  37. /** @defgroup PWR
  38. * @brief PWR driver modules
  39. * @{
  40. */
  41. /* Private typedef -----------------------------------------------------------*/
  42. /* Private define ------------------------------------------------------------*/
  43. /* Private macro -------------------------------------------------------------*/
  44. /* Private variables ---------------------------------------------------------*/
  45. /* Private function prototypes -----------------------------------------------*/
  46. /* Private functions ---------------------------------------------------------*/
  47. /** @defgroup PWR_Private_Functions
  48. * @{
  49. */
  50. /** @defgroup PWR_Group1 PVD configuration functions
  51. * @brief PVD configuration functions
  52. *
  53. @verbatim
  54. ===============================================================================
  55. PVD configuration functions
  56. ===============================================================================
  57. - The PVD is used to monitor the VDD power supply by comparing it to a threshold
  58. selected by the PVD Level (PLS[2:0] bits in the PWR_CSR1).
  59. - The PVD can use an external input analog voltage (PVD_IN) which is compared
  60. internally to VREFINT. The PVD_IN (PE6) has to be configured in Analog mode
  61. when PWR_PVDLevel_PVDIn is selected (PLS[2:0] = 111).
  62. - A PVDO flag is available to indicate if VDD/VDDA is higher or lower than the
  63. PVD threshold. An interrupt is generated in case enabled for PVD.
  64. - The PVD interrup event has the capability to wake up the CPU from Halt/Active Halt modes.
  65. @endverbatim
  66. * @{
  67. */
  68. /**
  69. * @brief Deinitializes the PWR peripheral registers to their default reset values.
  70. * @param None
  71. * @retval None
  72. */
  73. void PWR_DeInit(void)
  74. {
  75. PWR->CSR1 = PWR_CSR1_PVDIF;
  76. PWR->CSR2 = PWR_CSR2_RESET_VALUE;
  77. }
  78. /**
  79. * @brief Configures the voltage threshold detected by the Power Voltage Detector(PVD).
  80. * @param PWR_PVDLevel: specifies the PVD detection level
  81. * This parameter can be one of the following values:
  82. * @arg PWR_PVDLevel_1V85: PVD detection level set to 1.85V
  83. * @arg PWR_PVDLevel_2V05: PVD detection level set to 2.05V
  84. * @arg PWR_PVDLevel_2V26: PVD detection level set to 2.26V
  85. * @arg PWR_PVDLevel_2V45: PVD detection level set to 2.45V
  86. * @arg PWR_PVDLevel_2V65: PVD detection level set to 2.65V
  87. * @arg PWR_PVDLevel_2V85: PVD detection level set to 2.85V
  88. * @arg PWR_PVDLevel_3V05: PVD detection level set to 3.05V
  89. * @arg PWR_PVDLevel_PVDIn: External input analog voltage (Compare internally to VREFINT)
  90. * @retval None
  91. */
  92. void PWR_PVDLevelConfig(PWR_PVDLevel_TypeDef PWR_PVDLevel)
  93. {
  94. /* Check the parameters */
  95. assert_param(IS_PWR_PVD_LEVEL(PWR_PVDLevel));
  96. /* Clear the PVD level */
  97. PWR->CSR1 &= (uint8_t)(~PWR_CSR1_PLS);
  98. /* Configure the PVD level */
  99. PWR->CSR1 |= PWR_PVDLevel;
  100. }
  101. /**
  102. * @brief Enables or disables the Power Voltage Detector(PVD).
  103. * @param NewState: new state of the PVD.
  104. * This parameter can be: ENABLE or DISABLE.
  105. * @retval None
  106. */
  107. void PWR_PVDCmd(FunctionalState NewState)
  108. {
  109. /* Check the parameters */
  110. assert_param(IS_FUNCTIONAL_STATE(NewState));
  111. if (NewState != DISABLE)
  112. {
  113. /* Enable the PWR PVD */
  114. PWR->CSR1 |= PWR_CSR1_PVDE;
  115. }
  116. else
  117. {
  118. /* Disable the PWR PVD */
  119. PWR->CSR1 &= (uint8_t)(~PWR_CSR1_PVDE);
  120. }
  121. }
  122. /**
  123. * @}
  124. */
  125. /** @defgroup PWR_Group2 Ultra Low Power mode configuration functions
  126. * @brief Ultra Low Power mode configuration functions
  127. *
  128. @verbatim
  129. ===============================================================================
  130. Ultra Low Power mode configuration functions
  131. ===============================================================================
  132. - The internal voltage reference consumption is not negligible, in particular
  133. in Halt and Active Halt modes. To reduce power consumption, use the PWR_UltraLowPowerCmd()
  134. function (ULP bit (Ultra low power) in the PWR_CSR2 register) to disable the
  135. internal voltage reference. However, in this case, when exiting from the
  136. Halt/Active Halt modes, the functions managed through the internal voltage reference
  137. are not reliable during the internal voltage reference startup time (up to 3 ms).
  138. To reduce the wakeup time, the device can exit from Halt/Active Halt modes without
  139. waiting for the internal voltage reference startup time. This is performed
  140. by using the PWR_FastWakeUpCmd() function (setting the FWU bit (Fast
  141. wakeup) in the PWR_CSR2 register) before entering Halt/Active Halt mode.
  142. @endverbatim
  143. * @{
  144. */
  145. /**
  146. * @brief Enables or disables the Fast WakeUp from Ultra Low Power mode.
  147. * @param NewState: new state of the Fast WakeUp functionality.
  148. * This parameter can be: ENABLE or DISABLE.
  149. * @retval None
  150. */
  151. void PWR_FastWakeUpCmd(FunctionalState NewState)
  152. {
  153. /* Check the parameters */
  154. assert_param(IS_FUNCTIONAL_STATE(NewState));
  155. if (NewState != DISABLE)
  156. {
  157. /* Enable the PWR FWU */
  158. PWR->CSR2 |= PWR_CSR2_FWU;
  159. }
  160. else
  161. {
  162. /* Disable the PWR FWU */
  163. PWR->CSR2 &= (uint8_t)(~PWR_CSR2_FWU);
  164. }
  165. }
  166. /**
  167. * @brief Enables or disables the Ultra Low Power mode.
  168. * @param NewState: new state of the Ultra Low Power mode.
  169. * This parameter can be: ENABLE or DISABLE.
  170. * @retval None
  171. */
  172. void PWR_UltraLowPowerCmd(FunctionalState NewState)
  173. {
  174. /* Check the parameters */
  175. assert_param(IS_FUNCTIONAL_STATE(NewState));
  176. if (NewState != DISABLE)
  177. {
  178. /* Enable the PWR ULP */
  179. PWR->CSR2 |= PWR_CSR2_ULP;
  180. }
  181. else
  182. {
  183. /* Disable the PWR ULP */
  184. PWR->CSR2 &= (uint8_t)(~PWR_CSR2_ULP);
  185. }
  186. }
  187. /**
  188. * @}
  189. */
  190. /** @defgroup PWR_Group3 Interrupts and Flags management functions
  191. * @brief Interrupts and Flags management functions
  192. *
  193. @verbatim
  194. ===============================================================================
  195. Interrupts and Flags management functions
  196. ===============================================================================
  197. @endverbatim
  198. * @{
  199. */
  200. /**
  201. * @brief Configures the Programmable Voltage Detector (PVD) Interrupt .
  202. * @param NewState : Indicates the new state of the PVD interrupt.
  203. * @retval None
  204. */
  205. void PWR_PVDITConfig(FunctionalState NewState)
  206. {
  207. /* Check the parameters */
  208. assert_param(IS_FUNCTIONAL_STATE(NewState));
  209. if (NewState != DISABLE)
  210. {
  211. /* Enable the PVD interrupt */
  212. PWR->CSR1 |= PWR_CSR1_PVDIEN;
  213. }
  214. else
  215. {
  216. /* Disable the PVD interrupt */
  217. PWR->CSR1 &= (uint8_t)(~PWR_CSR1_PVDIEN);
  218. }
  219. }
  220. /**
  221. * @brief Checks whether the specified PWR flag is set or not.
  222. * @param PWR_FLAG: specifies the flag to check.
  223. * This parameter can be one of the following values:
  224. * @arg PWR_FLAG_PVDOF: PVD Output. This flag is valid only if PVD is enabled
  225. * by the PWR_PVDCmd() function.
  226. * @arg PWR_FLAG_VREFINTF: Internal Voltage Reference Ready flag. This
  227. * flag indicates the state of the internal voltage reference, VREFINT.
  228. * @arg PWR_FLAG_PVDIF: PVD Interrupt Flag, it's set by hardware when a PVD
  229. * event occurs
  230. * @retval The new state of PWR_FLAG (SET or RESET).
  231. */
  232. FlagStatus PWR_GetFlagStatus(PWR_FLAG_TypeDef PWR_FLAG)
  233. {
  234. FlagStatus bitstatus = RESET;
  235. /* Check the parameters */
  236. assert_param(IS_PWR_FLAG(PWR_FLAG));
  237. if ((PWR_FLAG & PWR_FLAG_VREFINTF) != 0)
  238. {
  239. if ((PWR->CSR2 & PWR_CR2_VREFINTF) != (uint8_t)RESET )
  240. {
  241. bitstatus = SET;
  242. }
  243. else
  244. {
  245. bitstatus = RESET;
  246. }
  247. }
  248. else
  249. {
  250. if ((PWR->CSR1 & PWR_FLAG) != (uint8_t)RESET )
  251. {
  252. bitstatus = SET;
  253. }
  254. else
  255. {
  256. bitstatus = RESET;
  257. }
  258. }
  259. /* Return the flag status */
  260. return((FlagStatus)bitstatus);
  261. }
  262. /**
  263. * @brief Clears the PWR PVDIF Flag.
  264. * @param None
  265. * @retval None
  266. */
  267. void PWR_PVDClearFlag(void)
  268. {
  269. /* Set the PVDIF to clear it */
  270. PWR->CSR1 |= PWR_CSR1_PVDIF;
  271. }
  272. /**
  273. * @brief Checks whether the PVD interrupt has occurred or not.
  274. * @param None
  275. * @retval The new state of the PVD Interrupt (SET or RESET).
  276. */
  277. ITStatus PWR_PVDGetITStatus(void)
  278. {
  279. ITStatus bitstatus = RESET;
  280. uint8_t PVD_itStatus = 0x0, PVD_itEnable = 0x0;
  281. PVD_itStatus = (uint8_t)(PWR->CSR1 & (uint8_t)PWR_CSR1_PVDIF);
  282. PVD_itEnable = (uint8_t)(PWR->CSR1 & (uint8_t)PWR_CSR1_PVDIEN);
  283. if ((PVD_itStatus != (uint8_t)RESET ) && (PVD_itEnable != (uint8_t)RESET))
  284. {
  285. bitstatus = (ITStatus)SET;
  286. }
  287. else
  288. {
  289. bitstatus = (ITStatus)RESET;
  290. }
  291. return ((ITStatus)bitstatus);
  292. }
  293. /**
  294. * @brief Clears the PWR interrupt pending bit.
  295. * @param None
  296. * @retval None
  297. */
  298. void PWR_PVDClearITPendingBit(void)
  299. {
  300. /* Set the PVDIF to clear it */
  301. PWR->CSR1 |= PWR_CSR1_PVDIF;
  302. }
  303. /**
  304. * @}
  305. */
  306. /**
  307. * @}
  308. */
  309. /**
  310. * @}
  311. */
  312. /**
  313. * @}
  314. */
  315. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/