board.c 22 KB

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  1. #include "board.h"
  2. /* private defines */
  3. #define SPI_BUFFER_SIZE 5
  4. /* private variables */
  5. /**
  6. * Nixi Tube cathodes map in Byte Array:
  7. * {E0 E9 E8 E7 E6 E5 E4 E3}
  8. * {E2 E1 D0 D9 D8 D7 D6 D5}
  9. * {D4 D3 D2 D1 B0 B9 B8 B7}
  10. * {B6 B5 B4 B3 B2 B1 A0 A9}
  11. * {A8 A7 A6 A5 A4 A3 A2 A1}
  12. *
  13. * Shift register bit map in Tube cathodes (from 0 to 1):
  14. * {5.7 5.6 5.5 5.4 5.3 5.2 5.1 5.0 4.7 4.6} VL5/E
  15. * {4.5 4.4 4.3 4.2 4.1 4.0 3.7 3.6 3.5 3.4} VL4/D
  16. * {3.3 3.2 3.1 3.0 2.7 2.6 2.5 2.4 2.3 2.2} VL2/B
  17. * {2.1 2.0 1.7 1.6 1.5 1.4 1.3 1.2 1.1 1.0} VL1/A
  18. */
  19. static const uint16_t nixieCathodeMap[4][10] = {
  20. {0x8000, 0x0040, 0x0080, 0x0100, 0x0200, 0x0400, 0x0800, 0x1000, 0x2000, 0x4000},
  21. {0x2000, 0x0010, 0x0020, 0x0040, 0x0080, 0x0100, 0x0200, 0x0400, 0x0800, 0x1000},
  22. {0x0800, 0x0004, 0x0008, 0x0010, 0x0020, 0x0040, 0x0080, 0x0100, 0x0200, 0x0400},
  23. {0x0200, 0x0001, 0x0002, 0x0004, 0x0008, 0x0010, 0x0020, 0x0040, 0x0080, 0x0100}
  24. };
  25. //static const uint8_t nixieCathodeMask[4][2] = {{0x00, 0x3f}, {0xc0, 0x0f}, {0xf0, 0x03}, {0xc0, 0x00}};
  26. static uint8_t tubesBuffer[SPI_BUFFER_SIZE] = {0};
  27. //convert linear bright level to logariphmic
  28. const uint8_t cie[8] = { 0, 5, 14, 33, 64, 109, 172, 255 };
  29. /* private typedef */
  30. /* private functions */
  31. static void _show_digits(const uint32_t digits);
  32. static void GPIO_Init(void);
  33. static void DMA_Init(void);
  34. static void I2C1_Init(void);
  35. static void SPI1_Init(void);
  36. static void TIM1_Init(void);
  37. static void TIM3_Init(void);
  38. static void TIM14_Init(void);
  39. static void TIM16_Init(void);
  40. static void TIM17_Init(void);
  41. static void USART1_UART_Init(void);
  42. /* Board perephireal Configuration */
  43. void Board_Init(void)
  44. {
  45. /* Main peripheral clock enable */
  46. RCC->APBENR1 = (RCC_APBENR1_PWREN | RCC_APBENR1_I2C1EN | RCC_APBENR1_TIM3EN);
  47. RCC->APBENR2 = (RCC_APBENR2_SYSCFGEN | RCC_APBENR2_SPI1EN | RCC_APBENR2_TIM1EN);
  48. /* GPIO Ports Clock Enable */
  49. RCC->IOPENR = (RCC_IOPENR_GPIOAEN | RCC_IOPENR_GPIOBEN | RCC_IOPENR_GPIOCEN);
  50. /* Peripheral interrupt init*/
  51. /* RCC_IRQn interrupt configuration */
  52. NVIC_SetPriority(RCC_IRQn, 0);
  53. NVIC_EnableIRQ(RCC_IRQn);
  54. /* Configure the system clock */
  55. SystemClock_Config();
  56. /* Processor uses sleep as its low power mode */
  57. SCB->SCR &= ~((uint32_t)SCB_SCR_SLEEPDEEP_Msk);
  58. /* DisableSleepOnExit */
  59. SCB->SCR &= ~((uint32_t)SCB_SCR_SLEEPONEXIT_Msk);
  60. /* Initialize all configured peripherals */
  61. GPIO_Init();
  62. DMA_Init();
  63. I2C1_Init();
  64. SPI1_Init();
  65. /** Star SPI transfer to shift registers */
  66. /* Set DMA source and destination addresses. */
  67. /* Source: Address of the SPI buffer. */
  68. DMA1_Channel1->CMAR = (uint32_t)&tubesBuffer;
  69. /* Destination: SPI1 data register. */
  70. DMA1_Channel1->CPAR = (uint32_t)&(SPI1->DR);
  71. /* Set DMA data transfer length (SPI buffer length). */
  72. DMA1_Channel1->CNDTR = SPI_BUFFER_SIZE;
  73. /* Enable SPI transfer */
  74. SPI1->CR1 |= SPI_CR1_SPE;
  75. Flag.SPI_TX_End = 1;
  76. /* Enable tube power */
  77. TUBE_PWR_ON;
  78. /* display work now */
  79. /* Start RGB & Tube Power PWM */
  80. TIM1_Init();
  81. TIM3_Init();
  82. /* Blink timer */
  83. TIM14_Init();
  84. //TIM16_Init();
  85. //TIM17_Init();
  86. //USART1_UART_Init();
  87. }
  88. /**
  89. * @brief Out digits to SPI buffer. ON/off tube power.
  90. * @param : array with four BCD digits
  91. * @retval : None
  92. */
  93. void showDigits(tube4_t dig)
  94. {
  95. static uint32_t old_dig = 0;
  96. uint8_t st = 0, ov = FADE_START;
  97. if (old_dig == dig.u32) {
  98. _show_digits(dig.u32);
  99. } else {
  100. while (ov < FADE_STOP) {
  101. if (st == 0) {
  102. // new tube value
  103. st = 1;
  104. _show_digits(dig.u32);
  105. ov += FADE_STEP;
  106. tdelay_ms(ov);
  107. } else {
  108. // old tube value
  109. st = 0;
  110. _show_digits(old_dig);
  111. tdelay_ms(FADE_STOP - ov);
  112. }
  113. } // End of while
  114. old_dig = dig.u32;
  115. } // End of if-else
  116. }
  117. static void _show_digits(const uint32_t digits)
  118. {
  119. tube4_t dig;
  120. dig.u32 = digits;
  121. /* Clear buffer */
  122. tubesBuffer[0] = 0;
  123. tubesBuffer[1] = 0;
  124. tubesBuffer[2] = 0;
  125. tubesBuffer[3] = 0;
  126. tubesBuffer[4] = 0;
  127. /* check values range */
  128. int i;
  129. for (i=0; i<4; i++) {
  130. if (dig.ar[i] > 9) {
  131. if (dig.ar[i] != 0xf) {
  132. dig.ar[i] = 0;
  133. }
  134. }
  135. }
  136. /* Wait for SPI */
  137. while (Flag.SPI_TX_End == 0);
  138. Flag.SPI_TX_End = 0;
  139. /* Feel buffer */
  140. tubesBuffer[0] = (uint8_t)(nixieCathodeMap[Tube_E][dig.s8.tE] >> 8);
  141. tubesBuffer[1] = (uint8_t)((nixieCathodeMap[Tube_E][dig.s8.tE]) | (nixieCathodeMap[Tube_D][dig.s8.tD] >> 8));
  142. tubesBuffer[2] = (uint8_t)((nixieCathodeMap[Tube_D][dig.s8.tD]) | (nixieCathodeMap[Tube_B][dig.s8.tB] >> 8));
  143. tubesBuffer[3] = (uint8_t)((nixieCathodeMap[Tube_B][dig.s8.tB]) | (nixieCathodeMap[Tube_A][dig.s8.tA] >> 8));
  144. tubesBuffer[4] = (uint8_t)(nixieCathodeMap[Tube_A][dig.s8.tA]);
  145. /* Start DMA transfer to SPI */
  146. DMA1_Channel1->CCR |= DMA_CCR_EN;
  147. /* On/Off tube power */
  148. for (i=0; i<4; i++) {
  149. if (dig.ar[i] == 0xf) {
  150. tube_PowerOff((tube_pos_t)i);
  151. } else {
  152. tube_PowerOn((tube_pos_t)i);
  153. }
  154. }
  155. }
  156. /**
  157. * @brief HSV to RGB convertion
  158. * @param hue: 0-59, sat: 0-255, val (lightness): 0-255
  159. * @return none. RGB value out direct to LED.
  160. */
  161. void HSV2LED(const uint8_t hue, const uint8_t sat, const uint8_t val) {
  162. int base;
  163. uint32_t r=0, g=0, b=0;
  164. if (sat == 0)
  165. { // Achromatic color (gray).
  166. r = val;
  167. g = val;
  168. b = val;
  169. } else {
  170. base = ((255 - sat) * val) >> 8;
  171. switch (hue / 10) {
  172. case 0:
  173. r = val;
  174. g = (((val - base) * hue) / 10) + base;
  175. b = base;
  176. break;
  177. case 1:
  178. r = (((val - base) * (10 - (hue % 10))) / 10) + base;
  179. g = val;
  180. b = base;
  181. break;
  182. case 2:
  183. r = base;
  184. g = val;
  185. b = (((val - base) * (hue % 10)) / 10) + base;
  186. break;
  187. case 3:
  188. r = base;
  189. g = (((val - base) * (10 - (hue % 10))) / 10) + base;
  190. b = val;
  191. break;
  192. case 4:
  193. r = (((val - base) * (hue % 10)) / 10) + base;
  194. g = base;
  195. b = val;
  196. break;
  197. case 5:
  198. r = val;
  199. g = base;
  200. b = (((val - base) * (10 - (hue % 10))) / 10) + base;
  201. break;
  202. }
  203. }
  204. COLOR_R((uint8_t)r);
  205. COLOR_G((uint8_t)g);
  206. COLOR_B((uint8_t)b);
  207. }
  208. void tube_PowerOn(tube_pos_t tube)
  209. {
  210. switch (tube) {
  211. case Tube_A:
  212. TUBE_A_ON;
  213. break;
  214. case Tube_B:
  215. TUBE_B_ON;
  216. break;
  217. case Tube_D:
  218. TUBE_D_ON;
  219. break;
  220. case Tube_E:
  221. TUBE_E_ON;
  222. break;
  223. default:
  224. break;
  225. }
  226. }
  227. void tube_PowerOff(tube_pos_t tube)
  228. {
  229. switch (tube) {
  230. case Tube_A:
  231. TUBE_A_OFF;
  232. break;
  233. case Tube_B:
  234. TUBE_B_OFF;
  235. break;
  236. case Tube_D:
  237. TUBE_D_OFF;
  238. break;
  239. case Tube_E:
  240. TUBE_E_OFF;
  241. break;
  242. default:
  243. break;
  244. }
  245. }
  246. /**
  247. * @brief System Clock Configuration
  248. * @retval None
  249. */
  250. void SystemClock_Config(void)
  251. {
  252. /* HSI configuration and activation */
  253. RCC->CR |= RCC_CR_HSION; // Enable HSI
  254. while((RCC->CR & RCC_CR_HSIRDY) == 0);
  255. /* Main PLL configuration and activation */
  256. //RCC->PLLCFGR &= ~(RCC_PLLCFGR_PLLSRC | RCC_PLLCFGR_PLLM | RCC_PLLCFGR_PLLN | RCC_PLLCFGR_PLLR);
  257. RCC->PLLCFGR = (RCC_PLLCFGR_PLLSRC_HSI | RCC_PLLCFGR_PLLM_0 | (9 << RCC_PLLCFGR_PLLN_Pos) | RCC_PLLCFGR_PLLR_1);
  258. RCC->PLLCFGR |= RCC_PLLCFGR_PLLREN; // RCC_PLL_EnableDomain_SYS
  259. RCC->CR |= RCC_CR_PLLON; // RCC_PLL_Enable
  260. while((RCC->CR & RCC_CR_PLLRDY) == 0);
  261. /* Sysclk activation on the main PLL */
  262. RCC->CFGR &= RCC_CFGR_SW;
  263. RCC->CFGR |= RCC_CFGR_SW_1;
  264. while((RCC->CFGR & RCC_CFGR_SWS) != RCC_CFGR_SWS_1);
  265. /* Update CMSIS variable (which can be updated also through SystemCoreClockUpdate function) */
  266. SystemCoreClock = 24000000;
  267. /* Set I2C Clock Source */
  268. RCC->CCIPR &= ~(RCC_CCIPR_I2C1SEL);
  269. RCC->CCIPR |= RCC_CCIPR_I2C1SEL_1;
  270. }
  271. /**
  272. * @brief GPIO Initialization Function
  273. * @param None
  274. * @retval None
  275. */
  276. static void GPIO_Init(void)
  277. {
  278. /* EXTI Line: falling, no pull, input */
  279. // interrupt on line 14
  280. EXTI->IMR1 |= EXTI_IMR1_IM14;
  281. // wake-up with event ?
  282. //EXTI->EMR1 |= EXTI_EMR1_EM14;
  283. // TRIGGER FALLING
  284. EXTI->FTSR1 = EXTI_FTSR1_FT14;
  285. // external interrupt selection - PC14 to EXTI14
  286. EXTI->EXTICR[3] = EXTI_EXTICR4_EXTI14_1;
  287. /* EXTI interrupt init*/
  288. NVIC_SetPriority(EXTI4_15_IRQn, 0);
  289. NVIC_EnableIRQ(EXTI4_15_IRQn);
  290. /* set GPIO modes */
  291. GPIO_SetPinMode(IRQ_GPIO_Port, IRQ_Pin, GPIO_MODE_IN);
  292. GPIO_SetPinPull(IRQ_GPIO_Port, IRQ_Pin, GPIO_PUPDR_UP);
  293. /* L0, L1, L2, L3 - IN-15 symbols control, PP out, high speed, pull down */
  294. GPIO_SetPinMode(LC0_GPIO_Port, LC0_Pin, GPIO_MODE_OUT);
  295. GPIO_SetPinSpeed(LC0_GPIO_Port, LC0_Pin, GPIO_OSPEED_HI);
  296. GPIO_SetPinPull(LC0_GPIO_Port, LC0_Pin, GPIO_PUPDR_DW);
  297. GPIO_SetPinMode(LC1_GPIO_Port, LC1_Pin, GPIO_MODE_OUT);
  298. GPIO_SetPinSpeed(LC1_GPIO_Port, LC1_Pin, GPIO_OSPEED_HI);
  299. GPIO_SetPinPull(LC1_GPIO_Port, LC1_Pin, GPIO_PUPDR_DW);
  300. GPIO_SetPinMode(LC2_GPIO_Port, LC2_Pin, GPIO_MODE_OUT);
  301. GPIO_SetPinSpeed(LC2_GPIO_Port, LC2_Pin, GPIO_OSPEED_HI);
  302. GPIO_SetPinPull(LC2_GPIO_Port, LC2_Pin, GPIO_PUPDR_DW);
  303. GPIO_SetPinMode(LC3_GPIO_Port, LC3_Pin, GPIO_MODE_OUT);
  304. GPIO_SetPinSpeed(LC3_GPIO_Port, LC3_Pin, GPIO_OSPEED_HI);
  305. GPIO_SetPinPull(LC3_GPIO_Port, LC3_Pin, GPIO_PUPDR_DW);
  306. /* Pwer Shutdown: PP out, high speed, pull down */
  307. GPIO_SetPinMode(SHDN_GPIO_Port, SHDN_Pin, GPIO_MODE_OUT);
  308. GPIO_SetPinSpeed(SHDN_GPIO_Port, SHDN_Pin, GPIO_OSPEED_HI);
  309. GPIO_SetPinPull(SHDN_GPIO_Port, SHDN_Pin, GPIO_PUPDR_DW);
  310. /* SPI Latch: OD out, high speed, no pull */
  311. GPIO_SetPinMode(Latch_GPIO_Port, Latch_Pin, GPIO_MODE_OUT);
  312. GPIO_SetPinOutputType(Latch_GPIO_Port, Latch_Pin, GPIO_OTYPE_OD);
  313. GPIO_SetPinSpeed(Latch_GPIO_Port, Latch_Pin, GPIO_OSPEED_HI);
  314. /* UART_Enable: PP out, low speed, no pull*/
  315. GPIO_SetPinMode(UART_EN_GPIO_Port, UART_EN_Pin, GPIO_MODE_OUT);
  316. /* UART_State: input, pull up */
  317. GPIO_SetPinPull(UART_ST_GPIO_Port, UART_ST_Pin, GPIO_PUPDR_UP);
  318. GPIO_SetPinMode(UART_ST_GPIO_Port, UART_ST_Pin, GPIO_MODE_IN);
  319. /* BTN1, BTN2, BTN3, BTN4: input, pull up */
  320. GPIO_SetPinPull(BTN1_GPIO_Port, BTN1_Pin, GPIO_PUPDR_UP);
  321. GPIO_SetPinMode(BTN1_GPIO_Port, BTN1_Pin, GPIO_MODE_IN);
  322. GPIO_SetPinPull(BTN2_GPIO_Port, BTN2_Pin, GPIO_PUPDR_UP);
  323. GPIO_SetPinMode(BTN2_GPIO_Port, BTN2_Pin, GPIO_MODE_IN);
  324. GPIO_SetPinPull(BTN3_GPIO_Port, BTN3_Pin, GPIO_PUPDR_UP);
  325. GPIO_SetPinMode(BTN3_GPIO_Port, BTN3_Pin, GPIO_MODE_IN);
  326. GPIO_SetPinPull(BTN4_GPIO_Port, BTN4_Pin, GPIO_PUPDR_UP);
  327. GPIO_SetPinMode(BTN4_GPIO_Port, BTN4_Pin, GPIO_MODE_IN);
  328. }
  329. /**
  330. * Enable DMA controller clock
  331. */
  332. static void DMA_Init(void)
  333. {
  334. /* DMA controller clock enable */
  335. RCC->AHBENR |= RCC_AHBENR_DMA1EN;
  336. /* enable DMA1 clock in Sleep/Stop mode */
  337. //RCC->AHBSMENR |= RCC_AHBSMENR_DMA1SMEN;
  338. /* DMA interrupt init */
  339. /* DMA1_Channel1_IRQn interrupt configuration */
  340. NVIC_SetPriority(DMA1_Channel1_IRQn, 0);
  341. NVIC_EnableIRQ(DMA1_Channel1_IRQn);
  342. /* DMA1_Channel2_3_IRQn interrupt configuration */
  343. NVIC_SetPriority(DMA1_Channel2_3_IRQn, 0);
  344. NVIC_EnableIRQ(DMA1_Channel2_3_IRQn);
  345. }
  346. /**
  347. * @brief I2C1 Initialization Function
  348. * @param None
  349. * @retval None
  350. */
  351. static void I2C1_Init(void)
  352. {
  353. /** I2C1 GPIO Configuration
  354. PB8 ------> I2C1_SCL
  355. PB9 ------> I2C1_SDA
  356. */
  357. GPIO_SetPinMode(GPIOB, GPIO_PIN_8, GPIO_MODE_AFF);
  358. GPIO_SetPinOutputType(GPIOB, GPIO_PIN_8, GPIO_OTYPE_OD);
  359. GPIO_SetPinSpeed(GPIOB, GPIO_PIN_8, GPIO_OSPEED_HI);
  360. GPIO_SetPinPull(GPIOB, GPIO_PIN_8, GPIO_PUPDR_UP);
  361. GPIO_SetAFPin_8_15(GPIOB, GPIO_PIN_8, GPIO_AF_6);
  362. GPIO_SetPinMode(GPIOB, GPIO_PIN_9, GPIO_MODE_AFF);
  363. GPIO_SetPinOutputType(GPIOB, GPIO_PIN_9, GPIO_OTYPE_OD);
  364. GPIO_SetPinSpeed(GPIOB, GPIO_PIN_9, GPIO_OSPEED_HI);
  365. GPIO_SetPinPull(GPIOB, GPIO_PIN_9, GPIO_PUPDR_UP);
  366. GPIO_SetAFPin_8_15(GPIOB, GPIO_PIN_9, GPIO_AF_6);
  367. /** I2C1 DMA Init */
  368. /* I2C1_RX Init: Priority medium, Memory increment, read from perephireal,
  369. transfer error interrupt enable, transfer complete interrupt enable */
  370. DMA1_Channel2->CCR = (DMA_CCR_PL_0 | DMA_CCR_MINC | DMA_CCR_TEIE | DMA_CCR_TCIE);
  371. /* Route DMA channel 2 to I2C1 RX */
  372. DMAMUX1_Channel1->CCR = 10;
  373. /* I2C1_TX Init: Priority medium, Memory increment, read from memory,
  374. transfer error interrupt enable, transfer complete interrupt enable */
  375. DMA1_Channel3->CCR = (DMA_CCR_PL_0 | DMA_CCR_MINC| DMA_CCR_DIR | DMA_CCR_TEIE | DMA_CCR_TCIE);
  376. /* Route DMA channel 3 to I2C1 TX */
  377. DMAMUX1_Channel2->CCR = 11;
  378. /** I2C Initialization: I2C_Fast */
  379. I2C1->TIMINGR = 0x0010061A;
  380. I2C1->CR2 = I2C_CR2_AUTOEND;
  381. I2C1->CR1 = I2C_CR1_PE;
  382. }
  383. /**
  384. * @brief SPI1 Initialization Function
  385. * @param None
  386. * @retval None
  387. */
  388. static void SPI1_Init(void)
  389. {
  390. /**SPI1 GPIO Configuration
  391. PB3 ------> SPI1_SCK
  392. PB5 ------> SPI1_MOSI
  393. */
  394. GPIO_SetPinMode(GPIOB, GPIO_PIN_3, GPIO_MODE_AFF);
  395. GPIO_SetPinOutputType(GPIOB, GPIO_PIN_3, GPIO_OTYPE_OD);
  396. GPIO_SetPinSpeed(GPIOB, GPIO_PIN_3, GPIO_OSPEED_HI);
  397. GPIO_SetPinMode(GPIOB, GPIO_PIN_5, GPIO_MODE_AFF);
  398. GPIO_SetPinOutputType(GPIOB, GPIO_PIN_5, GPIO_OTYPE_OD);
  399. GPIO_SetPinSpeed(GPIOB, GPIO_PIN_5, GPIO_OSPEED_HI);
  400. /* SPI1 DMA Init */
  401. /* SPI1_TX Init: Priority high, Memory increment, read from memory, circular mode,
  402. Enable DMA transfer complete/error interrupts */
  403. DMA1_Channel1->CCR = (DMA_CCR_PL_1 | DMA_CCR_MINC | DMA_CCR_CIRC | DMA_CCR_TEIE | DMA_CCR_DIR | DMA_CCR_TCIE);
  404. /* Route DMA channel 1 to SPI1 TX */
  405. DMAMUX1_Channel0->CCR = 0x11;
  406. /* SPI1 interrupt Init */
  407. NVIC_SetPriority(SPI1_IRQn, 0);
  408. NVIC_EnableIRQ(SPI1_IRQn);
  409. /* SPI1 parameter configuration: master mode, data 8 bit, divider = 16, TX DMA */
  410. SPI1->CR1 = (SPI_CR1_MSTR | SPI_CR1_BR_1 | SPI_CR1_BR_0 | SPI_CR1_SSM | SPI_CR1_SSI);
  411. SPI1->CR2 = (SPI_CR2_DS_2 | SPI_CR2_DS_1 | SPI_CR2_DS_0 | SPI_CR2_TXDMAEN | SPI_CR2_FRXTH);
  412. }
  413. /**
  414. * @brief TIM1 Initialization Function
  415. * @param None
  416. * @retval None
  417. */
  418. static void TIM1_Init(void)
  419. {
  420. /* target clock */
  421. TIM1->PSC = TIM1_PSC; // prescaler
  422. TIM1->ARR = TIM1_ARR; // auto reload value
  423. TIM1->CR1 = TIM_CR1_ARPE;
  424. // initial pwm value
  425. TIM1->CCR1 = PWM_TUBE_INIT_VAL;
  426. TIM1->CCR2 = PWM_LED_INIT_VAL;
  427. TIM1->CCR3 = PWM_LED_INIT_VAL;
  428. TIM1->CCR4 = PWM_LED_INIT_VAL;
  429. // pwm mode 1 for 4 chanels
  430. TIM1->CCMR1 = (TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC2M_1 | TIM_CCMR1_OC2M_2 | TIM_CCMR1_OC1PE | TIM_CCMR1_OC2PE);
  431. TIM1->CCMR2 = (TIM_CCMR2_OC3M_1 | TIM_CCMR2_OC3M_2 | TIM_CCMR2_OC4M_1 | TIM_CCMR2_OC4M_2 | TIM_CCMR2_OC3PE | TIM_CCMR2_OC4PE);
  432. // reset int flag - not needed, int unused
  433. //TIM1->SR |= TIM_SR_UIF;
  434. TIM1->BDTR = TIM_BDTR_MOE; // enable main output
  435. TIM1->EGR = TIM_EGR_UG; // force timer update
  436. /* TIM1 CC_EnableChannel */
  437. TIM1->CCER = (TIM_CCER_CC1E | TIM_CCER_CC2E | TIM_CCER_CC3E | TIM_CCER_CC4E);
  438. /* TIM_EnableCounter */
  439. TIM1->CR1 |= TIM_CR1_CEN;
  440. /** TIM1 GPIO Configuration
  441. PA8 ------> TIM1_CH1
  442. PA9 ------> TIM1_CH2
  443. PA10 ------> TIM1_CH3
  444. PA11 [PA9] ------> TIM1_CH4
  445. */
  446. GPIO_SetPinMode(PWM_1_GPIO_Port, PWM_1_Pin, GPIO_MODE_AFF);
  447. GPIO_SetPinSpeed(PWM_1_GPIO_Port, PWM_1_Pin, GPIO_OSPEED_HI);
  448. GPIO_SetPinPull(PWM_1_GPIO_Port, PWM_1_Pin, GPIO_PUPDR_DW);
  449. GPIO_SetAFPin_8_15(PWM_1_GPIO_Port, PWM_1_Pin, GPIO_AF_2);
  450. GPIO_SetPinMode(PWM_R_GPIO_Port, PWM_R_Pin, GPIO_MODE_AFF);
  451. GPIO_SetPinSpeed(PWM_R_GPIO_Port, PWM_R_Pin, GPIO_OSPEED_HI);
  452. GPIO_SetPinPull(PWM_R_GPIO_Port, PWM_R_Pin, GPIO_PUPDR_DW);
  453. GPIO_SetAFPin_8_15(PWM_R_GPIO_Port, PWM_R_Pin, GPIO_AF_2);
  454. GPIO_SetPinMode(PWM_B_GPIO_Port, PWM_B_Pin, GPIO_MODE_AFF);
  455. GPIO_SetPinSpeed(PWM_B_GPIO_Port, PWM_B_Pin, GPIO_OSPEED_HI);
  456. GPIO_SetPinPull(PWM_B_GPIO_Port, PWM_B_Pin, GPIO_PUPDR_DW);
  457. GPIO_SetAFPin_8_15(PWM_B_GPIO_Port, PWM_B_Pin, GPIO_AF_2);
  458. GPIO_SetPinMode(PWM_G_GPIO_Port, PWM_G_Pin, GPIO_MODE_AFF);
  459. GPIO_SetPinSpeed(PWM_G_GPIO_Port, PWM_G_Pin, GPIO_OSPEED_HI);
  460. GPIO_SetPinPull(PWM_G_GPIO_Port, PWM_G_Pin, GPIO_PUPDR_DW);
  461. GPIO_SetAFPin_8_15(PWM_G_GPIO_Port, PWM_G_Pin, GPIO_AF_2);
  462. }
  463. /**
  464. * @brief TIM3 Initialization Function
  465. * @param None
  466. * @retval None
  467. */
  468. static void TIM3_Init(void)
  469. {
  470. /* target clock */
  471. TIM3->PSC = TIM3_PSC; // prescaler
  472. TIM3->ARR = TIM3_ARR; // auto reload value
  473. TIM3->CR1 = TIM_CR1_ARPE;
  474. // initial pwm value
  475. TIM3->CCR1 = PWM_TUBE_INIT_VAL;
  476. TIM3->CCR2 = PWM_TUBE_INIT_VAL;
  477. TIM3->CCR3 = PWM_TUBE_INIT_VAL;
  478. TIM3->CCR4 = PWM_TUBE_INIT_VAL;
  479. // pwm mode 1 for 4 chanels
  480. TIM3->CCMR1 = (TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC2M_1 | TIM_CCMR1_OC2M_2 | TIM_CCMR1_OC1PE | TIM_CCMR1_OC2PE);
  481. TIM3->CCMR2 = (TIM_CCMR2_OC3M_1 | TIM_CCMR2_OC3M_2 | TIM_CCMR2_OC4M_1 | TIM_CCMR2_OC4M_2 | TIM_CCMR2_OC3PE | TIM_CCMR2_OC4PE);
  482. // launch timer
  483. TIM3->EGR = TIM_EGR_UG; // force timer update
  484. /* TIM3 TIM_CC_EnableChannel */
  485. TIM3->CCER = (TIM_CCER_CC1E | TIM_CCER_CC2E | TIM_CCER_CC3E | TIM_CCER_CC4E);
  486. /* TIM3 enable */
  487. TIM3->CR1 |= TIM_CR1_CEN;
  488. /**TIM3 GPIO Configuration
  489. PA6 ------> TIM3_CH1
  490. PA7 ------> TIM3_CH2
  491. PB0 ------> TIM3_CH3
  492. PB1 ------> TIM3_CH4
  493. */
  494. GPIO_SetPinMode(PWM_5_GPIO_Port, PWM_5_Pin, GPIO_MODE_AFF);
  495. GPIO_SetPinSpeed(PWM_5_GPIO_Port, PWM_5_Pin, GPIO_OSPEED_HI);
  496. GPIO_SetPinPull(PWM_5_GPIO_Port, PWM_5_Pin, GPIO_PUPDR_DW);
  497. GPIO_SetAFPin_0_7(PWM_5_GPIO_Port, PWM_5_Pin, GPIO_AF_1);
  498. GPIO_SetPinMode(PWM_4_GPIO_Port, PWM_4_Pin, GPIO_MODE_AFF);
  499. GPIO_SetPinSpeed(PWM_4_GPIO_Port, PWM_4_Pin, GPIO_OSPEED_HI);
  500. GPIO_SetPinPull(PWM_4_GPIO_Port, PWM_4_Pin, GPIO_PUPDR_DW);
  501. GPIO_SetAFPin_0_7(PWM_4_GPIO_Port, PWM_4_Pin, GPIO_AF_1);
  502. GPIO_SetPinMode(PWM_3_GPIO_Port, PWM_3_Pin, GPIO_MODE_AFF);
  503. GPIO_SetPinSpeed(PWM_3_GPIO_Port, PWM_3_Pin, GPIO_OSPEED_HI);
  504. GPIO_SetPinPull(PWM_3_GPIO_Port, PWM_3_Pin, GPIO_PUPDR_DW);
  505. GPIO_SetAFPin_0_7(PWM_3_GPIO_Port, PWM_3_Pin, GPIO_AF_1);
  506. GPIO_SetPinMode(PWM_2_GPIO_Port, PWM_2_Pin, GPIO_MODE_AFF);
  507. GPIO_SetPinSpeed(PWM_2_GPIO_Port, PWM_2_Pin, GPIO_OSPEED_HI);
  508. GPIO_SetPinPull(PWM_2_GPIO_Port, PWM_2_Pin, GPIO_PUPDR_DW);
  509. GPIO_SetAFPin_0_7(PWM_2_GPIO_Port, PWM_2_Pin, GPIO_AF_1);
  510. }
  511. /**
  512. * @brief TIM14 Initialization Function
  513. * @param None
  514. * @retval None
  515. * @desc "Блинкование" разрядами - 0,75/0,25 сек вкл/выкл.
  516. */
  517. static void TIM14_Init(void)
  518. {
  519. /* Peripheral clock enable */
  520. RCC->APBENR2 |= RCC_APBENR2_TIM14EN;
  521. /* TIM14 interrupt Init */
  522. NVIC_SetPriority(TIM14_IRQn, 0);
  523. NVIC_EnableIRQ(TIM14_IRQn);
  524. /* Set TIM14 for 1 sec period */
  525. TIM14->PSC = TIM14_PSC;
  526. TIM14->ARR = TIM14_ARR;
  527. /* Enable: Auto-reload preload, no One-pulse mode, */
  528. TIM14->CR1 = (TIM_CR1_ARPE); // | TIM_CR1_OPM);
  529. /* OC or PWM? (for pwm - (TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_1) ) , Output compare 1 preload */
  530. TIM14->CCMR1 = (TIM_CCMR1_OC1M_0 | TIM_CCMR1_OC1PE);
  531. /* Enable Channel_1 or no needed ??? */
  532. TIM14->CCER = TIM_CCER_CC1E;
  533. /* Impulse value in msek */
  534. TIM14->CCR1 = TIM14_PULSE_VAL;
  535. /* Enable IRQ for Update end CaptureCompare envents or only CC ??? */
  536. TIM14->DIER = (TIM_DIER_UIE | TIM_DIER_CC1IE);
  537. //TIM14->DIER = TIM_DIER_CC1IE;
  538. }
  539. /**
  540. * На старте активируем все каналы, при совпадении отключаем (не)нужные.
  541. */
  542. void Blink_Start(void)
  543. {
  544. /* enable all channels */
  545. TUBE_ALL_ON;
  546. /* clear IRQ flags */
  547. TIM14->SR |= TIM_SR_UIF;
  548. TIM14->SR |= TIM_SR_CC1IF;
  549. /* clear counter value */
  550. TIM14->CNT = 0;
  551. /* enable timer */
  552. TIM14->CR1 |= TIM_CR1_CEN;
  553. }
  554. void Blink_Stop(void)
  555. {
  556. /* disable timer */
  557. TIM14->CR1 &= ~(TIM_CR1_CEN);
  558. /* On all tubes */
  559. TUBE_ALL_ON;
  560. }
  561. /**
  562. * @brief TIM16 Initialization Function
  563. * @param None
  564. * @retval None
  565. */
  566. static void TIM16_Init(void)
  567. {
  568. /* Peripheral clock enable */
  569. RCC->APBENR2 |= RCC_APBENR2_TIM16EN;
  570. /* TIM16 interrupt Init */
  571. NVIC_SetPriority(TIM16_IRQn, 0);
  572. NVIC_EnableIRQ(TIM16_IRQn);
  573. /* setup clock */
  574. TIM16->PSC = TIM16_PSC; // prescaler
  575. TIM16->ARR = TIM16_ARR; // auto reload value
  576. TIM16->CR1 = TIM_CR1_ARPE;
  577. // initial pwm value
  578. //TIM16->CCR1 = TIM16_PWM_VAL;
  579. // pwm mode 1 for 1 chanel
  580. TIM16->CCMR1 = (TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1PE);
  581. // reset int flag
  582. TIM16->SR |= TIM_SR_UIF;
  583. TIM16->BDTR = TIM_BDTR_MOE; // enable main output
  584. TIM16->EGR = TIM_EGR_UG; // force timer update
  585. /* TIM16 CC_EnableChannel */
  586. TIM16->CCER = TIM_CCER_CC1E;
  587. /* TIM_EnableCounter */
  588. TIM16->CR1 |= TIM_CR1_CEN;
  589. /* Enable IRQ */
  590. TIM16->DIER = TIM_DIER_UIE;
  591. }
  592. /**
  593. * @brief TIM17 Initialization Function
  594. * @param None
  595. * @retval None
  596. */
  597. static void TIM17_Init(void)
  598. {
  599. /* Peripheral clock enable */
  600. RCC->APBENR2 |= RCC_APBENR2_TIM17EN;
  601. /* TIM17 interrupt Init */
  602. NVIC_SetPriority(TIM17_IRQn, 0);
  603. NVIC_EnableIRQ(TIM17_IRQn);
  604. /* setup clock */
  605. TIM17->PSC = TIM17_PSC; // prescaler
  606. TIM17->ARR = TIM17_ARR; // auto reload value
  607. TIM17->CR1 = TIM_CR1_ARPE;
  608. // initial pwm value
  609. //TIM17->CCR1 = TIM17_PWM_VAL;
  610. // pwm mode 1 for 1 chanel
  611. TIM17->CCMR1 = (TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1PE);
  612. // reset int flag
  613. TIM17->SR |= TIM_SR_UIF;
  614. TIM17->BDTR = TIM_BDTR_MOE; // enable main output
  615. TIM17->EGR = TIM_EGR_UG; // force timer update
  616. /* TIM17 CC_EnableChannel */
  617. TIM17->CCER = TIM_CCER_CC1E;
  618. /* TIM_EnableCounter */
  619. TIM17->CR1 |= TIM_CR1_CEN;
  620. /* Enable IRQ */
  621. TIM17->DIER = TIM_DIER_UIE;
  622. }
  623. /**
  624. * @brief USART1 Initialization Function
  625. * @param None
  626. * @retval None
  627. */
  628. static void USART1_UART_Init(void)
  629. {
  630. /* Peripheral clock enable */
  631. RCC->APBENR2 |= RCC_APBENR2_USART1EN;
  632. /**USART1 GPIO Configuration
  633. PB6 ------> USART1_TX
  634. PB7 ------> USART1_RX
  635. */
  636. GPIO_SetPinMode(GPIOB, GPIO_PIN_6, GPIO_MODE_AFF);
  637. GPIO_SetPinSpeed(GPIOB, GPIO_PIN_6, GPIO_OSPEED_HI);
  638. GPIO_SetPinMode(GPIOB, GPIO_PIN_7, GPIO_MODE_AFF);
  639. GPIO_SetPinSpeed(GPIOB, GPIO_PIN_7, GPIO_OSPEED_HI);
  640. /* USART1 interrupt Init */
  641. NVIC_SetPriority(USART1_IRQn, 0);
  642. NVIC_EnableIRQ(USART1_IRQn);
  643. USART1->CR1 |= (USART_CR1_TE |USART_CR1_RE);
  644. USART1->BRR = 138;
  645. /* USART1 Enable */
  646. USART1->CR1 |= USART_CR1_UE;
  647. /* Polling USART1 initialisation */
  648. while((!(USART1->ISR & USART_ISR_TEACK)) || (!(USART1->ISR & USART_ISR_REACK)))
  649. {
  650. }
  651. }