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|
- extern "C" {
- static const uint8_t OFFSET_TAB_CCMRx[] =
- {
- 0x00U,
- 0x00U,
- 0x00U,
- 0x00U,
- 0x04U,
- 0x04U,
- 0x04U,
- 0x3CU,
- 0x3CU
- };
- static const uint8_t SHIFT_TAB_OCxx[] =
- {
- 0U,
- 0U,
- 8U,
- 0U,
- 0U,
- 0U,
- 8U,
- 0U,
- 8U
- };
- static const uint8_t SHIFT_TAB_ICxx[] =
- {
- 0U,
- 0U,
- 8U,
- 0U,
- 0U,
- 0U,
- 8U,
- 0U,
- 0U
- };
- static const uint8_t SHIFT_TAB_CCxP[] =
- {
- 0U,
- 2U,
- 4U,
- 6U,
- 8U,
- 10U,
- 12U,
- 16U,
- 20U
- };
- static const uint8_t SHIFT_TAB_OISx[] =
- {
- 0U,
- 1U,
- 2U,
- 3U,
- 4U,
- 5U,
- 6U,
- 8U,
- 10U
- };
- ((Source == LL_TIM_BKIN_SOURCE_BKIN) ? 0U :\
- (Source == LL_TIM_BKIN_SOURCE_BKCOMP1) ? 1U :\
- (Source == LL_TIM_BKIN_SOURCE_BKCOMP2) ? 2U :3U)
- (((__CHANNEL__) == LL_TIM_CHANNEL_CH1) ? 0U :\
- ((__CHANNEL__) == LL_TIM_CHANNEL_CH1N) ? 1U :\
- ((__CHANNEL__) == LL_TIM_CHANNEL_CH2) ? 2U :\
- ((__CHANNEL__) == LL_TIM_CHANNEL_CH2N) ? 3U :\
- ((__CHANNEL__) == LL_TIM_CHANNEL_CH3) ? 4U :\
- ((__CHANNEL__) == LL_TIM_CHANNEL_CH3N) ? 5U :\
- ((__CHANNEL__) == LL_TIM_CHANNEL_CH4) ? 6U :\
- ((__CHANNEL__) == LL_TIM_CHANNEL_CH5) ? 7U : 8U)
- (((__CKD__) == LL_TIM_CLOCKDIVISION_DIV1) ? ((uint64_t)1000000000000U/(__TIMCLK__)) : \
- ((__CKD__) == LL_TIM_CLOCKDIVISION_DIV2) ? ((uint64_t)1000000000000U/((__TIMCLK__) >> 1U)) : \
- ((uint64_t)1000000000000U/((__TIMCLK__) >> 2U)))
- typedef struct
- {
- uint16_t Prescaler;
- uint32_t CounterMode;
- uint32_t Autoreload;
- uint32_t ClockDivision;
- uint32_t RepetitionCounter;
- } LL_TIM_InitTypeDef;
- typedef struct
- {
- uint32_t OCMode;
- uint32_t OCState;
- uint32_t OCNState;
- uint32_t CompareValue;
- uint32_t OCPolarity;
- uint32_t OCNPolarity;
- uint32_t OCIdleState;
- uint32_t OCNIdleState;
- } LL_TIM_OC_InitTypeDef;
- typedef struct
- {
- uint32_t ICPolarity;
- uint32_t ICActiveInput;
- uint32_t ICPrescaler;
- uint32_t ICFilter;
- } LL_TIM_IC_InitTypeDef;
- typedef struct
- {
- uint32_t EncoderMode;
- uint32_t IC1Polarity;
- uint32_t IC1ActiveInput;
- uint32_t IC1Prescaler;
- uint32_t IC1Filter;
- uint32_t IC2Polarity;
- uint32_t IC2ActiveInput;
- uint32_t IC2Prescaler;
- uint32_t IC2Filter;
- } LL_TIM_ENCODER_InitTypeDef;
- typedef struct
- {
- uint32_t IC1Polarity;
- uint32_t IC1Prescaler;
- uint32_t IC1Filter;
- uint32_t CommutationDelay;
- } LL_TIM_HALLSENSOR_InitTypeDef;
- typedef struct
- {
- uint32_t OSSRState;
- uint32_t OSSIState;
- uint32_t LockLevel;
- uint8_t DeadTime;
- uint16_t BreakState;
- uint32_t BreakPolarity;
- uint32_t BreakFilter;
- uint32_t BreakAFMode;
- uint32_t Break2State;
- uint32_t Break2Polarity;
- uint32_t Break2Filter;
- uint32_t Break2AFMode;
- uint32_t AutomaticOutput;
- } LL_TIM_BDTR_InitTypeDef;
- (READ_BIT((__CNT__), TIM_CNT_UIFCPY) >> TIM_CNT_UIFCPY_Pos)
- ( (((uint64_t)((__DT__)*1000U)) < ((DT_DELAY_1+1U) * TIM_CALC_DTS((__TIMCLK__), (__CKD__)))) ? (uint8_t)(((uint64_t)((__DT__)*1000U) / TIM_CALC_DTS((__TIMCLK__), (__CKD__))) & DT_DELAY_1) : \
- (((uint64_t)((__DT__)*1000U)) < ((64U + (DT_DELAY_2+1U)) * 2U * TIM_CALC_DTS((__TIMCLK__), (__CKD__)))) ? (uint8_t)(DT_RANGE_2 | ((uint8_t)((uint8_t)((((uint64_t)((__DT__)*1000U))/ TIM_CALC_DTS((__TIMCLK__), (__CKD__))) >> 1U) - (uint8_t) 64) & DT_DELAY_2)) :\
- (((uint64_t)((__DT__)*1000U)) < ((32U + (DT_DELAY_3+1U)) * 8U * TIM_CALC_DTS((__TIMCLK__), (__CKD__)))) ? (uint8_t)(DT_RANGE_3 | ((uint8_t)((uint8_t)(((((uint64_t)(__DT__)*1000U))/ TIM_CALC_DTS((__TIMCLK__), (__CKD__))) >> 3U) - (uint8_t) 32) & DT_DELAY_3)) :\
- (((uint64_t)((__DT__)*1000U)) < ((32U + (DT_DELAY_4+1U)) * 16U * TIM_CALC_DTS((__TIMCLK__), (__CKD__)))) ? (uint8_t)(DT_RANGE_4 | ((uint8_t)((uint8_t)(((((uint64_t)(__DT__)*1000U))/ TIM_CALC_DTS((__TIMCLK__), (__CKD__))) >> 4U) - (uint8_t) 32) & DT_DELAY_4)) :\
- 0U)
- (((__TIMCLK__) >= (__CNTCLK__)) ? (uint32_t)(((__TIMCLK__)/(__CNTCLK__)) - 1U) : 0U)
- ((((__TIMCLK__)/((__PSC__) + 1U)) >= (__FREQ__)) ? (((__TIMCLK__)/((__FREQ__) * ((__PSC__) + 1U))) - 1U) : 0U)
- ((uint32_t)(((uint64_t)(__TIMCLK__) * (uint64_t)(__DELAY__)) \
- / ((uint64_t)1000000U * (uint64_t)((__PSC__) + 1U))))
- ((uint32_t)(__LL_TIM_CALC_DELAY((__TIMCLK__), (__PSC__), (__PULSE__)) \
- + __LL_TIM_CALC_DELAY((__TIMCLK__), (__PSC__), (__DELAY__))))
- ((uint32_t)(0x01U << (((__ICPSC__) >> 16U) >> TIM_CCMR1_IC1PSC_Pos)))
- __STATIC_INLINE void LL_TIM_EnableCounter(TIM_TypeDef *TIMx)
- {
- SET_BIT(TIMx->CR1, TIM_CR1_CEN);
- }
- __STATIC_INLINE void LL_TIM_DisableCounter(TIM_TypeDef *TIMx)
- {
- CLEAR_BIT(TIMx->CR1, TIM_CR1_CEN);
- }
- __STATIC_INLINE uint32_t LL_TIM_IsEnabledCounter(TIM_TypeDef *TIMx)
- {
- return ((READ_BIT(TIMx->CR1, TIM_CR1_CEN) == (TIM_CR1_CEN)) ? 1UL : 0UL);
- }
- __STATIC_INLINE void LL_TIM_EnableUpdateEvent(TIM_TypeDef *TIMx)
- {
- CLEAR_BIT(TIMx->CR1, TIM_CR1_UDIS);
- }
- __STATIC_INLINE void LL_TIM_DisableUpdateEvent(TIM_TypeDef *TIMx)
- {
- SET_BIT(TIMx->CR1, TIM_CR1_UDIS);
- }
- __STATIC_INLINE uint32_t LL_TIM_IsEnabledUpdateEvent(TIM_TypeDef *TIMx)
- {
- return ((READ_BIT(TIMx->CR1, TIM_CR1_UDIS) == (uint32_t)RESET) ? 1UL : 0UL);
- }
- __STATIC_INLINE void LL_TIM_SetUpdateSource(TIM_TypeDef *TIMx, uint32_t UpdateSource)
- {
- MODIFY_REG(TIMx->CR1, TIM_CR1_URS, UpdateSource);
- }
- __STATIC_INLINE uint32_t LL_TIM_GetUpdateSource(TIM_TypeDef *TIMx)
- {
- return (uint32_t)(READ_BIT(TIMx->CR1, TIM_CR1_URS));
- }
- __STATIC_INLINE void LL_TIM_SetOnePulseMode(TIM_TypeDef *TIMx, uint32_t OnePulseMode)
- {
- MODIFY_REG(TIMx->CR1, TIM_CR1_OPM, OnePulseMode);
- }
- __STATIC_INLINE uint32_t LL_TIM_GetOnePulseMode(TIM_TypeDef *TIMx)
- {
- return (uint32_t)(READ_BIT(TIMx->CR1, TIM_CR1_OPM));
- }
- __STATIC_INLINE void LL_TIM_SetCounterMode(TIM_TypeDef *TIMx, uint32_t CounterMode)
- {
- MODIFY_REG(TIMx->CR1, (TIM_CR1_DIR | TIM_CR1_CMS), CounterMode);
- }
- __STATIC_INLINE uint32_t LL_TIM_GetCounterMode(TIM_TypeDef *TIMx)
- {
- return (uint32_t)(READ_BIT(TIMx->CR1, TIM_CR1_DIR | TIM_CR1_CMS));
- }
- __STATIC_INLINE void LL_TIM_EnableARRPreload(TIM_TypeDef *TIMx)
- {
- SET_BIT(TIMx->CR1, TIM_CR1_ARPE);
- }
- __STATIC_INLINE void LL_TIM_DisableARRPreload(TIM_TypeDef *TIMx)
- {
- CLEAR_BIT(TIMx->CR1, TIM_CR1_ARPE);
- }
- __STATIC_INLINE uint32_t LL_TIM_IsEnabledARRPreload(TIM_TypeDef *TIMx)
- {
- return ((READ_BIT(TIMx->CR1, TIM_CR1_ARPE) == (TIM_CR1_ARPE)) ? 1UL : 0UL);
- }
- __STATIC_INLINE void LL_TIM_SetClockDivision(TIM_TypeDef *TIMx, uint32_t ClockDivision)
- {
- MODIFY_REG(TIMx->CR1, TIM_CR1_CKD, ClockDivision);
- }
- __STATIC_INLINE uint32_t LL_TIM_GetClockDivision(TIM_TypeDef *TIMx)
- {
- return (uint32_t)(READ_BIT(TIMx->CR1, TIM_CR1_CKD));
- }
- __STATIC_INLINE void LL_TIM_SetCounter(TIM_TypeDef *TIMx, uint32_t Counter)
- {
- WRITE_REG(TIMx->CNT, Counter);
- }
- __STATIC_INLINE uint32_t LL_TIM_GetCounter(TIM_TypeDef *TIMx)
- {
- return (uint32_t)(READ_REG(TIMx->CNT));
- }
- __STATIC_INLINE uint32_t LL_TIM_GetDirection(TIM_TypeDef *TIMx)
- {
- return (uint32_t)(READ_BIT(TIMx->CR1, TIM_CR1_DIR));
- }
- __STATIC_INLINE void LL_TIM_SetPrescaler(TIM_TypeDef *TIMx, uint32_t Prescaler)
- {
- WRITE_REG(TIMx->PSC, Prescaler);
- }
- __STATIC_INLINE uint32_t LL_TIM_GetPrescaler(TIM_TypeDef *TIMx)
- {
- return (uint32_t)(READ_REG(TIMx->PSC));
- }
- __STATIC_INLINE void LL_TIM_SetAutoReload(TIM_TypeDef *TIMx, uint32_t AutoReload)
- {
- WRITE_REG(TIMx->ARR, AutoReload);
- }
- __STATIC_INLINE uint32_t LL_TIM_GetAutoReload(TIM_TypeDef *TIMx)
- {
- return (uint32_t)(READ_REG(TIMx->ARR));
- }
- __STATIC_INLINE void LL_TIM_SetRepetitionCounter(TIM_TypeDef *TIMx, uint32_t RepetitionCounter)
- {
- WRITE_REG(TIMx->RCR, RepetitionCounter);
- }
- __STATIC_INLINE uint32_t LL_TIM_GetRepetitionCounter(TIM_TypeDef *TIMx)
- {
- return (uint32_t)(READ_REG(TIMx->RCR));
- }
- __STATIC_INLINE void LL_TIM_EnableUIFRemap(TIM_TypeDef *TIMx)
- {
- SET_BIT(TIMx->CR1, TIM_CR1_UIFREMAP);
- }
- __STATIC_INLINE void LL_TIM_DisableUIFRemap(TIM_TypeDef *TIMx)
- {
- CLEAR_BIT(TIMx->CR1, TIM_CR1_UIFREMAP);
- }
- __STATIC_INLINE uint32_t LL_TIM_IsActiveUIFCPY(uint32_t Counter)
- {
- return (((Counter & TIM_CNT_UIFCPY) == (TIM_CNT_UIFCPY)) ? 1UL : 0UL);
- }
- __STATIC_INLINE void LL_TIM_CC_EnablePreload(TIM_TypeDef *TIMx)
- {
- SET_BIT(TIMx->CR2, TIM_CR2_CCPC);
- }
- __STATIC_INLINE void LL_TIM_CC_DisablePreload(TIM_TypeDef *TIMx)
- {
- CLEAR_BIT(TIMx->CR2, TIM_CR2_CCPC);
- }
- __STATIC_INLINE void LL_TIM_CC_SetUpdate(TIM_TypeDef *TIMx, uint32_t CCUpdateSource)
- {
- MODIFY_REG(TIMx->CR2, TIM_CR2_CCUS, CCUpdateSource);
- }
- __STATIC_INLINE void LL_TIM_CC_SetDMAReqTrigger(TIM_TypeDef *TIMx, uint32_t DMAReqTrigger)
- {
- MODIFY_REG(TIMx->CR2, TIM_CR2_CCDS, DMAReqTrigger);
- }
- __STATIC_INLINE uint32_t LL_TIM_CC_GetDMAReqTrigger(TIM_TypeDef *TIMx)
- {
- return (uint32_t)(READ_BIT(TIMx->CR2, TIM_CR2_CCDS));
- }
- __STATIC_INLINE void LL_TIM_CC_SetLockLevel(TIM_TypeDef *TIMx, uint32_t LockLevel)
- {
- MODIFY_REG(TIMx->BDTR, TIM_BDTR_LOCK, LockLevel);
- }
- __STATIC_INLINE void LL_TIM_CC_EnableChannel(TIM_TypeDef *TIMx, uint32_t Channels)
- {
- SET_BIT(TIMx->CCER, Channels);
- }
- __STATIC_INLINE void LL_TIM_CC_DisableChannel(TIM_TypeDef *TIMx, uint32_t Channels)
- {
- CLEAR_BIT(TIMx->CCER, Channels);
- }
- __STATIC_INLINE uint32_t LL_TIM_CC_IsEnabledChannel(TIM_TypeDef *TIMx, uint32_t Channels)
- {
- return ((READ_BIT(TIMx->CCER, Channels) == (Channels)) ? 1UL : 0UL);
- }
- __STATIC_INLINE void LL_TIM_OC_ConfigOutput(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t Configuration)
- {
- uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
- __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel]));
- CLEAR_BIT(*pReg, (TIM_CCMR1_CC1S << SHIFT_TAB_OCxx[iChannel]));
- MODIFY_REG(TIMx->CCER, (TIM_CCER_CC1P << SHIFT_TAB_CCxP[iChannel]),
- (Configuration & TIM_CCER_CC1P) << SHIFT_TAB_CCxP[iChannel]);
- MODIFY_REG(TIMx->CR2, (TIM_CR2_OIS1 << SHIFT_TAB_OISx[iChannel]),
- (Configuration & TIM_CR2_OIS1) << SHIFT_TAB_OISx[iChannel]);
- }
- __STATIC_INLINE void LL_TIM_OC_SetMode(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t Mode)
- {
- uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
- __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel]));
- MODIFY_REG(*pReg, ((TIM_CCMR1_OC1M | TIM_CCMR1_CC1S) << SHIFT_TAB_OCxx[iChannel]), Mode << SHIFT_TAB_OCxx[iChannel]);
- }
- __STATIC_INLINE uint32_t LL_TIM_OC_GetMode(TIM_TypeDef *TIMx, uint32_t Channel)
- {
- uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
- const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel]));
- return (READ_BIT(*pReg, ((TIM_CCMR1_OC1M | TIM_CCMR1_CC1S) << SHIFT_TAB_OCxx[iChannel])) >> SHIFT_TAB_OCxx[iChannel]);
- }
- __STATIC_INLINE void LL_TIM_OC_SetPolarity(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t Polarity)
- {
- uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
- MODIFY_REG(TIMx->CCER, (TIM_CCER_CC1P << SHIFT_TAB_CCxP[iChannel]), Polarity << SHIFT_TAB_CCxP[iChannel]);
- }
- __STATIC_INLINE uint32_t LL_TIM_OC_GetPolarity(TIM_TypeDef *TIMx, uint32_t Channel)
- {
- uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
- return (READ_BIT(TIMx->CCER, (TIM_CCER_CC1P << SHIFT_TAB_CCxP[iChannel])) >> SHIFT_TAB_CCxP[iChannel]);
- }
- __STATIC_INLINE void LL_TIM_OC_SetIdleState(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t IdleState)
- {
- uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
- MODIFY_REG(TIMx->CR2, (TIM_CR2_OIS1 << SHIFT_TAB_OISx[iChannel]), IdleState << SHIFT_TAB_OISx[iChannel]);
- }
- __STATIC_INLINE uint32_t LL_TIM_OC_GetIdleState(TIM_TypeDef *TIMx, uint32_t Channel)
- {
- uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
- return (READ_BIT(TIMx->CR2, (TIM_CR2_OIS1 << SHIFT_TAB_OISx[iChannel])) >> SHIFT_TAB_OISx[iChannel]);
- }
- __STATIC_INLINE void LL_TIM_OC_EnableFast(TIM_TypeDef *TIMx, uint32_t Channel)
- {
- uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
- __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel]));
- SET_BIT(*pReg, (TIM_CCMR1_OC1FE << SHIFT_TAB_OCxx[iChannel]));
- }
- __STATIC_INLINE void LL_TIM_OC_DisableFast(TIM_TypeDef *TIMx, uint32_t Channel)
- {
- uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
- __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel]));
- CLEAR_BIT(*pReg, (TIM_CCMR1_OC1FE << SHIFT_TAB_OCxx[iChannel]));
- }
- __STATIC_INLINE uint32_t LL_TIM_OC_IsEnabledFast(TIM_TypeDef *TIMx, uint32_t Channel)
- {
- uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
- const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel]));
- uint32_t bitfield = TIM_CCMR1_OC1FE << SHIFT_TAB_OCxx[iChannel];
- return ((READ_BIT(*pReg, bitfield) == bitfield) ? 1UL : 0UL);
- }
- __STATIC_INLINE void LL_TIM_OC_EnablePreload(TIM_TypeDef *TIMx, uint32_t Channel)
- {
- uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
- __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel]));
- SET_BIT(*pReg, (TIM_CCMR1_OC1PE << SHIFT_TAB_OCxx[iChannel]));
- }
- __STATIC_INLINE void LL_TIM_OC_DisablePreload(TIM_TypeDef *TIMx, uint32_t Channel)
- {
- uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
- __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel]));
- CLEAR_BIT(*pReg, (TIM_CCMR1_OC1PE << SHIFT_TAB_OCxx[iChannel]));
- }
- __STATIC_INLINE uint32_t LL_TIM_OC_IsEnabledPreload(TIM_TypeDef *TIMx, uint32_t Channel)
- {
- uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
- const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel]));
- uint32_t bitfield = TIM_CCMR1_OC1PE << SHIFT_TAB_OCxx[iChannel];
- return ((READ_BIT(*pReg, bitfield) == bitfield) ? 1UL : 0UL);
- }
- __STATIC_INLINE void LL_TIM_OC_EnableClear(TIM_TypeDef *TIMx, uint32_t Channel)
- {
- uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
- __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel]));
- SET_BIT(*pReg, (TIM_CCMR1_OC1CE << SHIFT_TAB_OCxx[iChannel]));
- }
- __STATIC_INLINE void LL_TIM_OC_DisableClear(TIM_TypeDef *TIMx, uint32_t Channel)
- {
- uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
- __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel]));
- CLEAR_BIT(*pReg, (TIM_CCMR1_OC1CE << SHIFT_TAB_OCxx[iChannel]));
- }
- __STATIC_INLINE uint32_t LL_TIM_OC_IsEnabledClear(TIM_TypeDef *TIMx, uint32_t Channel)
- {
- uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
- const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel]));
- uint32_t bitfield = TIM_CCMR1_OC1CE << SHIFT_TAB_OCxx[iChannel];
- return ((READ_BIT(*pReg, bitfield) == bitfield) ? 1UL : 0UL);
- }
- __STATIC_INLINE void LL_TIM_OC_SetDeadTime(TIM_TypeDef *TIMx, uint32_t DeadTime)
- {
- MODIFY_REG(TIMx->BDTR, TIM_BDTR_DTG, DeadTime);
- }
- __STATIC_INLINE void LL_TIM_OC_SetCompareCH1(TIM_TypeDef *TIMx, uint32_t CompareValue)
- {
- WRITE_REG(TIMx->CCR1, CompareValue);
- }
- __STATIC_INLINE void LL_TIM_OC_SetCompareCH2(TIM_TypeDef *TIMx, uint32_t CompareValue)
- {
- WRITE_REG(TIMx->CCR2, CompareValue);
- }
- __STATIC_INLINE void LL_TIM_OC_SetCompareCH3(TIM_TypeDef *TIMx, uint32_t CompareValue)
- {
- WRITE_REG(TIMx->CCR3, CompareValue);
- }
- __STATIC_INLINE void LL_TIM_OC_SetCompareCH4(TIM_TypeDef *TIMx, uint32_t CompareValue)
- {
- WRITE_REG(TIMx->CCR4, CompareValue);
- }
- __STATIC_INLINE void LL_TIM_OC_SetCompareCH5(TIM_TypeDef *TIMx, uint32_t CompareValue)
- {
- MODIFY_REG(TIMx->CCR5, TIM_CCR5_CCR5, CompareValue);
- }
- __STATIC_INLINE void LL_TIM_OC_SetCompareCH6(TIM_TypeDef *TIMx, uint32_t CompareValue)
- {
- WRITE_REG(TIMx->CCR6, CompareValue);
- }
- __STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH1(TIM_TypeDef *TIMx)
- {
- return (uint32_t)(READ_REG(TIMx->CCR1));
- }
- __STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH2(TIM_TypeDef *TIMx)
- {
- return (uint32_t)(READ_REG(TIMx->CCR2));
- }
- __STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH3(TIM_TypeDef *TIMx)
- {
- return (uint32_t)(READ_REG(TIMx->CCR3));
- }
- __STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH4(TIM_TypeDef *TIMx)
- {
- return (uint32_t)(READ_REG(TIMx->CCR4));
- }
- __STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH5(TIM_TypeDef *TIMx)
- {
- return (uint32_t)(READ_BIT(TIMx->CCR5, TIM_CCR5_CCR5));
- }
- __STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH6(TIM_TypeDef *TIMx)
- {
- return (uint32_t)(READ_REG(TIMx->CCR6));
- }
- __STATIC_INLINE void LL_TIM_SetCH5CombinedChannels(TIM_TypeDef *TIMx, uint32_t GroupCH5)
- {
- MODIFY_REG(TIMx->CCR5, (TIM_CCR5_GC5C3 | TIM_CCR5_GC5C2 | TIM_CCR5_GC5C1), GroupCH5);
- }
- __STATIC_INLINE void LL_TIM_IC_Config(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t Configuration)
- {
- uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
- __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel]));
- MODIFY_REG(*pReg, ((TIM_CCMR1_IC1F | TIM_CCMR1_IC1PSC | TIM_CCMR1_CC1S) << SHIFT_TAB_ICxx[iChannel]),
- ((Configuration >> 16U) & (TIM_CCMR1_IC1F | TIM_CCMR1_IC1PSC | TIM_CCMR1_CC1S)) << SHIFT_TAB_ICxx[iChannel]);
- MODIFY_REG(TIMx->CCER, ((TIM_CCER_CC1NP | TIM_CCER_CC1P) << SHIFT_TAB_CCxP[iChannel]),
- (Configuration & (TIM_CCER_CC1NP | TIM_CCER_CC1P)) << SHIFT_TAB_CCxP[iChannel]);
- }
- __STATIC_INLINE void LL_TIM_IC_SetActiveInput(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ICActiveInput)
- {
- uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
- __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel]));
- MODIFY_REG(*pReg, ((TIM_CCMR1_CC1S) << SHIFT_TAB_ICxx[iChannel]), (ICActiveInput >> 16U) << SHIFT_TAB_ICxx[iChannel]);
- }
- __STATIC_INLINE uint32_t LL_TIM_IC_GetActiveInput(TIM_TypeDef *TIMx, uint32_t Channel)
- {
- uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
- const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel]));
- return ((READ_BIT(*pReg, ((TIM_CCMR1_CC1S) << SHIFT_TAB_ICxx[iChannel])) >> SHIFT_TAB_ICxx[iChannel]) << 16U);
- }
- __STATIC_INLINE void LL_TIM_IC_SetPrescaler(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ICPrescaler)
- {
- uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
- __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel]));
- MODIFY_REG(*pReg, ((TIM_CCMR1_IC1PSC) << SHIFT_TAB_ICxx[iChannel]), (ICPrescaler >> 16U) << SHIFT_TAB_ICxx[iChannel]);
- }
- __STATIC_INLINE uint32_t LL_TIM_IC_GetPrescaler(TIM_TypeDef *TIMx, uint32_t Channel)
- {
- uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
- const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel]));
- return ((READ_BIT(*pReg, ((TIM_CCMR1_IC1PSC) << SHIFT_TAB_ICxx[iChannel])) >> SHIFT_TAB_ICxx[iChannel]) << 16U);
- }
- __STATIC_INLINE void LL_TIM_IC_SetFilter(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ICFilter)
- {
- uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
- __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel]));
- MODIFY_REG(*pReg, ((TIM_CCMR1_IC1F) << SHIFT_TAB_ICxx[iChannel]), (ICFilter >> 16U) << SHIFT_TAB_ICxx[iChannel]);
- }
- __STATIC_INLINE uint32_t LL_TIM_IC_GetFilter(TIM_TypeDef *TIMx, uint32_t Channel)
- {
- uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
- const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel]));
- return ((READ_BIT(*pReg, ((TIM_CCMR1_IC1F) << SHIFT_TAB_ICxx[iChannel])) >> SHIFT_TAB_ICxx[iChannel]) << 16U);
- }
- __STATIC_INLINE void LL_TIM_IC_SetPolarity(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ICPolarity)
- {
- uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
- MODIFY_REG(TIMx->CCER, ((TIM_CCER_CC1NP | TIM_CCER_CC1P) << SHIFT_TAB_CCxP[iChannel]),
- ICPolarity << SHIFT_TAB_CCxP[iChannel]);
- }
- __STATIC_INLINE uint32_t LL_TIM_IC_GetPolarity(TIM_TypeDef *TIMx, uint32_t Channel)
- {
- uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
- return (READ_BIT(TIMx->CCER, ((TIM_CCER_CC1NP | TIM_CCER_CC1P) << SHIFT_TAB_CCxP[iChannel])) >>
- SHIFT_TAB_CCxP[iChannel]);
- }
- __STATIC_INLINE void LL_TIM_IC_EnableXORCombination(TIM_TypeDef *TIMx)
- {
- SET_BIT(TIMx->CR2, TIM_CR2_TI1S);
- }
- __STATIC_INLINE void LL_TIM_IC_DisableXORCombination(TIM_TypeDef *TIMx)
- {
- CLEAR_BIT(TIMx->CR2, TIM_CR2_TI1S);
- }
- __STATIC_INLINE uint32_t LL_TIM_IC_IsEnabledXORCombination(TIM_TypeDef *TIMx)
- {
- return ((READ_BIT(TIMx->CR2, TIM_CR2_TI1S) == (TIM_CR2_TI1S)) ? 1UL : 0UL);
- }
- __STATIC_INLINE uint32_t LL_TIM_IC_GetCaptureCH1(TIM_TypeDef *TIMx)
- {
- return (uint32_t)(READ_REG(TIMx->CCR1));
- }
- __STATIC_INLINE uint32_t LL_TIM_IC_GetCaptureCH2(TIM_TypeDef *TIMx)
- {
- return (uint32_t)(READ_REG(TIMx->CCR2));
- }
- __STATIC_INLINE uint32_t LL_TIM_IC_GetCaptureCH3(TIM_TypeDef *TIMx)
- {
- return (uint32_t)(READ_REG(TIMx->CCR3));
- }
- __STATIC_INLINE uint32_t LL_TIM_IC_GetCaptureCH4(TIM_TypeDef *TIMx)
- {
- return (uint32_t)(READ_REG(TIMx->CCR4));
- }
- __STATIC_INLINE void LL_TIM_EnableExternalClock(TIM_TypeDef *TIMx)
- {
- SET_BIT(TIMx->SMCR, TIM_SMCR_ECE);
- }
- __STATIC_INLINE void LL_TIM_DisableExternalClock(TIM_TypeDef *TIMx)
- {
- CLEAR_BIT(TIMx->SMCR, TIM_SMCR_ECE);
- }
- __STATIC_INLINE uint32_t LL_TIM_IsEnabledExternalClock(TIM_TypeDef *TIMx)
- {
- return ((READ_BIT(TIMx->SMCR, TIM_SMCR_ECE) == (TIM_SMCR_ECE)) ? 1UL : 0UL);
- }
- __STATIC_INLINE void LL_TIM_SetClockSource(TIM_TypeDef *TIMx, uint32_t ClockSource)
- {
- MODIFY_REG(TIMx->SMCR, TIM_SMCR_SMS | TIM_SMCR_ECE, ClockSource);
- }
- __STATIC_INLINE void LL_TIM_SetEncoderMode(TIM_TypeDef *TIMx, uint32_t EncoderMode)
- {
- MODIFY_REG(TIMx->SMCR, TIM_SMCR_SMS, EncoderMode);
- }
- __STATIC_INLINE void LL_TIM_SetTriggerOutput(TIM_TypeDef *TIMx, uint32_t TimerSynchronization)
- {
- MODIFY_REG(TIMx->CR2, TIM_CR2_MMS, TimerSynchronization);
- }
- __STATIC_INLINE void LL_TIM_SetTriggerOutput2(TIM_TypeDef *TIMx, uint32_t ADCSynchronization)
- {
- MODIFY_REG(TIMx->CR2, TIM_CR2_MMS2, ADCSynchronization);
- }
- __STATIC_INLINE void LL_TIM_SetSlaveMode(TIM_TypeDef *TIMx, uint32_t SlaveMode)
- {
- MODIFY_REG(TIMx->SMCR, TIM_SMCR_SMS, SlaveMode);
- }
- __STATIC_INLINE void LL_TIM_SetTriggerInput(TIM_TypeDef *TIMx, uint32_t TriggerInput)
- {
- MODIFY_REG(TIMx->SMCR, TIM_SMCR_TS, TriggerInput);
- }
- __STATIC_INLINE void LL_TIM_EnableMasterSlaveMode(TIM_TypeDef *TIMx)
- {
- SET_BIT(TIMx->SMCR, TIM_SMCR_MSM);
- }
- __STATIC_INLINE void LL_TIM_DisableMasterSlaveMode(TIM_TypeDef *TIMx)
- {
- CLEAR_BIT(TIMx->SMCR, TIM_SMCR_MSM);
- }
- __STATIC_INLINE uint32_t LL_TIM_IsEnabledMasterSlaveMode(TIM_TypeDef *TIMx)
- {
- return ((READ_BIT(TIMx->SMCR, TIM_SMCR_MSM) == (TIM_SMCR_MSM)) ? 1UL : 0UL);
- }
- __STATIC_INLINE void LL_TIM_ConfigETR(TIM_TypeDef *TIMx, uint32_t ETRPolarity, uint32_t ETRPrescaler,
- uint32_t ETRFilter)
- {
- MODIFY_REG(TIMx->SMCR, TIM_SMCR_ETP | TIM_SMCR_ETPS | TIM_SMCR_ETF, ETRPolarity | ETRPrescaler | ETRFilter);
- }
- __STATIC_INLINE void LL_TIM_SetETRSource(TIM_TypeDef *TIMx, uint32_t ETRSource)
- {
- uint32_t etrsel_shift = ((ETRSource == LL_TIM_ETRSOURCE_COMP3) ? 1u : 0u);
- if ((TIMx == TIM1) || (TIMx == TIM2))
- {
- MODIFY_REG(TIMx->AF1, TIMx_AF1_ETRSEL, ETRSource);
- }
- else
- {
- MODIFY_REG(TIMx->AF1, TIMx_AF1_ETRSEL, ETRSource >> etrsel_shift);
- }
- MODIFY_REG(TIMx->AF1, TIMx_AF1_ETRSEL, ETRSource);
- }
- __STATIC_INLINE void LL_TIM_EnableBRK(TIM_TypeDef *TIMx)
- {
- SET_BIT(TIMx->BDTR, TIM_BDTR_BKE);
- }
- __STATIC_INLINE void LL_TIM_DisableBRK(TIM_TypeDef *TIMx)
- {
- CLEAR_BIT(TIMx->BDTR, TIM_BDTR_BKE);
- }
- __STATIC_INLINE void LL_TIM_ConfigBRK(TIM_TypeDef *TIMx, uint32_t BreakPolarity, uint32_t BreakFilter,
- uint32_t BreakAFMode)
- {
- MODIFY_REG(TIMx->BDTR, TIM_BDTR_BKP | TIM_BDTR_BKF | TIM_BDTR_BKBID, BreakPolarity | BreakFilter | BreakAFMode);
- }
- __STATIC_INLINE void LL_TIM_DisarmBRK(TIM_TypeDef *TIMx)
- {
- SET_BIT(TIMx->BDTR, TIM_BDTR_BKDSRM);
- }
- __STATIC_INLINE void LL_TIM_ReArmBRK(TIM_TypeDef *TIMx)
- {
- CLEAR_BIT(TIMx->BDTR, TIM_BDTR_BKDSRM);
- }
- __STATIC_INLINE void LL_TIM_EnableBRK2(TIM_TypeDef *TIMx)
- {
- SET_BIT(TIMx->BDTR, TIM_BDTR_BK2E);
- }
- __STATIC_INLINE void LL_TIM_DisableBRK2(TIM_TypeDef *TIMx)
- {
- CLEAR_BIT(TIMx->BDTR, TIM_BDTR_BK2E);
- }
- __STATIC_INLINE void LL_TIM_ConfigBRK2(TIM_TypeDef *TIMx, uint32_t Break2Polarity, uint32_t Break2Filter,
- uint32_t Break2AFMode)
- {
- MODIFY_REG(TIMx->BDTR, TIM_BDTR_BK2P | TIM_BDTR_BK2F | TIM_BDTR_BK2BID, Break2Polarity | Break2Filter | Break2AFMode);
- }
- __STATIC_INLINE void LL_TIM_DisarmBRK2(TIM_TypeDef *TIMx)
- {
- SET_BIT(TIMx->BDTR, TIM_BDTR_BK2DSRM);
- }
- __STATIC_INLINE void LL_TIM_ReArmBRK2(TIM_TypeDef *TIMx)
- {
- CLEAR_BIT(TIMx->BDTR, TIM_BDTR_BK2DSRM);
- }
- __STATIC_INLINE void LL_TIM_SetOffStates(TIM_TypeDef *TIMx, uint32_t OffStateIdle, uint32_t OffStateRun)
- {
- MODIFY_REG(TIMx->BDTR, TIM_BDTR_OSSI | TIM_BDTR_OSSR, OffStateIdle | OffStateRun);
- }
- __STATIC_INLINE void LL_TIM_EnableAutomaticOutput(TIM_TypeDef *TIMx)
- {
- SET_BIT(TIMx->BDTR, TIM_BDTR_AOE);
- }
- __STATIC_INLINE void LL_TIM_DisableAutomaticOutput(TIM_TypeDef *TIMx)
- {
- CLEAR_BIT(TIMx->BDTR, TIM_BDTR_AOE);
- }
- __STATIC_INLINE uint32_t LL_TIM_IsEnabledAutomaticOutput(TIM_TypeDef *TIMx)
- {
- return ((READ_BIT(TIMx->BDTR, TIM_BDTR_AOE) == (TIM_BDTR_AOE)) ? 1UL : 0UL);
- }
- __STATIC_INLINE void LL_TIM_EnableAllOutputs(TIM_TypeDef *TIMx)
- {
- SET_BIT(TIMx->BDTR, TIM_BDTR_MOE);
- }
- __STATIC_INLINE void LL_TIM_DisableAllOutputs(TIM_TypeDef *TIMx)
- {
- CLEAR_BIT(TIMx->BDTR, TIM_BDTR_MOE);
- }
- __STATIC_INLINE uint32_t LL_TIM_IsEnabledAllOutputs(TIM_TypeDef *TIMx)
- {
- return ((READ_BIT(TIMx->BDTR, TIM_BDTR_MOE) == (TIM_BDTR_MOE)) ? 1UL : 0UL);
- }
- __STATIC_INLINE void LL_TIM_EnableBreakInputSource(TIM_TypeDef *TIMx, uint32_t BreakInput, uint32_t Source)
- {
- __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->AF1) + BreakInput));
- SET_BIT(*pReg, Source);
- }
- __STATIC_INLINE void LL_TIM_DisableBreakInputSource(TIM_TypeDef *TIMx, uint32_t BreakInput, uint32_t Source)
- {
- __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->AF1) + BreakInput));
- CLEAR_BIT(*pReg, Source);
- }
- __STATIC_INLINE void LL_TIM_SetBreakInputSourcePolarity(TIM_TypeDef *TIMx, uint32_t BreakInput, uint32_t Source,
- uint32_t Polarity)
- {
- __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->AF1) + BreakInput));
- MODIFY_REG(*pReg, (TIMx_AF1_BKINP << TIM_POSITION_BRK_SOURCE), (Polarity << TIM_POSITION_BRK_SOURCE));
- }
- __STATIC_INLINE void LL_TIM_ConfigDMABurst(TIM_TypeDef *TIMx, uint32_t DMABurstBaseAddress, uint32_t DMABurstLength)
- {
- MODIFY_REG(TIMx->DCR, (TIM_DCR_DBL | TIM_DCR_DBA), (DMABurstBaseAddress | DMABurstLength));
- }
- __STATIC_INLINE void LL_TIM_SetRemap(TIM_TypeDef *TIMx, uint32_t Remap)
- {
- MODIFY_REG(TIMx->TISEL, (TIM_TISEL_TI1SEL | TIM_TISEL_TI2SEL | TIM_TISEL_TI3SEL | TIM_TISEL_TI4SEL), Remap);
- }
- __STATIC_INLINE void LL_TIM_SetOCRefClearInputSource(TIM_TypeDef *TIMx, uint32_t OCRefClearInputSource)
- {
- MODIFY_REG(TIMx->SMCR, TIM_SMCR_OCCS,
- ((OCRefClearInputSource & OCREF_CLEAR_SELECT_Msk) >> OCREF_CLEAR_SELECT_Pos) << TIM_SMCR_OCCS_Pos);
- MODIFY_REG(TIMx->OR1, TIM1_OR1_OCREF_CLR, OCRefClearInputSource);
- }
- __STATIC_INLINE void LL_TIM_ClearFlag_UPDATE(TIM_TypeDef *TIMx)
- {
- WRITE_REG(TIMx->SR, ~(TIM_SR_UIF));
- }
- __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_UPDATE(TIM_TypeDef *TIMx)
- {
- return ((READ_BIT(TIMx->SR, TIM_SR_UIF) == (TIM_SR_UIF)) ? 1UL : 0UL);
- }
- __STATIC_INLINE void LL_TIM_ClearFlag_CC1(TIM_TypeDef *TIMx)
- {
- WRITE_REG(TIMx->SR, ~(TIM_SR_CC1IF));
- }
- __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC1(TIM_TypeDef *TIMx)
- {
- return ((READ_BIT(TIMx->SR, TIM_SR_CC1IF) == (TIM_SR_CC1IF)) ? 1UL : 0UL);
- }
- __STATIC_INLINE void LL_TIM_ClearFlag_CC2(TIM_TypeDef *TIMx)
- {
- WRITE_REG(TIMx->SR, ~(TIM_SR_CC2IF));
- }
- __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC2(TIM_TypeDef *TIMx)
- {
- return ((READ_BIT(TIMx->SR, TIM_SR_CC2IF) == (TIM_SR_CC2IF)) ? 1UL : 0UL);
- }
- __STATIC_INLINE void LL_TIM_ClearFlag_CC3(TIM_TypeDef *TIMx)
- {
- WRITE_REG(TIMx->SR, ~(TIM_SR_CC3IF));
- }
- __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC3(TIM_TypeDef *TIMx)
- {
- return ((READ_BIT(TIMx->SR, TIM_SR_CC3IF) == (TIM_SR_CC3IF)) ? 1UL : 0UL);
- }
- __STATIC_INLINE void LL_TIM_ClearFlag_CC4(TIM_TypeDef *TIMx)
- {
- WRITE_REG(TIMx->SR, ~(TIM_SR_CC4IF));
- }
- __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC4(TIM_TypeDef *TIMx)
- {
- return ((READ_BIT(TIMx->SR, TIM_SR_CC4IF) == (TIM_SR_CC4IF)) ? 1UL : 0UL);
- }
- __STATIC_INLINE void LL_TIM_ClearFlag_CC5(TIM_TypeDef *TIMx)
- {
- WRITE_REG(TIMx->SR, ~(TIM_SR_CC5IF));
- }
- __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC5(TIM_TypeDef *TIMx)
- {
- return ((READ_BIT(TIMx->SR, TIM_SR_CC5IF) == (TIM_SR_CC5IF)) ? 1UL : 0UL);
- }
- __STATIC_INLINE void LL_TIM_ClearFlag_CC6(TIM_TypeDef *TIMx)
- {
- WRITE_REG(TIMx->SR, ~(TIM_SR_CC6IF));
- }
- __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC6(TIM_TypeDef *TIMx)
- {
- return ((READ_BIT(TIMx->SR, TIM_SR_CC6IF) == (TIM_SR_CC6IF)) ? 1UL : 0UL);
- }
- __STATIC_INLINE void LL_TIM_ClearFlag_COM(TIM_TypeDef *TIMx)
- {
- WRITE_REG(TIMx->SR, ~(TIM_SR_COMIF));
- }
- __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_COM(TIM_TypeDef *TIMx)
- {
- return ((READ_BIT(TIMx->SR, TIM_SR_COMIF) == (TIM_SR_COMIF)) ? 1UL : 0UL);
- }
- __STATIC_INLINE void LL_TIM_ClearFlag_TRIG(TIM_TypeDef *TIMx)
- {
- WRITE_REG(TIMx->SR, ~(TIM_SR_TIF));
- }
- __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_TRIG(TIM_TypeDef *TIMx)
- {
- return ((READ_BIT(TIMx->SR, TIM_SR_TIF) == (TIM_SR_TIF)) ? 1UL : 0UL);
- }
- __STATIC_INLINE void LL_TIM_ClearFlag_BRK(TIM_TypeDef *TIMx)
- {
- WRITE_REG(TIMx->SR, ~(TIM_SR_BIF));
- }
- __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_BRK(TIM_TypeDef *TIMx)
- {
- return ((READ_BIT(TIMx->SR, TIM_SR_BIF) == (TIM_SR_BIF)) ? 1UL : 0UL);
- }
- __STATIC_INLINE void LL_TIM_ClearFlag_BRK2(TIM_TypeDef *TIMx)
- {
- WRITE_REG(TIMx->SR, ~(TIM_SR_B2IF));
- }
- __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_BRK2(TIM_TypeDef *TIMx)
- {
- return ((READ_BIT(TIMx->SR, TIM_SR_B2IF) == (TIM_SR_B2IF)) ? 1UL : 0UL);
- }
- __STATIC_INLINE void LL_TIM_ClearFlag_CC1OVR(TIM_TypeDef *TIMx)
- {
- WRITE_REG(TIMx->SR, ~(TIM_SR_CC1OF));
- }
- __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC1OVR(TIM_TypeDef *TIMx)
- {
- return ((READ_BIT(TIMx->SR, TIM_SR_CC1OF) == (TIM_SR_CC1OF)) ? 1UL : 0UL);
- }
- __STATIC_INLINE void LL_TIM_ClearFlag_CC2OVR(TIM_TypeDef *TIMx)
- {
- WRITE_REG(TIMx->SR, ~(TIM_SR_CC2OF));
- }
- __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC2OVR(TIM_TypeDef *TIMx)
- {
- return ((READ_BIT(TIMx->SR, TIM_SR_CC2OF) == (TIM_SR_CC2OF)) ? 1UL : 0UL);
- }
- __STATIC_INLINE void LL_TIM_ClearFlag_CC3OVR(TIM_TypeDef *TIMx)
- {
- WRITE_REG(TIMx->SR, ~(TIM_SR_CC3OF));
- }
- __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC3OVR(TIM_TypeDef *TIMx)
- {
- return ((READ_BIT(TIMx->SR, TIM_SR_CC3OF) == (TIM_SR_CC3OF)) ? 1UL : 0UL);
- }
- __STATIC_INLINE void LL_TIM_ClearFlag_CC4OVR(TIM_TypeDef *TIMx)
- {
- WRITE_REG(TIMx->SR, ~(TIM_SR_CC4OF));
- }
- __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC4OVR(TIM_TypeDef *TIMx)
- {
- return ((READ_BIT(TIMx->SR, TIM_SR_CC4OF) == (TIM_SR_CC4OF)) ? 1UL : 0UL);
- }
- __STATIC_INLINE void LL_TIM_ClearFlag_SYSBRK(TIM_TypeDef *TIMx)
- {
- WRITE_REG(TIMx->SR, ~(TIM_SR_SBIF));
- }
- __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_SYSBRK(TIM_TypeDef *TIMx)
- {
- return ((READ_BIT(TIMx->SR, TIM_SR_SBIF) == (TIM_SR_SBIF)) ? 1UL : 0UL);
- }
- __STATIC_INLINE void LL_TIM_EnableIT_UPDATE(TIM_TypeDef *TIMx)
- {
- SET_BIT(TIMx->DIER, TIM_DIER_UIE);
- }
- __STATIC_INLINE void LL_TIM_DisableIT_UPDATE(TIM_TypeDef *TIMx)
- {
- CLEAR_BIT(TIMx->DIER, TIM_DIER_UIE);
- }
- __STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_UPDATE(TIM_TypeDef *TIMx)
- {
- return ((READ_BIT(TIMx->DIER, TIM_DIER_UIE) == (TIM_DIER_UIE)) ? 1UL : 0UL);
- }
- __STATIC_INLINE void LL_TIM_EnableIT_CC1(TIM_TypeDef *TIMx)
- {
- SET_BIT(TIMx->DIER, TIM_DIER_CC1IE);
- }
- __STATIC_INLINE void LL_TIM_DisableIT_CC1(TIM_TypeDef *TIMx)
- {
- CLEAR_BIT(TIMx->DIER, TIM_DIER_CC1IE);
- }
- __STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_CC1(TIM_TypeDef *TIMx)
- {
- return ((READ_BIT(TIMx->DIER, TIM_DIER_CC1IE) == (TIM_DIER_CC1IE)) ? 1UL : 0UL);
- }
- __STATIC_INLINE void LL_TIM_EnableIT_CC2(TIM_TypeDef *TIMx)
- {
- SET_BIT(TIMx->DIER, TIM_DIER_CC2IE);
- }
- __STATIC_INLINE void LL_TIM_DisableIT_CC2(TIM_TypeDef *TIMx)
- {
- CLEAR_BIT(TIMx->DIER, TIM_DIER_CC2IE);
- }
- __STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_CC2(TIM_TypeDef *TIMx)
- {
- return ((READ_BIT(TIMx->DIER, TIM_DIER_CC2IE) == (TIM_DIER_CC2IE)) ? 1UL : 0UL);
- }
- __STATIC_INLINE void LL_TIM_EnableIT_CC3(TIM_TypeDef *TIMx)
- {
- SET_BIT(TIMx->DIER, TIM_DIER_CC3IE);
- }
- __STATIC_INLINE void LL_TIM_DisableIT_CC3(TIM_TypeDef *TIMx)
- {
- CLEAR_BIT(TIMx->DIER, TIM_DIER_CC3IE);
- }
- __STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_CC3(TIM_TypeDef *TIMx)
- {
- return ((READ_BIT(TIMx->DIER, TIM_DIER_CC3IE) == (TIM_DIER_CC3IE)) ? 1UL : 0UL);
- }
- __STATIC_INLINE void LL_TIM_EnableIT_CC4(TIM_TypeDef *TIMx)
- {
- SET_BIT(TIMx->DIER, TIM_DIER_CC4IE);
- }
- __STATIC_INLINE void LL_TIM_DisableIT_CC4(TIM_TypeDef *TIMx)
- {
- CLEAR_BIT(TIMx->DIER, TIM_DIER_CC4IE);
- }
- __STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_CC4(TIM_TypeDef *TIMx)
- {
- return ((READ_BIT(TIMx->DIER, TIM_DIER_CC4IE) == (TIM_DIER_CC4IE)) ? 1UL : 0UL);
- }
- __STATIC_INLINE void LL_TIM_EnableIT_COM(TIM_TypeDef *TIMx)
- {
- SET_BIT(TIMx->DIER, TIM_DIER_COMIE);
- }
- __STATIC_INLINE void LL_TIM_DisableIT_COM(TIM_TypeDef *TIMx)
- {
- CLEAR_BIT(TIMx->DIER, TIM_DIER_COMIE);
- }
- __STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_COM(TIM_TypeDef *TIMx)
- {
- return ((READ_BIT(TIMx->DIER, TIM_DIER_COMIE) == (TIM_DIER_COMIE)) ? 1UL : 0UL);
- }
- __STATIC_INLINE void LL_TIM_EnableIT_TRIG(TIM_TypeDef *TIMx)
- {
- SET_BIT(TIMx->DIER, TIM_DIER_TIE);
- }
- __STATIC_INLINE void LL_TIM_DisableIT_TRIG(TIM_TypeDef *TIMx)
- {
- CLEAR_BIT(TIMx->DIER, TIM_DIER_TIE);
- }
- __STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_TRIG(TIM_TypeDef *TIMx)
- {
- return ((READ_BIT(TIMx->DIER, TIM_DIER_TIE) == (TIM_DIER_TIE)) ? 1UL : 0UL);
- }
- __STATIC_INLINE void LL_TIM_EnableIT_BRK(TIM_TypeDef *TIMx)
- {
- SET_BIT(TIMx->DIER, TIM_DIER_BIE);
- }
- __STATIC_INLINE void LL_TIM_DisableIT_BRK(TIM_TypeDef *TIMx)
- {
- CLEAR_BIT(TIMx->DIER, TIM_DIER_BIE);
- }
- __STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_BRK(TIM_TypeDef *TIMx)
- {
- return ((READ_BIT(TIMx->DIER, TIM_DIER_BIE) == (TIM_DIER_BIE)) ? 1UL : 0UL);
- }
- __STATIC_INLINE void LL_TIM_EnableDMAReq_UPDATE(TIM_TypeDef *TIMx)
- {
- SET_BIT(TIMx->DIER, TIM_DIER_UDE);
- }
- __STATIC_INLINE void LL_TIM_DisableDMAReq_UPDATE(TIM_TypeDef *TIMx)
- {
- CLEAR_BIT(TIMx->DIER, TIM_DIER_UDE);
- }
- __STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_UPDATE(TIM_TypeDef *TIMx)
- {
- return ((READ_BIT(TIMx->DIER, TIM_DIER_UDE) == (TIM_DIER_UDE)) ? 1UL : 0UL);
- }
- __STATIC_INLINE void LL_TIM_EnableDMAReq_CC1(TIM_TypeDef *TIMx)
- {
- SET_BIT(TIMx->DIER, TIM_DIER_CC1DE);
- }
- __STATIC_INLINE void LL_TIM_DisableDMAReq_CC1(TIM_TypeDef *TIMx)
- {
- CLEAR_BIT(TIMx->DIER, TIM_DIER_CC1DE);
- }
- __STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_CC1(TIM_TypeDef *TIMx)
- {
- return ((READ_BIT(TIMx->DIER, TIM_DIER_CC1DE) == (TIM_DIER_CC1DE)) ? 1UL : 0UL);
- }
- __STATIC_INLINE void LL_TIM_EnableDMAReq_CC2(TIM_TypeDef *TIMx)
- {
- SET_BIT(TIMx->DIER, TIM_DIER_CC2DE);
- }
- __STATIC_INLINE void LL_TIM_DisableDMAReq_CC2(TIM_TypeDef *TIMx)
- {
- CLEAR_BIT(TIMx->DIER, TIM_DIER_CC2DE);
- }
- __STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_CC2(TIM_TypeDef *TIMx)
- {
- return ((READ_BIT(TIMx->DIER, TIM_DIER_CC2DE) == (TIM_DIER_CC2DE)) ? 1UL : 0UL);
- }
- __STATIC_INLINE void LL_TIM_EnableDMAReq_CC3(TIM_TypeDef *TIMx)
- {
- SET_BIT(TIMx->DIER, TIM_DIER_CC3DE);
- }
- __STATIC_INLINE void LL_TIM_DisableDMAReq_CC3(TIM_TypeDef *TIMx)
- {
- CLEAR_BIT(TIMx->DIER, TIM_DIER_CC3DE);
- }
- __STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_CC3(TIM_TypeDef *TIMx)
- {
- return ((READ_BIT(TIMx->DIER, TIM_DIER_CC3DE) == (TIM_DIER_CC3DE)) ? 1UL : 0UL);
- }
- __STATIC_INLINE void LL_TIM_EnableDMAReq_CC4(TIM_TypeDef *TIMx)
- {
- SET_BIT(TIMx->DIER, TIM_DIER_CC4DE);
- }
- __STATIC_INLINE void LL_TIM_DisableDMAReq_CC4(TIM_TypeDef *TIMx)
- {
- CLEAR_BIT(TIMx->DIER, TIM_DIER_CC4DE);
- }
- __STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_CC4(TIM_TypeDef *TIMx)
- {
- return ((READ_BIT(TIMx->DIER, TIM_DIER_CC4DE) == (TIM_DIER_CC4DE)) ? 1UL : 0UL);
- }
- __STATIC_INLINE void LL_TIM_EnableDMAReq_COM(TIM_TypeDef *TIMx)
- {
- SET_BIT(TIMx->DIER, TIM_DIER_COMDE);
- }
- __STATIC_INLINE void LL_TIM_DisableDMAReq_COM(TIM_TypeDef *TIMx)
- {
- CLEAR_BIT(TIMx->DIER, TIM_DIER_COMDE);
- }
- __STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_COM(TIM_TypeDef *TIMx)
- {
- return ((READ_BIT(TIMx->DIER, TIM_DIER_COMDE) == (TIM_DIER_COMDE)) ? 1UL : 0UL);
- }
- __STATIC_INLINE void LL_TIM_EnableDMAReq_TRIG(TIM_TypeDef *TIMx)
- {
- SET_BIT(TIMx->DIER, TIM_DIER_TDE);
- }
- __STATIC_INLINE void LL_TIM_DisableDMAReq_TRIG(TIM_TypeDef *TIMx)
- {
- CLEAR_BIT(TIMx->DIER, TIM_DIER_TDE);
- }
- __STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_TRIG(TIM_TypeDef *TIMx)
- {
- return ((READ_BIT(TIMx->DIER, TIM_DIER_TDE) == (TIM_DIER_TDE)) ? 1UL : 0UL);
- }
- __STATIC_INLINE void LL_TIM_GenerateEvent_UPDATE(TIM_TypeDef *TIMx)
- {
- SET_BIT(TIMx->EGR, TIM_EGR_UG);
- }
- __STATIC_INLINE void LL_TIM_GenerateEvent_CC1(TIM_TypeDef *TIMx)
- {
- SET_BIT(TIMx->EGR, TIM_EGR_CC1G);
- }
- __STATIC_INLINE void LL_TIM_GenerateEvent_CC2(TIM_TypeDef *TIMx)
- {
- SET_BIT(TIMx->EGR, TIM_EGR_CC2G);
- }
- __STATIC_INLINE void LL_TIM_GenerateEvent_CC3(TIM_TypeDef *TIMx)
- {
- SET_BIT(TIMx->EGR, TIM_EGR_CC3G);
- }
- __STATIC_INLINE void LL_TIM_GenerateEvent_CC4(TIM_TypeDef *TIMx)
- {
- SET_BIT(TIMx->EGR, TIM_EGR_CC4G);
- }
- __STATIC_INLINE void LL_TIM_GenerateEvent_COM(TIM_TypeDef *TIMx)
- {
- SET_BIT(TIMx->EGR, TIM_EGR_COMG);
- }
- __STATIC_INLINE void LL_TIM_GenerateEvent_TRIG(TIM_TypeDef *TIMx)
- {
- SET_BIT(TIMx->EGR, TIM_EGR_TG);
- }
- __STATIC_INLINE void LL_TIM_GenerateEvent_BRK(TIM_TypeDef *TIMx)
- {
- SET_BIT(TIMx->EGR, TIM_EGR_BG);
- }
- __STATIC_INLINE void LL_TIM_GenerateEvent_BRK2(TIM_TypeDef *TIMx)
- {
- SET_BIT(TIMx->EGR, TIM_EGR_B2G);
- }
- ErrorStatus LL_TIM_DeInit(TIM_TypeDef *TIMx);
- void LL_TIM_StructInit(LL_TIM_InitTypeDef *TIM_InitStruct);
- ErrorStatus LL_TIM_Init(TIM_TypeDef *TIMx, LL_TIM_InitTypeDef *TIM_InitStruct);
- void LL_TIM_OC_StructInit(LL_TIM_OC_InitTypeDef *TIM_OC_InitStruct);
- ErrorStatus LL_TIM_OC_Init(TIM_TypeDef *TIMx, uint32_t Channel, LL_TIM_OC_InitTypeDef *TIM_OC_InitStruct);
- void LL_TIM_IC_StructInit(LL_TIM_IC_InitTypeDef *TIM_ICInitStruct);
- ErrorStatus LL_TIM_IC_Init(TIM_TypeDef *TIMx, uint32_t Channel, LL_TIM_IC_InitTypeDef *TIM_IC_InitStruct);
- void LL_TIM_ENCODER_StructInit(LL_TIM_ENCODER_InitTypeDef *TIM_EncoderInitStruct);
- ErrorStatus LL_TIM_ENCODER_Init(TIM_TypeDef *TIMx, LL_TIM_ENCODER_InitTypeDef *TIM_EncoderInitStruct);
- void LL_TIM_HALLSENSOR_StructInit(LL_TIM_HALLSENSOR_InitTypeDef *TIM_HallSensorInitStruct);
- ErrorStatus LL_TIM_HALLSENSOR_Init(TIM_TypeDef *TIMx, LL_TIM_HALLSENSOR_InitTypeDef *TIM_HallSensorInitStruct);
- void LL_TIM_BDTR_StructInit(LL_TIM_BDTR_InitTypeDef *TIM_BDTRInitStruct);
- ErrorStatus LL_TIM_BDTR_Init(TIM_TypeDef *TIMx, LL_TIM_BDTR_InitTypeDef *TIM_BDTRInitStruct);
- }
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