board.c 23 KB

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  1. #include "board.h"
  2. /* private defines */
  3. #define SPI_BUFFER_SIZE 5
  4. /* private variables */
  5. /**
  6. * Nixi Tube cathodes map in Byte Array:
  7. * {E0 E9 E8 E7 E6 E5 E4 E3}
  8. * {E2 E1 D0 D9 D8 D7 D6 D5}
  9. * {D4 D3 D2 D1 B0 B9 B8 B7}
  10. * {B6 B5 B4 B3 B2 B1 A0 A9}
  11. * {A8 A7 A6 A5 A4 A3 A2 A1}
  12. *
  13. * Shift register bit map in Tube cathodes (from 0 to 1):
  14. * {5.7 5.6 5.5 5.4 5.3 5.2 5.1 5.0 4.7 4.6} VL5/E
  15. * {4.5 4.4 4.3 4.2 4.1 4.0 3.7 3.6 3.5 3.4} VL4/D
  16. * {3.3 3.2 3.1 3.0 2.7 2.6 2.5 2.4 2.3 2.2} VL2/B
  17. * {2.1 2.0 1.7 1.6 1.5 1.4 1.3 1.2 1.1 1.0} VL1/A
  18. */
  19. static const uint16_t nixieCathodeMap[4][11] = {
  20. {0x8000, 0x0040, 0x0080, 0x0100, 0x0200, 0x0400, 0x0800, 0x1000, 0x2000, 0x4000, 0x0000},
  21. {0x2000, 0x0010, 0x0020, 0x0040, 0x0080, 0x0100, 0x0200, 0x0400, 0x0800, 0x1000, 0x0000},
  22. {0x0800, 0x0004, 0x0008, 0x0010, 0x0020, 0x0040, 0x0080, 0x0100, 0x0200, 0x0400, 0x0000},
  23. {0x0200, 0x0001, 0x0002, 0x0004, 0x0008, 0x0010, 0x0020, 0x0040, 0x0080, 0x0100, 0x0000}
  24. };
  25. static uint8_t tubesBuffer[SPI_BUFFER_SIZE] = {0};
  26. /* private typedef */
  27. /* private functions */
  28. static void _show_digits(const uint32_t digits);
  29. static void GPIO_Init(void);
  30. static void DMA_Init(void);
  31. static void I2C1_Init(void);
  32. static void SPI1_Init(void);
  33. static void TIM1_Init(void);
  34. static void TIM3_Init(void);
  35. static void TIM14_Init(void);
  36. static void TIM16_Init(void);
  37. static void TIM17_Init(void);
  38. static void USART1_UART_Init(void);
  39. /* Board perephireal Configuration */
  40. void Board_Init(void)
  41. {
  42. /* Main peripheral clock enable */
  43. RCC->APBENR1 = (RCC_APBENR1_PWREN | RCC_APBENR1_I2C1EN | RCC_APBENR1_TIM3EN);
  44. RCC->APBENR2 = (RCC_APBENR2_SYSCFGEN | RCC_APBENR2_SPI1EN | RCC_APBENR2_TIM1EN);
  45. /* GPIO Ports Clock Enable */
  46. RCC->IOPENR = (RCC_IOPENR_GPIOAEN | RCC_IOPENR_GPIOBEN | RCC_IOPENR_GPIOCEN);
  47. /* Peripheral interrupt init*/
  48. /* RCC_IRQn interrupt configuration */
  49. NVIC_SetPriority(RCC_IRQn, 0);
  50. NVIC_EnableIRQ(RCC_IRQn);
  51. /* Configure the system clock */
  52. SystemClock_Config();
  53. /* Processor uses sleep as its low power mode */
  54. SCB->SCR &= ~((uint32_t)SCB_SCR_SLEEPDEEP_Msk);
  55. /* DisableSleepOnExit */
  56. SCB->SCR &= ~((uint32_t)SCB_SCR_SLEEPONEXIT_Msk);
  57. /* Initialize all configured peripherals */
  58. GPIO_Init();
  59. DMA_Init();
  60. I2C1_Init();
  61. SPI1_Init();
  62. /** Star SPI transfer to shift registers */
  63. /* Set DMA source and destination addresses. */
  64. /* Source: Address of the SPI buffer. */
  65. DMA1_Channel1->CMAR = (uint32_t)&tubesBuffer;
  66. /* Destination: SPI1 data register. */
  67. DMA1_Channel1->CPAR = (uint32_t)&(SPI1->DR);
  68. /* Set DMA data transfer length (SPI buffer length). */
  69. DMA1_Channel1->CNDTR = SPI_BUFFER_SIZE;
  70. /* Enable SPI transfer */
  71. SPI1->CR1 |= SPI_CR1_SPE;
  72. Flag.SPI_TX_End = 1;
  73. /* Enable tube power */
  74. TUBE_PWR_ON;
  75. /* display work now */
  76. /* Start RGB & Tube Power PWM */
  77. TIM1_Init();
  78. TIM3_Init();
  79. /* Tube Blink timer */
  80. TIM14_Init();
  81. /* IN15 Fade In/Out timer */
  82. TIM16_Init();
  83. //TIM17_Init();
  84. //USART1_UART_Init();
  85. }
  86. /**
  87. * @brief Out digits to SPI buffer. ON/off tube power.
  88. * @param : array with four BCD digits
  89. * @retval : None
  90. */
  91. void showDigits(tube4_t dig)
  92. {
  93. static uint32_t old_dig = 0;
  94. uint8_t st = 0, ov = FADE_START;
  95. if (old_dig != dig.u32) {
  96. while (ov < FADE_STOP) {
  97. if (st == 0) {
  98. // new tube value
  99. st = 1;
  100. _show_digits(dig.u32);
  101. ov += FADE_STEP;
  102. tdelay_ms(ov);
  103. } else {
  104. // old tube value
  105. st = 0;
  106. _show_digits(old_dig);
  107. tdelay_ms(FADE_STOP - ov);
  108. }
  109. } // End of while
  110. old_dig = dig.u32;
  111. } // End of if-else
  112. }
  113. void lShiftDigits(const tube4_t old, const tube4_t dig) {
  114. uint32_t * buf;
  115. uint8_t sbuf[12];
  116. sbuf[0] = dig.ar[0];
  117. sbuf[1] = dig.ar[1];
  118. sbuf[2] = dig.ar[2];
  119. sbuf[3] = dig.ar[3];
  120. sbuf[4] = TUBE_BLANK;
  121. sbuf[5] = TUBE_BLANK;
  122. sbuf[6] = TUBE_BLANK;
  123. sbuf[7] = TUBE_BLANK;
  124. sbuf[8] = old.ar[0];
  125. sbuf[9] = old.ar[1];
  126. sbuf[10] = old.ar[2];
  127. sbuf[11] = old.ar[3];
  128. int i;
  129. for (i=8; i>=0; i--) {
  130. buf = (uint32_t *)&sbuf[i];
  131. _show_digits(*buf);
  132. tdelay_ms(100);
  133. }
  134. }
  135. void slideDigits(tube4_t dig) {
  136. tube4_t buf;
  137. const uint8_t pause = 100;;
  138. buf.s8.tA = TUBE_BLANK;
  139. buf.s8.tB = TUBE_BLANK;
  140. buf.s8.tD = TUBE_BLANK;
  141. buf.s8.tE = TUBE_BLANK;
  142. _show_digits(buf.u32);
  143. tdelay_ms(pause);
  144. buf.s8.tE = dig.s8.tA;
  145. _show_digits(buf.u32);
  146. tdelay_ms(pause);
  147. buf.s8.tD = dig.s8.tA;
  148. buf.s8.tE = dig.s8.tB;
  149. _show_digits(buf.u32);
  150. tdelay_ms(pause);
  151. buf.s8.tB = dig.s8.tA;
  152. buf.s8.tD = dig.s8.tB;
  153. buf.s8.tE = dig.s8.tD;
  154. _show_digits(buf.u32);
  155. tdelay_ms(pause);
  156. buf.s8.tA = dig.s8.tA;
  157. buf.s8.tB = dig.s8.tB;
  158. buf.s8.tD = dig.s8.tD;
  159. buf.s8.tE = dig.s8.tE;
  160. _show_digits(buf.u32);
  161. tdelay_ms(pause);
  162. buf.s8.tA = dig.s8.tB;
  163. buf.s8.tB = dig.s8.tD;
  164. buf.s8.tD = dig.s8.tE;
  165. buf.s8.tE = TUBE_BLANK;
  166. _show_digits(buf.u32);
  167. tdelay_ms(pause);
  168. buf.s8.tA = dig.s8.tD;
  169. buf.s8.tB = dig.s8.tE;
  170. buf.s8.tD = TUBE_BLANK;
  171. _show_digits(buf.u32);
  172. tdelay_ms(pause);
  173. buf.s8.tA = dig.s8.tE;
  174. buf.s8.tB = TUBE_BLANK;
  175. _show_digits(buf.u32);
  176. tdelay_ms(pause);
  177. buf.s8.tA = TUBE_BLANK;
  178. _show_digits(buf.u32);
  179. tdelay_ms(pause);
  180. }
  181. static void _show_digits(const uint32_t digits)
  182. {
  183. tube4_t dig;
  184. dig.u32 = digits;
  185. /* Clear buffer */
  186. tubesBuffer[0] = 0;
  187. tubesBuffer[1] = 0;
  188. tubesBuffer[2] = 0;
  189. tubesBuffer[3] = 0;
  190. tubesBuffer[4] = 0;
  191. /* check values range */
  192. int i;
  193. for (i=0; i<4; i++) {
  194. if (dig.ar[i] > TUBE_BLANK) {
  195. dig.ar[i] = TUBE_BLANK;
  196. }
  197. }
  198. /* Wait for SPI */
  199. while (Flag.SPI_TX_End == 0);
  200. Flag.SPI_TX_End = 0;
  201. /* Feel buffer */
  202. tubesBuffer[0] = (uint8_t)(nixieCathodeMap[Tube_E][dig.s8.tE] >> 8);
  203. tubesBuffer[1] = (uint8_t)((nixieCathodeMap[Tube_E][dig.s8.tE]) | (nixieCathodeMap[Tube_D][dig.s8.tD] >> 8));
  204. tubesBuffer[2] = (uint8_t)((nixieCathodeMap[Tube_D][dig.s8.tD]) | (nixieCathodeMap[Tube_B][dig.s8.tB] >> 8));
  205. tubesBuffer[3] = (uint8_t)((nixieCathodeMap[Tube_B][dig.s8.tB]) | (nixieCathodeMap[Tube_A][dig.s8.tA] >> 8));
  206. tubesBuffer[4] = (uint8_t)(nixieCathodeMap[Tube_A][dig.s8.tA]);
  207. /* Start DMA transfer to SPI */
  208. DMA1_Channel1->CCR |= DMA_CCR_EN;
  209. /* On/Off tube power */
  210. for (i=0; i<4; i++) {
  211. if (dig.ar[i] == TUBE_BLANK) {
  212. tube_PowerOff((tube_pos_t)i);
  213. } else {
  214. tube_PowerOn((tube_pos_t)i);
  215. }
  216. }
  217. }
  218. /**
  219. * @brief Refresh unused tube digits for avoiding degrade
  220. */
  221. void tube_Refresh(void)
  222. {
  223. static int cnt = 0;
  224. tube4_t buf;
  225. /* We start ourselves every 125 ms to update 8 digits in a second. */
  226. if (cnt == 0) {
  227. RTOS_SetTask(tube_Refresh, 125, 125);
  228. }
  229. /* Fill buffer with values */
  230. switch (cnt) {
  231. case 0:
  232. cnt = 1;
  233. buf.s8.tA = 0;
  234. buf.s8.tD = 6;
  235. break;
  236. case 1:
  237. cnt = 2;
  238. buf.s8.tA = 3;
  239. break;
  240. case 2:
  241. cnt = 3;
  242. buf.s8.tA = 4;
  243. buf.s8.tD = 7;
  244. break;
  245. case 3:
  246. cnt = 4;
  247. buf.s8.tA = 5;
  248. break;
  249. case 4:
  250. cnt = 5;
  251. buf.s8.tA = 6;
  252. buf.s8.tD = 8;
  253. break;
  254. case 5:
  255. cnt = 6;
  256. buf.s8.tA = 7;
  257. break;
  258. case 6:
  259. cnt = 7;
  260. buf.s8.tA = 8;
  261. buf.s8.tD = 9;
  262. break;
  263. case 7:
  264. cnt = 0;
  265. buf.s8.tA = 9;
  266. break;
  267. default:
  268. cnt = 0;
  269. }
  270. /* Self delete task */
  271. if (cnt == 0) {
  272. RTOS_DeleteTask(tube_Refresh);
  273. }
  274. /* Output buffer value to digits */
  275. _show_digits(buf.u32);
  276. }
  277. /**
  278. * Control power of tube
  279. */
  280. void tube_PowerOn(tube_pos_t tube)
  281. {
  282. switch (tube) {
  283. case Tube_A:
  284. TUBE_A_ON;
  285. break;
  286. case Tube_B:
  287. TUBE_B_ON;
  288. break;
  289. case Tube_D:
  290. TUBE_D_ON;
  291. break;
  292. case Tube_E:
  293. TUBE_E_ON;
  294. break;
  295. case Tube_All:
  296. TUBE_ALL_ON;
  297. break;
  298. default:
  299. break;
  300. }
  301. }
  302. void tube_PowerOff(tube_pos_t tube)
  303. {
  304. switch (tube) {
  305. case Tube_A:
  306. TUBE_A_OFF;
  307. break;
  308. case Tube_B:
  309. TUBE_B_OFF;
  310. break;
  311. case Tube_D:
  312. TUBE_D_OFF;
  313. break;
  314. case Tube_E:
  315. TUBE_E_OFF;
  316. break;
  317. case Tube_All:
  318. TUBE_ALL_OFF;
  319. break;
  320. default:
  321. break;
  322. }
  323. }
  324. void tube_BrightLevel(tube_pos_t tube, uint8_t bright)
  325. {
  326. switch (tube) {
  327. case Tube_A:
  328. TUBE_A_BRIGHT(bright);
  329. break;
  330. case Tube_B:
  331. TUBE_B_BRIGHT(bright);
  332. break;
  333. case Tube_C:
  334. TUBE_C_BRIGHT(bright);
  335. break;
  336. case Tube_D:
  337. TUBE_D_BRIGHT(bright);
  338. break;
  339. case Tube_E:
  340. TUBE_E_BRIGHT(bright);
  341. break;
  342. case Tube_All:
  343. TUBES_BRIGHT(bright);
  344. break;
  345. default:
  346. break;
  347. }
  348. }
  349. /**
  350. * @brief System Clock Configuration
  351. * @retval None
  352. */
  353. void SystemClock_Config(void)
  354. {
  355. /* HSI configuration and activation */
  356. RCC->CR |= RCC_CR_HSION; // Enable HSI
  357. while((RCC->CR & RCC_CR_HSIRDY) == 0);
  358. /* Main PLL configuration and activation */
  359. RCC->PLLCFGR = (RCC_PLLCFGR_PLLSRC_HSI | RCC_PLLCFGR_PLLM_0 | (9 << RCC_PLLCFGR_PLLN_Pos) | RCC_PLLCFGR_PLLR_1);
  360. RCC->PLLCFGR |= RCC_PLLCFGR_PLLREN; // RCC_PLL_EnableDomain_SYS
  361. RCC->CR |= RCC_CR_PLLON; // RCC_PLL_Enable
  362. while((RCC->CR & RCC_CR_PLLRDY) == 0);
  363. /* Sysclk activation on the main PLL */
  364. RCC->CFGR &= RCC_CFGR_SW;
  365. RCC->CFGR |= RCC_CFGR_SW_1;
  366. while((RCC->CFGR & RCC_CFGR_SWS) != RCC_CFGR_SWS_1);
  367. /* Update CMSIS variable (which can be updated also through SystemCoreClockUpdate function) */
  368. SystemCoreClock = 24000000;
  369. /* Set I2C Clock Source */
  370. RCC->CCIPR &= ~(RCC_CCIPR_I2C1SEL);
  371. RCC->CCIPR |= RCC_CCIPR_I2C1SEL_1;
  372. }
  373. /**
  374. * @brief GPIO Initialization Function
  375. * @param None
  376. * @retval None
  377. */
  378. static void GPIO_Init(void)
  379. {
  380. /* EXTI Line: falling, no pull, input */
  381. // interrupt on line 14
  382. EXTI->IMR1 |= EXTI_IMR1_IM14;
  383. // wake-up with event ?
  384. //EXTI->EMR1 |= EXTI_EMR1_EM14;
  385. // TRIGGER FALLING
  386. EXTI->FTSR1 = EXTI_FTSR1_FT14;
  387. // external interrupt selection - PC14 to EXTI14
  388. EXTI->EXTICR[3] = EXTI_EXTICR4_EXTI14_1;
  389. /* EXTI interrupt init*/
  390. NVIC_SetPriority(EXTI4_15_IRQn, 0);
  391. NVIC_EnableIRQ(EXTI4_15_IRQn);
  392. /* set GPIO modes */
  393. GPIO_SetPinMode(IRQ_GPIO_Port, IRQ_Pin, GPIO_MODE_IN);
  394. GPIO_SetPinPull(IRQ_GPIO_Port, IRQ_Pin, GPIO_PUPDR_UP);
  395. /* L0, L1, L2, L3 - IN-15 symbols control, PP out, high speed, pull down */
  396. GPIO_SetPinMode(LC0_GPIO_Port, LC0_Pin, GPIO_MODE_OUT);
  397. GPIO_SetPinSpeed(LC0_GPIO_Port, LC0_Pin, GPIO_OSPEED_HI);
  398. GPIO_SetPinPull(LC0_GPIO_Port, LC0_Pin, GPIO_PUPDR_DW);
  399. GPIO_SetPinMode(LC1_GPIO_Port, LC1_Pin, GPIO_MODE_OUT);
  400. GPIO_SetPinSpeed(LC1_GPIO_Port, LC1_Pin, GPIO_OSPEED_HI);
  401. GPIO_SetPinPull(LC1_GPIO_Port, LC1_Pin, GPIO_PUPDR_DW);
  402. GPIO_SetPinMode(LC2_GPIO_Port, LC2_Pin, GPIO_MODE_OUT);
  403. GPIO_SetPinSpeed(LC2_GPIO_Port, LC2_Pin, GPIO_OSPEED_HI);
  404. GPIO_SetPinPull(LC2_GPIO_Port, LC2_Pin, GPIO_PUPDR_DW);
  405. GPIO_SetPinMode(LC3_GPIO_Port, LC3_Pin, GPIO_MODE_OUT);
  406. GPIO_SetPinSpeed(LC3_GPIO_Port, LC3_Pin, GPIO_OSPEED_HI);
  407. GPIO_SetPinPull(LC3_GPIO_Port, LC3_Pin, GPIO_PUPDR_DW);
  408. /* Pwer Shutdown: PP out, high speed, pull down */
  409. GPIO_SetPinMode(SHDN_GPIO_Port, SHDN_Pin, GPIO_MODE_OUT);
  410. GPIO_SetPinSpeed(SHDN_GPIO_Port, SHDN_Pin, GPIO_OSPEED_HI);
  411. GPIO_SetPinPull(SHDN_GPIO_Port, SHDN_Pin, GPIO_PUPDR_DW);
  412. /* SPI Latch: OD out, high speed, no pull */
  413. GPIO_SetPinMode(Latch_GPIO_Port, Latch_Pin, GPIO_MODE_OUT);
  414. GPIO_SetPinOutputType(Latch_GPIO_Port, Latch_Pin, GPIO_OTYPE_OD);
  415. GPIO_SetPinSpeed(Latch_GPIO_Port, Latch_Pin, GPIO_OSPEED_HI);
  416. /* UART_Enable: PP out, low speed, no pull*/
  417. GPIO_SetPinMode(UART_EN_GPIO_Port, UART_EN_Pin, GPIO_MODE_OUT);
  418. /* UART_State: input, pull up */
  419. GPIO_SetPinPull(UART_ST_GPIO_Port, UART_ST_Pin, GPIO_PUPDR_UP);
  420. GPIO_SetPinMode(UART_ST_GPIO_Port, UART_ST_Pin, GPIO_MODE_IN);
  421. /* BTN1, BTN2, BTN3, BTN4: input, pull up */
  422. GPIO_SetPinPull(BTN1_GPIO_Port, BTN1_Pin, GPIO_PUPDR_UP);
  423. GPIO_SetPinMode(BTN1_GPIO_Port, BTN1_Pin, GPIO_MODE_IN);
  424. GPIO_SetPinPull(BTN2_GPIO_Port, BTN2_Pin, GPIO_PUPDR_UP);
  425. GPIO_SetPinMode(BTN2_GPIO_Port, BTN2_Pin, GPIO_MODE_IN);
  426. GPIO_SetPinPull(BTN3_GPIO_Port, BTN3_Pin, GPIO_PUPDR_UP);
  427. GPIO_SetPinMode(BTN3_GPIO_Port, BTN3_Pin, GPIO_MODE_IN);
  428. GPIO_SetPinPull(BTN4_GPIO_Port, BTN4_Pin, GPIO_PUPDR_UP);
  429. GPIO_SetPinMode(BTN4_GPIO_Port, BTN4_Pin, GPIO_MODE_IN);
  430. }
  431. /**
  432. * Enable DMA controller clock
  433. */
  434. static void DMA_Init(void)
  435. {
  436. /* DMA controller clock enable */
  437. RCC->AHBENR |= RCC_AHBENR_DMA1EN;
  438. /* enable DMA1 clock in Sleep/Stop mode */
  439. //RCC->AHBSMENR |= RCC_AHBSMENR_DMA1SMEN;
  440. /* DMA interrupt init */
  441. /* DMA1_Channel1_IRQn interrupt configuration */
  442. NVIC_SetPriority(DMA1_Channel1_IRQn, 0);
  443. NVIC_EnableIRQ(DMA1_Channel1_IRQn);
  444. /* DMA1_Channel2_3_IRQn interrupt configuration */
  445. NVIC_SetPriority(DMA1_Channel2_3_IRQn, 0);
  446. NVIC_EnableIRQ(DMA1_Channel2_3_IRQn);
  447. }
  448. /**
  449. * @brief I2C1 Initialization Function
  450. * @param None
  451. * @retval None
  452. */
  453. static void I2C1_Init(void)
  454. {
  455. /** I2C1 GPIO Configuration
  456. PB8 ------> I2C1_SCL
  457. PB9 ------> I2C1_SDA
  458. */
  459. GPIO_SetPinMode(GPIOB, GPIO_PIN_8, GPIO_MODE_AFF);
  460. GPIO_SetPinOutputType(GPIOB, GPIO_PIN_8, GPIO_OTYPE_OD);
  461. GPIO_SetPinSpeed(GPIOB, GPIO_PIN_8, GPIO_OSPEED_HI);
  462. GPIO_SetPinPull(GPIOB, GPIO_PIN_8, GPIO_PUPDR_UP);
  463. GPIO_SetAFPin_8_15(GPIOB, GPIO_PIN_8, GPIO_AF_6);
  464. GPIO_SetPinMode(GPIOB, GPIO_PIN_9, GPIO_MODE_AFF);
  465. GPIO_SetPinOutputType(GPIOB, GPIO_PIN_9, GPIO_OTYPE_OD);
  466. GPIO_SetPinSpeed(GPIOB, GPIO_PIN_9, GPIO_OSPEED_HI);
  467. GPIO_SetPinPull(GPIOB, GPIO_PIN_9, GPIO_PUPDR_UP);
  468. GPIO_SetAFPin_8_15(GPIOB, GPIO_PIN_9, GPIO_AF_6);
  469. /** I2C1 DMA Init */
  470. /* I2C1_RX Init: Priority medium, Memory increment, read from perephireal,
  471. transfer error interrupt enable, transfer complete interrupt enable */
  472. DMA1_Channel2->CCR = (DMA_CCR_PL_0 | DMA_CCR_MINC | DMA_CCR_TEIE | DMA_CCR_TCIE);
  473. /* Route DMA channel 2 to I2C1 RX */
  474. DMAMUX1_Channel1->CCR = 10;
  475. /* I2C1_TX Init: Priority medium, Memory increment, read from memory,
  476. transfer error interrupt enable, transfer complete interrupt enable */
  477. DMA1_Channel3->CCR = (DMA_CCR_PL_0 | DMA_CCR_MINC| DMA_CCR_DIR | DMA_CCR_TEIE | DMA_CCR_TCIE);
  478. /* Route DMA channel 3 to I2C1 TX */
  479. DMAMUX1_Channel2->CCR = 11;
  480. /** I2C Initialization: I2C_Fast */
  481. I2C1->TIMINGR = 0x0010061A;
  482. I2C1->CR2 = I2C_CR2_AUTOEND;
  483. I2C1->CR1 = I2C_CR1_PE;
  484. }
  485. /**
  486. * @brief SPI1 Initialization Function
  487. * @param None
  488. * @retval None
  489. */
  490. static void SPI1_Init(void)
  491. {
  492. /**SPI1 GPIO Configuration
  493. PB3 ------> SPI1_SCK
  494. PB5 ------> SPI1_MOSI
  495. */
  496. GPIO_SetPinMode(GPIOB, GPIO_PIN_3, GPIO_MODE_AFF);
  497. GPIO_SetPinOutputType(GPIOB, GPIO_PIN_3, GPIO_OTYPE_OD);
  498. GPIO_SetPinSpeed(GPIOB, GPIO_PIN_3, GPIO_OSPEED_HI);
  499. GPIO_SetPinMode(GPIOB, GPIO_PIN_5, GPIO_MODE_AFF);
  500. GPIO_SetPinOutputType(GPIOB, GPIO_PIN_5, GPIO_OTYPE_OD);
  501. GPIO_SetPinSpeed(GPIOB, GPIO_PIN_5, GPIO_OSPEED_HI);
  502. /* SPI1 DMA Init */
  503. /* SPI1_TX Init: Priority high, Memory increment, read from memory, circular mode,
  504. Enable DMA transfer complete/error interrupts */
  505. DMA1_Channel1->CCR = (DMA_CCR_PL_1 | DMA_CCR_MINC | DMA_CCR_CIRC | DMA_CCR_TEIE | DMA_CCR_DIR | DMA_CCR_TCIE);
  506. /* Route DMA channel 1 to SPI1 TX */
  507. DMAMUX1_Channel0->CCR = 0x11;
  508. /* SPI1 interrupt Init */
  509. NVIC_SetPriority(SPI1_IRQn, 0);
  510. NVIC_EnableIRQ(SPI1_IRQn);
  511. /* SPI1 parameter configuration: master mode, data 8 bit, divider = 16, TX DMA */
  512. SPI1->CR1 = (SPI_CR1_MSTR | SPI_CR1_BR_1 | SPI_CR1_BR_0 | SPI_CR1_SSM | SPI_CR1_SSI);
  513. SPI1->CR2 = (SPI_CR2_DS_2 | SPI_CR2_DS_1 | SPI_CR2_DS_0 | SPI_CR2_TXDMAEN | SPI_CR2_FRXTH);
  514. }
  515. /**
  516. * @brief TIM1 Initialization Function
  517. * @param None
  518. * @retval None
  519. */
  520. static void TIM1_Init(void)
  521. {
  522. /* target clock */
  523. TIM1->PSC = TIM1_PSC; // prescaler
  524. TIM1->ARR = TIM1_ARR; // auto reload value
  525. TIM1->CR1 = TIM_CR1_ARPE;
  526. // initial pwm value
  527. TIM1->CCR1 = PWM_TUBE_INIT_VAL;
  528. TIM1->CCR2 = PWM_LED_INIT_VAL;
  529. TIM1->CCR3 = PWM_LED_INIT_VAL;
  530. TIM1->CCR4 = PWM_LED_INIT_VAL;
  531. // pwm mode 1 for 4 chanels
  532. TIM1->CCMR1 = (TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC2M_1 | TIM_CCMR1_OC2M_2 | TIM_CCMR1_OC1PE | TIM_CCMR1_OC2PE);
  533. TIM1->CCMR2 = (TIM_CCMR2_OC3M_1 | TIM_CCMR2_OC3M_2 | TIM_CCMR2_OC4M_1 | TIM_CCMR2_OC4M_2 | TIM_CCMR2_OC3PE | TIM_CCMR2_OC4PE);
  534. // reset int flag - not needed, int unused
  535. //TIM1->SR |= TIM_SR_UIF;
  536. TIM1->BDTR = TIM_BDTR_MOE; // enable main output
  537. TIM1->EGR = TIM_EGR_UG; // force timer update
  538. /* TIM1 CC_EnableChannel */
  539. TIM1->CCER = (TIM_CCER_CC1E | TIM_CCER_CC2E | TIM_CCER_CC3E | TIM_CCER_CC4E);
  540. /* TIM_EnableCounter */
  541. TIM1->CR1 |= TIM_CR1_CEN;
  542. /** TIM1 GPIO Configuration
  543. PA8 ------> TIM1_CH1
  544. PA9 ------> TIM1_CH2
  545. PA10 ------> TIM1_CH3
  546. PA11 [PA9] ------> TIM1_CH4
  547. */
  548. GPIO_SetPinMode(PWM_1_GPIO_Port, PWM_1_Pin, GPIO_MODE_AFF);
  549. GPIO_SetPinSpeed(PWM_1_GPIO_Port, PWM_1_Pin, GPIO_OSPEED_HI);
  550. GPIO_SetPinPull(PWM_1_GPIO_Port, PWM_1_Pin, GPIO_PUPDR_DW);
  551. GPIO_SetAFPin_8_15(PWM_1_GPIO_Port, PWM_1_Pin, GPIO_AF_2);
  552. GPIO_SetPinMode(PWM_R_GPIO_Port, PWM_R_Pin, GPIO_MODE_AFF);
  553. GPIO_SetPinSpeed(PWM_R_GPIO_Port, PWM_R_Pin, GPIO_OSPEED_HI);
  554. GPIO_SetPinPull(PWM_R_GPIO_Port, PWM_R_Pin, GPIO_PUPDR_DW);
  555. GPIO_SetAFPin_8_15(PWM_R_GPIO_Port, PWM_R_Pin, GPIO_AF_2);
  556. GPIO_SetPinMode(PWM_B_GPIO_Port, PWM_B_Pin, GPIO_MODE_AFF);
  557. GPIO_SetPinSpeed(PWM_B_GPIO_Port, PWM_B_Pin, GPIO_OSPEED_HI);
  558. GPIO_SetPinPull(PWM_B_GPIO_Port, PWM_B_Pin, GPIO_PUPDR_DW);
  559. GPIO_SetAFPin_8_15(PWM_B_GPIO_Port, PWM_B_Pin, GPIO_AF_2);
  560. GPIO_SetPinMode(PWM_G_GPIO_Port, PWM_G_Pin, GPIO_MODE_AFF);
  561. GPIO_SetPinSpeed(PWM_G_GPIO_Port, PWM_G_Pin, GPIO_OSPEED_HI);
  562. GPIO_SetPinPull(PWM_G_GPIO_Port, PWM_G_Pin, GPIO_PUPDR_DW);
  563. GPIO_SetAFPin_8_15(PWM_G_GPIO_Port, PWM_G_Pin, GPIO_AF_2);
  564. }
  565. /**
  566. * @brief TIM3 Initialization Function
  567. * @param None
  568. * @retval None
  569. */
  570. static void TIM3_Init(void)
  571. {
  572. /* target clock */
  573. TIM3->PSC = TIM3_PSC; // prescaler
  574. TIM3->ARR = TIM3_ARR; // auto reload value
  575. TIM3->CR1 = TIM_CR1_ARPE;
  576. // initial pwm value
  577. TIM3->CCR1 = PWM_TUBE_INIT_VAL;
  578. TIM3->CCR2 = PWM_TUBE_INIT_VAL;
  579. TIM3->CCR3 = PWM_TUBE_INIT_VAL;
  580. TIM3->CCR4 = PWM_TUBE_INIT_VAL;
  581. // pwm mode 1 for 4 chanels
  582. TIM3->CCMR1 = (TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC2M_1 | TIM_CCMR1_OC2M_2 | TIM_CCMR1_OC1PE | TIM_CCMR1_OC2PE);
  583. TIM3->CCMR2 = (TIM_CCMR2_OC3M_1 | TIM_CCMR2_OC3M_2 | TIM_CCMR2_OC4M_1 | TIM_CCMR2_OC4M_2 | TIM_CCMR2_OC3PE | TIM_CCMR2_OC4PE);
  584. // launch timer
  585. TIM3->EGR = TIM_EGR_UG; // force timer update
  586. /* TIM3 TIM_CC_EnableChannel */
  587. TIM3->CCER = (TIM_CCER_CC1E | TIM_CCER_CC2E | TIM_CCER_CC3E | TIM_CCER_CC4E);
  588. /* TIM3 enable */
  589. TIM3->CR1 |= TIM_CR1_CEN;
  590. /**TIM3 GPIO Configuration
  591. PA6 ------> TIM3_CH1
  592. PA7 ------> TIM3_CH2
  593. PB0 ------> TIM3_CH3
  594. PB1 ------> TIM3_CH4
  595. */
  596. GPIO_SetPinMode(PWM_5_GPIO_Port, PWM_5_Pin, GPIO_MODE_AFF);
  597. GPIO_SetPinSpeed(PWM_5_GPIO_Port, PWM_5_Pin, GPIO_OSPEED_HI);
  598. GPIO_SetPinPull(PWM_5_GPIO_Port, PWM_5_Pin, GPIO_PUPDR_DW);
  599. GPIO_SetAFPin_0_7(PWM_5_GPIO_Port, PWM_5_Pin, GPIO_AF_1);
  600. GPIO_SetPinMode(PWM_4_GPIO_Port, PWM_4_Pin, GPIO_MODE_AFF);
  601. GPIO_SetPinSpeed(PWM_4_GPIO_Port, PWM_4_Pin, GPIO_OSPEED_HI);
  602. GPIO_SetPinPull(PWM_4_GPIO_Port, PWM_4_Pin, GPIO_PUPDR_DW);
  603. GPIO_SetAFPin_0_7(PWM_4_GPIO_Port, PWM_4_Pin, GPIO_AF_1);
  604. GPIO_SetPinMode(PWM_3_GPIO_Port, PWM_3_Pin, GPIO_MODE_AFF);
  605. GPIO_SetPinSpeed(PWM_3_GPIO_Port, PWM_3_Pin, GPIO_OSPEED_HI);
  606. GPIO_SetPinPull(PWM_3_GPIO_Port, PWM_3_Pin, GPIO_PUPDR_DW);
  607. GPIO_SetAFPin_0_7(PWM_3_GPIO_Port, PWM_3_Pin, GPIO_AF_1);
  608. GPIO_SetPinMode(PWM_2_GPIO_Port, PWM_2_Pin, GPIO_MODE_AFF);
  609. GPIO_SetPinSpeed(PWM_2_GPIO_Port, PWM_2_Pin, GPIO_OSPEED_HI);
  610. GPIO_SetPinPull(PWM_2_GPIO_Port, PWM_2_Pin, GPIO_PUPDR_DW);
  611. GPIO_SetAFPin_0_7(PWM_2_GPIO_Port, PWM_2_Pin, GPIO_AF_1);
  612. }
  613. /**
  614. * @brief TIM14 Initialization Function
  615. * @param None
  616. * @retval None
  617. * @desc "Блинкование" разрядами.
  618. */
  619. static void TIM14_Init(void)
  620. {
  621. /* Peripheral clock enable */
  622. RCC->APBENR2 |= RCC_APBENR2_TIM14EN;
  623. /* TIM14 interrupt Init */
  624. NVIC_SetPriority(TIM14_IRQn, 0);
  625. NVIC_EnableIRQ(TIM14_IRQn);
  626. /* Set TIM14 for 1 sec period */
  627. TIM14->PSC = TIM14_PSC;
  628. TIM14->ARR = TIM14_ARR;
  629. /* Enable: Auto-reload preload */
  630. TIM14->CR1 = (TIM_CR1_ARPE);
  631. /* Output compare 1 preload */
  632. TIM14->CCMR1 = (TIM_CCMR1_OC1M_0 | TIM_CCMR1_OC1PE);
  633. /* Enable Channel_1 */
  634. TIM14->CCER = TIM_CCER_CC1E;
  635. /* Impulse value in msek */
  636. TIM14->CCR1 = TIM14_PULSE_VAL;
  637. /* Enable IRQ for Update end CaptureCompare envents */
  638. TIM14->DIER = (TIM_DIER_UIE | TIM_DIER_CC1IE);
  639. }
  640. /**
  641. * На старте активируем все каналы, при совпадении отключаем (не)нужные.
  642. */
  643. void Blink_Start(void)
  644. {
  645. /* clear IRQ flags */
  646. TIM14->SR |= TIM_SR_UIF;
  647. TIM14->SR |= TIM_SR_CC1IF;
  648. /* clear counter value */
  649. TIM14->CNT = 0;
  650. /* enable timer */
  651. TIM14->CR1 |= TIM_CR1_CEN;
  652. }
  653. void Blink_Stop(void)
  654. {
  655. /* disable timer */
  656. TIM14->CR1 &= ~(TIM_CR1_CEN);
  657. /* enable channels */
  658. if (Flag.Blink_1 != 0) {
  659. TUBE_A_ON;
  660. }
  661. if (Flag.Blink_2 != 0) {
  662. TUBE_B_ON;
  663. }
  664. if (Flag.Blink_3 != 0) {
  665. TUBE_C_ON;
  666. }
  667. if (Flag.Blink_4 != 0) {
  668. TUBE_D_ON;
  669. }
  670. if (Flag.Blink_5 != 0) {
  671. TUBE_E_ON;
  672. }
  673. /* clear flags */
  674. Flag.Blink_1 = 0;
  675. Flag.Blink_2 = 0;
  676. Flag.Blink_3 = 0;
  677. Flag.Blink_4 = 0;
  678. Flag.Blink_5 = 0;
  679. }
  680. /**
  681. * @brief TIM16 Initialization Function
  682. * @param None
  683. * @retval None
  684. */
  685. static void TIM16_Init(void)
  686. {
  687. /* Peripheral clock enable */
  688. RCC->APBENR2 |= RCC_APBENR2_TIM16EN;
  689. /* TIM16 interrupt Init */
  690. NVIC_SetPriority(TIM16_IRQn, 0);
  691. NVIC_EnableIRQ(TIM16_IRQn);
  692. /* setup clock */
  693. TIM16->PSC = TIM16_PSC; // prescaler
  694. TIM16->ARR = TIM16_ARR; // auto reload value
  695. TIM16->CR1 = TIM_CR1_ARPE;
  696. // initial pwm value
  697. //TIM16->CCR1 = TIM16_ARR/2; //TIM16_PWM_VAL;
  698. // pwm mode 1 for 1 chanel
  699. //TIM16->CCMR1 = (TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1PE);
  700. // reset int flag
  701. TIM16->SR |= TIM_SR_UIF;
  702. TIM16->BDTR = TIM_BDTR_MOE; // enable main output
  703. TIM16->EGR = TIM_EGR_UG; // force timer update
  704. /* TIM16 CC_EnableChannel */
  705. //TIM16->CCER = TIM_CCER_CC1E;
  706. /* Enable IRQ */
  707. TIM16->DIER = TIM_DIER_UIE;
  708. /* TIM_EnableCounter */
  709. TIM16->CR1 |= TIM_CR1_CEN;
  710. }
  711. /**
  712. * @brief TIM17 Initialization Function
  713. * @param None
  714. * @retval None
  715. */
  716. static void TIM17_Init(void)
  717. {
  718. /* Peripheral clock enable */
  719. RCC->APBENR2 |= RCC_APBENR2_TIM17EN;
  720. /* TIM17 interrupt Init */
  721. NVIC_SetPriority(TIM17_IRQn, 0);
  722. NVIC_EnableIRQ(TIM17_IRQn);
  723. /* setup clock */
  724. TIM17->PSC = TIM17_PSC; // prescaler
  725. TIM17->ARR = TIM17_ARR; // auto reload value
  726. TIM17->CR1 = TIM_CR1_ARPE;
  727. // initial pwm value
  728. //TIM17->CCR1 = TIM17_PWM_VAL;
  729. // pwm mode 1 for 1 chanel
  730. TIM17->CCMR1 = (TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1PE);
  731. // reset int flag
  732. TIM17->SR |= TIM_SR_UIF;
  733. TIM17->BDTR = TIM_BDTR_MOE; // enable main output
  734. TIM17->EGR = TIM_EGR_UG; // force timer update
  735. /* TIM17 CC_EnableChannel */
  736. TIM17->CCER = TIM_CCER_CC1E;
  737. /* TIM_EnableCounter */
  738. TIM17->CR1 |= TIM_CR1_CEN;
  739. /* Enable IRQ */
  740. TIM17->DIER = TIM_DIER_UIE;
  741. }
  742. /**
  743. * @brief USART1 Initialization Function
  744. * @param None
  745. * @retval None
  746. */
  747. static void USART1_UART_Init(void)
  748. {
  749. /* Peripheral clock enable */
  750. RCC->APBENR2 |= RCC_APBENR2_USART1EN;
  751. /**USART1 GPIO Configuration
  752. PB6 ------> USART1_TX
  753. PB7 ------> USART1_RX
  754. */
  755. GPIO_SetPinMode(GPIOB, GPIO_PIN_6, GPIO_MODE_AFF);
  756. GPIO_SetPinSpeed(GPIOB, GPIO_PIN_6, GPIO_OSPEED_HI);
  757. GPIO_SetPinMode(GPIOB, GPIO_PIN_7, GPIO_MODE_AFF);
  758. GPIO_SetPinSpeed(GPIOB, GPIO_PIN_7, GPIO_OSPEED_HI);
  759. /* USART1 interrupt Init */
  760. NVIC_SetPriority(USART1_IRQn, 0);
  761. NVIC_EnableIRQ(USART1_IRQn);
  762. USART1->CR1 |= (USART_CR1_TE |USART_CR1_RE);
  763. USART1->BRR = 138;
  764. /* USART1 Enable */
  765. USART1->CR1 |= USART_CR1_UE;
  766. /* Polling USART1 initialisation */
  767. while((!(USART1->ISR & USART_ISR_TEACK)) || (!(USART1->ISR & USART_ISR_REACK)))
  768. {
  769. }
  770. }