board.c 11 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350
  1. #include "board.h"
  2. /* private functions */
  3. static void TIM1_Init(void);
  4. static void TIM3_Init(void);
  5. static void TIM14_Init(void);
  6. static void TIM16_Init(void);
  7. static void TIM17_Init(void);
  8. /* Board perephireal Configuration */
  9. void Board_Init(void)
  10. {
  11. /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
  12. RCC->APBENR2 |= RCC_APBENR2_SYSCFGEN;
  13. RCC->APBENR1 |= RCC_APBENR1_PWREN;
  14. /* Peripheral interrupt init*/
  15. /* RCC_IRQn interrupt configuration */
  16. NVIC_SetPriority(RCC_IRQn, 0);
  17. NVIC_EnableIRQ(RCC_IRQn);
  18. /* Configure the system clock */
  19. SystemClock_Config();
  20. /* Processor uses sleep as its low power mode */
  21. SCB->SCR &= ~((uint32_t)SCB_SCR_SLEEPDEEP_Msk);
  22. /* DisableSleepOnExit */
  23. SCB->SCR &= ~((uint32_t)SCB_SCR_SLEEPONEXIT_Msk);
  24. /* в дейтвительности нигде не используеться? */
  25. //LL_RCC_GetSystemClocksFreq(&rcc_clocks); :::
  26. /* Get SYSCLK frequency */
  27. ///RCC_Clocks->SYSCLK_Frequency = RCC_GetSystemClockFreq();
  28. /* HCLK clock frequency */
  29. ///RCC_Clocks->HCLK_Frequency = RCC_GetHCLKClockFreq(RCC_Clocks->SYSCLK_Frequency);
  30. /* PCLK1 clock frequency */
  31. ///RCC_Clocks->PCLK1_Frequency = RCC_GetPCLK1ClockFreq(RCC_Clocks->HCLK_Frequency);
  32. /* Initialize all configured peripherals */
  33. /* Start RGB & Tube Power PWM */
  34. TIM1_Init();
  35. TIM3_Init();
  36. //TIM14_Init();
  37. //TIM16_Init();
  38. //TIM17_Init();
  39. }
  40. /**
  41. * @brief System Clock Configuration
  42. * @retval None
  43. */
  44. void SystemClock_Config(void)
  45. {
  46. /* HSI configuration and activation */
  47. RCC->CR |= RCC_CR_HSIKERON; // Enable HSI even in stop mode
  48. while((RCC->CR & RCC_CR_HSIRDY) == 0)
  49. {
  50. }
  51. /* Main PLL configuration and activation */
  52. RCC->PLLCFGR &= ~(RCC_PLLCFGR_PLLSRC | RCC_PLLCFGR_PLLM | RCC_PLLCFGR_PLLN | RCC_PLLCFGR_PLLR);
  53. RCC->PLLCFGR |= (RCC_PLLCFGR_PLLSRC_HSI | (9 << RCC_PLLCFGR_PLLN_Pos) | RCC_PLLCFGR_PLLR_2 | RCC_PLLCFGR_PLLR_0);
  54. RCC->PLLCFGR |= RCC_PLLCFGR_PLLREN; // RCC_PLL_EnableDomain_SYS
  55. RCC->CR |= RCC_CR_PLLON; // RCC_PLL_Enable
  56. while((RCC->CR & RCC_CR_PLLRDY) == 0)
  57. {
  58. }
  59. /* Set AHB prescaler*/
  60. //RCC->CFGR &= ~(RCC_CFGR_HPRE);
  61. //RCC->CFGR |= 0x00000000U;
  62. /* Sysclk activation on the main PLL */
  63. RCC->CFGR &= RCC_CFGR_SW;
  64. RCC->CFGR |= RCC_CFGR_SW_1;
  65. while((RCC->CFGR & RCC_CFGR_SWS) != RCC_CFGR_SWS_1)
  66. {
  67. }
  68. /* Set APB1 prescaler !!! uncorrect !!! */
  69. //RCC->CFGR &= RCC_CFGR_PPRE;
  70. //RCC->CFGR |= 0x00000000U;
  71. #ifdef USES_SYSTICK
  72. /* Configure the SysTick to have interrupt in 1ms time base */
  73. SysTick->LOAD = (uint32_t)((24000000 / 1000) - 1UL); /* set reload register */
  74. SysTick->VAL = 0UL; /* Load the SysTick Counter Value */
  75. SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk |
  76. SysTick_CTRL_ENABLE_Msk; /* Enable the Systick Timer */
  77. #endif
  78. /* Update CMSIS variable (which can be updated also through SystemCoreClockUpdate function) */
  79. SystemCoreClock = 24000000;
  80. /* SetI2CClockSource */
  81. RCC->CCIPR &= ~(RCC_CCIPR_I2C1SEL);
  82. RCC->CCIPR |= RCC_CCIPR_I2C1SEL_1;
  83. }
  84. /**
  85. * @brief TIM1 Initialization Function
  86. * @param None
  87. * @retval None
  88. */
  89. static void TIM1_Init(void)
  90. {
  91. /* Peripheral clock TIM1 enable */
  92. RCC->APBENR2 |= RCC_APBENR2_TIM1EN;
  93. /* Peripheral clock GPIOA enable */
  94. RCC->IOPENR |= RCC_IOPENR_GPIOAEN;
  95. /* target clock - 200 Hz */
  96. TIM1->PSC = TIM1_PSC; // prescaler
  97. TIM1->ARR = TIM1_ARR; // auto reload value
  98. TIM1->CR1 = TIM_CR1_ARPE;
  99. // initial pwm value
  100. TIM1->CCR1 = PWM_TUBE_INIT_VAL;
  101. TIM1->CCR2 = PWM_LED_INIT_VAL;
  102. TIM1->CCR3 = PWM_LED_INIT_VAL;
  103. TIM1->CCR4 = PWM_LED_INIT_VAL;
  104. // pwm mode 1 for 4 chanels
  105. TIM1->CCMR1 = (TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC2M_1 | TIM_CCMR1_OC2M_2 | TIM_CCMR1_OC1PE | TIM_CCMR1_OC2PE);
  106. TIM1->CCMR2 = (TIM_CCMR2_OC3M_1 | TIM_CCMR2_OC3M_2 | TIM_CCMR2_OC4M_1 | TIM_CCMR2_OC4M_2 | TIM_CCMR2_OC3PE | TIM_CCMR2_OC4PE);
  107. // reset int flag - not needed, int unused
  108. //TIM1->SR |= TIM_SR_UIF;
  109. TIM1->BDTR = TIM_BDTR_MOE; // enable main output
  110. TIM1->EGR = TIM_EGR_UG; // force timer update
  111. /* TIM1 CC_EnableChannel */
  112. TIM1->CCER = (TIM_CCER_CC1E | TIM_CCER_CC2E | TIM_CCER_CC3E | TIM_CCER_CC4E);
  113. /* TIM_EnableCounter */
  114. TIM1->CR1 |= TIM_CR1_CEN;
  115. /** TIM1 GPIO Configuration
  116. PA8 ------> TIM1_CH1
  117. PA9 ------> TIM1_CH2
  118. PA10 ------> TIM1_CH3
  119. PA11 [PA9] ------> TIM1_CH4
  120. */
  121. GPIO_SetPinMode(PWM_1_GPIO_Port, PWM_1_Pin, GPIO_MODE_AFF);
  122. GPIO_SetPinSpeed(PWM_1_GPIO_Port, PWM_1_Pin, GPIO_OSPEED_HI);
  123. GPIO_SetPinPull(PWM_1_GPIO_Port, PWM_1_Pin, GPIO_PUPDR_DW);
  124. GPIO_SetAFPin_8_15(PWM_1_GPIO_Port, PWM_1_Pin, GPIO_AF_2);
  125. GPIO_SetPinMode(PWM_R_GPIO_Port, PWM_R_Pin, GPIO_MODE_AFF);
  126. GPIO_SetPinSpeed(PWM_R_GPIO_Port, PWM_R_Pin, GPIO_OSPEED_HI);
  127. GPIO_SetPinPull(PWM_R_GPIO_Port, PWM_R_Pin, GPIO_PUPDR_DW);
  128. GPIO_SetAFPin_8_15(PWM_R_GPIO_Port, PWM_R_Pin, GPIO_AF_2);
  129. GPIO_SetPinMode(PWM_B_GPIO_Port, PWM_B_Pin, GPIO_MODE_AFF);
  130. GPIO_SetPinSpeed(PWM_B_GPIO_Port, PWM_B_Pin, GPIO_OSPEED_HI);
  131. GPIO_SetPinPull(PWM_B_GPIO_Port, PWM_B_Pin, GPIO_PUPDR_DW);
  132. GPIO_SetAFPin_8_15(PWM_B_GPIO_Port, PWM_B_Pin, GPIO_AF_2);
  133. GPIO_SetPinMode(PWM_G_GPIO_Port, PWM_G_Pin, GPIO_MODE_AFF);
  134. GPIO_SetPinSpeed(PWM_G_GPIO_Port, PWM_G_Pin, GPIO_OSPEED_HI);
  135. GPIO_SetPinPull(PWM_G_GPIO_Port, PWM_G_Pin, GPIO_PUPDR_DW);
  136. GPIO_SetAFPin_8_15(PWM_G_GPIO_Port, PWM_G_Pin, GPIO_AF_2);
  137. }
  138. /**
  139. * @brief TIM3 Initialization Function
  140. * @param None
  141. * @retval None
  142. */
  143. static void TIM3_Init(void)
  144. {
  145. /* Peripheral clock TIM1 enable */
  146. RCC->APBENR1 |= RCC_APBENR1_TIM3EN;
  147. /* Peripheral clock GPIOA and GPIOB enable */
  148. RCC->IOPENR |= (RCC_IOPENR_GPIOAEN | RCC_IOPENR_GPIOBEN);
  149. /* target clock - 200 Hz */
  150. TIM3->PSC = TIM3_PSC; // prescaler
  151. TIM3->ARR = TIM3_ARR; // auto reload value
  152. TIM3->CR1 = TIM_CR1_ARPE;
  153. // initial pwm value
  154. TIM3->CCR1 = PWM_TUBE_INIT_VAL;
  155. TIM3->CCR2 = PWM_TUBE_INIT_VAL;
  156. TIM3->CCR3 = PWM_TUBE_INIT_VAL;
  157. TIM3->CCR4 = PWM_TUBE_INIT_VAL;
  158. // pwm mode 1 for 4 chanels
  159. TIM3->CCMR1 = (TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC2M_1 | TIM_CCMR1_OC2M_2 | TIM_CCMR1_OC1PE | TIM_CCMR1_OC2PE);
  160. TIM3->CCMR2 = (TIM_CCMR2_OC3M_1 | TIM_CCMR2_OC3M_2 | TIM_CCMR2_OC4M_1 | TIM_CCMR2_OC4M_2 | TIM_CCMR2_OC3PE | TIM_CCMR2_OC4PE);
  161. // launch timer
  162. TIM3->EGR = TIM_EGR_UG; // force timer update
  163. /* TIM3 TIM_CC_EnableChannel */
  164. TIM3->CCER = (TIM_CCER_CC1E | TIM_CCER_CC2E | TIM_CCER_CC3E | TIM_CCER_CC4E);
  165. /* TIM3 enable */
  166. TIM3->CR1 |= TIM_CR1_CEN;
  167. /**TIM3 GPIO Configuration
  168. PA6 ------> TIM3_CH1
  169. PA7 ------> TIM3_CH2
  170. PB0 ------> TIM3_CH3
  171. PB1 ------> TIM3_CH4
  172. */
  173. GPIO_SetPinMode(PWM_5_GPIO_Port, PWM_5_Pin, GPIO_MODE_AFF);
  174. GPIO_SetPinSpeed(PWM_5_GPIO_Port, PWM_5_Pin, GPIO_OSPEED_HI);
  175. GPIO_SetPinPull(PWM_5_GPIO_Port, PWM_5_Pin, GPIO_PUPDR_DW);
  176. GPIO_SetAFPin_0_7(PWM_5_GPIO_Port, PWM_5_Pin, GPIO_AF_1);
  177. GPIO_SetPinMode(PWM_4_GPIO_Port, PWM_4_Pin, GPIO_MODE_AFF);
  178. GPIO_SetPinSpeed(PWM_4_GPIO_Port, PWM_4_Pin, GPIO_OSPEED_HI);
  179. GPIO_SetPinPull(PWM_4_GPIO_Port, PWM_4_Pin, GPIO_PUPDR_DW);
  180. GPIO_SetAFPin_0_7(PWM_4_GPIO_Port, PWM_4_Pin, GPIO_AF_1);
  181. GPIO_SetPinMode(PWM_3_GPIO_Port, PWM_3_Pin, GPIO_MODE_AFF);
  182. GPIO_SetPinSpeed(PWM_3_GPIO_Port, PWM_3_Pin, GPIO_OSPEED_HI);
  183. GPIO_SetPinPull(PWM_3_GPIO_Port, PWM_3_Pin, GPIO_PUPDR_DW);
  184. GPIO_SetAFPin_0_7(PWM_3_GPIO_Port, PWM_3_Pin, GPIO_AF_1);
  185. GPIO_SetPinMode(PWM_2_GPIO_Port, PWM_2_Pin, GPIO_MODE_AFF);
  186. GPIO_SetPinSpeed(PWM_2_GPIO_Port, PWM_2_Pin, GPIO_OSPEED_HI);
  187. GPIO_SetPinPull(PWM_2_GPIO_Port, PWM_2_Pin, GPIO_PUPDR_DW);
  188. GPIO_SetAFPin_0_7(PWM_2_GPIO_Port, PWM_2_Pin, GPIO_AF_1);
  189. }
  190. /**
  191. * @brief TIM14 Initialization Function
  192. * @param None
  193. * @retval None
  194. * @desc "Блинкование" разрядами - 0,75/0,25 сек вкл/выкл.
  195. */
  196. static void TIM14_Init(void)
  197. {
  198. /* Peripheral clock enable */
  199. RCC->APBENR2 |= RCC_APBENR2_TIM14EN;
  200. /* TIM14 interrupt Init */
  201. NVIC_SetPriority(TIM14_IRQn, 0);
  202. NVIC_EnableIRQ(TIM14_IRQn);
  203. /* Set TIM14 for 1 sec period */
  204. TIM14->PSC = TIM14_PSC;
  205. TIM14->ARR = TIM14_ARR;
  206. /* Enable: Auto-reload preload, One-pulse mode, */
  207. TIM14->CR1 = (TIM_CR1_ARPE | TIM_CR1_OPM);
  208. /* OC or PWM? (for pwm - (TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_1) ) , Output compare 1 preload */
  209. TIM14->CCMR1 = (TIM_CCMR1_OC1M_0 | TIM_CCMR1_OC1PE);
  210. /* Enable Channel_1 or no needed ??? */
  211. TIM14->CCER = TIM_CCER_CC1E;
  212. /* Impulse value in msek */
  213. TIM14->CCR1 = TIM14_PULSE_VAL;
  214. /* Enable IRQ for Update end CaptureCompare envents or only CC ??? */
  215. //TIM14->DIER = (TIM_DIER_UIE | TIM_DIER_CC1IE);
  216. TIM14->DIER = TIM_DIER_CC1IE;
  217. }
  218. /**
  219. * На старте активируем все каналы, при совпадении отключаем (не)нужные.
  220. */
  221. void Blink_Start(void)
  222. {
  223. /* enable all channels */
  224. TUBE_ALL_ON;
  225. /* clear IRQ flag */
  226. TIM14->SR |= TIM_SR_CC1IF;
  227. /* clear counter value */
  228. TIM14->CNT = 0;
  229. /* enable timer */
  230. TIM14->CR1 |= TIM_CR1_CEN;
  231. }
  232. void Blink_Stop(void)
  233. {
  234. /* disable timer */
  235. TIM14->CR1 &= ~(TIM_CR1_CEN);
  236. /* On all tubes */
  237. TUBE_ALL_ON;
  238. }
  239. /**
  240. * @brief TIM16 Initialization Function
  241. * @param None
  242. * @retval None
  243. */
  244. static void TIM16_Init(void)
  245. {
  246. /* Peripheral clock enable */
  247. RCC->APBENR2 |= RCC_APBENR2_TIM16EN;
  248. /* TIM16 interrupt Init */
  249. NVIC_SetPriority(TIM16_IRQn, 0);
  250. NVIC_EnableIRQ(TIM16_IRQn);
  251. /* setup clock */
  252. TIM16->PSC = TIM16_PSC; // prescaler
  253. TIM16->ARR = TIM16_ARR; // auto reload value
  254. TIM16->CR1 = TIM_CR1_ARPE;
  255. // initial pwm value
  256. //TIM16->CCR1 = TIM16_PWM_VAL;
  257. // pwm mode 1 for 1 chanel
  258. TIM16->CCMR1 = (TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1PE);
  259. // reset int flag
  260. TIM16->SR |= TIM_SR_UIF;
  261. TIM16->BDTR = TIM_BDTR_MOE; // enable main output
  262. TIM16->EGR = TIM_EGR_UG; // force timer update
  263. /* TIM16 CC_EnableChannel */
  264. TIM16->CCER = TIM_CCER_CC1E;
  265. /* TIM_EnableCounter */
  266. TIM16->CR1 |= TIM_CR1_CEN;
  267. /* Enable IRQ */
  268. TIM16->DIER = TIM_DIER_UIE;
  269. }
  270. /**
  271. * @brief TIM17 Initialization Function
  272. * @param None
  273. * @retval None
  274. */
  275. static void TIM17_Init(void)
  276. {
  277. /* Peripheral clock enable */
  278. RCC->APBENR2 |= RCC_APBENR2_TIM17EN;
  279. /* TIM17 interrupt Init */
  280. NVIC_SetPriority(TIM17_IRQn, 0);
  281. NVIC_EnableIRQ(TIM17_IRQn);
  282. /* setup clock */
  283. TIM17->PSC = TIM17_PSC; // prescaler
  284. TIM17->ARR = TIM17_ARR; // auto reload value
  285. TIM17->CR1 = TIM_CR1_ARPE;
  286. // initial pwm value
  287. //TIM17->CCR1 = TIM17_PWM_VAL;
  288. // pwm mode 1 for 1 chanel
  289. TIM17->CCMR1 = (TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1PE);
  290. // reset int flag
  291. TIM17->SR |= TIM_SR_UIF;
  292. TIM17->BDTR = TIM_BDTR_MOE; // enable main output
  293. TIM17->EGR = TIM_EGR_UG; // force timer update
  294. /* TIM17 CC_EnableChannel */
  295. TIM17->CCER = TIM_CCER_CC1E;
  296. /* TIM_EnableCounter */
  297. TIM17->CR1 |= TIM_CR1_CEN;
  298. /* Enable IRQ */
  299. TIM17->DIER = TIM_DIER_UIE;
  300. }