board.c 21 KB

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  1. #include "board.h"
  2. /* private defines */
  3. #define SPI_BUFFER_SIZE 5
  4. /* private variables */
  5. /**
  6. * Nixi Tube cathodes map in Byte Array:
  7. * {E0 E9 E8 E7 E6 E5 E4 E3}
  8. * {E2 E1 D0 D9 D8 D7 D6 D5}
  9. * {D4 D3 D2 D1 B0 B9 B8 B7}
  10. * {B6 B5 B4 B3 B2 B1 A0 A9}
  11. * {A8 A7 A6 A5 A4 A3 A2 A1}
  12. *
  13. * Shift register bit map in Tube cathodes (from 0 to 1):
  14. * {5.7 5.6 5.5 5.4 5.3 5.2 5.1 5.0 4.7 4.6} VL5/E
  15. * {4.5 4.4 4.3 4.2 4.1 4.0 3.7 3.6 3.5 3.4} VL4/D
  16. * {3.3 3.2 3.1 3.0 2.7 2.6 2.5 2.4 2.3 2.2} VL2/B
  17. * {2.1 2.0 1.7 1.6 1.5 1.4 1.3 1.2 1.1 1.0} VL1/A
  18. */
  19. static const uint16_t nixieCathodeMap[4][10] = {
  20. {0x8000, 0x0040, 0x0080, 0x0100, 0x0200, 0x0400, 0x0800, 0x1000, 0x2000, 0x4000},
  21. {0x2000, 0x0010, 0x0020, 0x0040, 0x0080, 0x0100, 0x0200, 0x0400, 0x0800, 0x1000},
  22. {0x0800, 0x0004, 0x0008, 0x0010, 0x0020, 0x0040, 0x0080, 0x0100, 0x0200, 0x0400},
  23. {0x0200, 0x0001, 0x0002, 0x0004, 0x0008, 0x0010, 0x0020, 0x0040, 0x0080, 0x0100}
  24. };
  25. //static const uint8_t nixieCathodeMask[4][2] = {{0x00, 0x3f}, {0xc0, 0x0f}, {0xf0, 0x03}, {0xc0, 0x00}};
  26. static uint8_t tubesBuffer[SPI_BUFFER_SIZE] = {0};
  27. //convert linear bright level to logariphmic
  28. const uint8_t cie[8] = { 0, 5, 14, 33, 64, 109, 172, 255 };
  29. /* private typedef */
  30. /* private functions */
  31. static void _show_digits(const tube4_t dig);
  32. static void GPIO_Init(void);
  33. static void DMA_Init(void);
  34. static void I2C1_Init(void);
  35. static void SPI1_Init(void);
  36. static void TIM1_Init(void);
  37. static void TIM3_Init(void);
  38. static void TIM14_Init(void);
  39. static void TIM16_Init(void);
  40. static void TIM17_Init(void);
  41. static void USART1_UART_Init(void);
  42. /* Board perephireal Configuration */
  43. void Board_Init(void)
  44. {
  45. /* Main peripheral clock enable */
  46. RCC->APBENR1 = (RCC_APBENR1_PWREN | RCC_APBENR1_I2C1EN | RCC_APBENR1_TIM3EN);
  47. RCC->APBENR2 = (RCC_APBENR2_SYSCFGEN | RCC_APBENR2_SPI1EN | RCC_APBENR2_TIM1EN);
  48. /* GPIO Ports Clock Enable */
  49. RCC->IOPENR = (RCC_IOPENR_GPIOAEN | RCC_IOPENR_GPIOBEN | RCC_IOPENR_GPIOCEN);
  50. /* Peripheral interrupt init*/
  51. /* RCC_IRQn interrupt configuration */
  52. NVIC_SetPriority(RCC_IRQn, 0);
  53. NVIC_EnableIRQ(RCC_IRQn);
  54. /* Configure the system clock */
  55. SystemClock_Config();
  56. /* Processor uses sleep as its low power mode */
  57. SCB->SCR &= ~((uint32_t)SCB_SCR_SLEEPDEEP_Msk);
  58. /* DisableSleepOnExit */
  59. SCB->SCR &= ~((uint32_t)SCB_SCR_SLEEPONEXIT_Msk);
  60. /* Initialize all configured peripherals */
  61. GPIO_Init();
  62. DMA_Init();
  63. I2C1_Init();
  64. SPI1_Init();
  65. /** Star SPI transfer to shift registers */
  66. /* Set DMA source and destination addresses. */
  67. /* Source: Address of the SPI buffer. */
  68. DMA1_Channel1->CMAR = (uint32_t)&tubesBuffer;
  69. /* Destination: SPI1 data register. */
  70. DMA1_Channel1->CPAR = (uint32_t)&(SPI1->DR);
  71. /* Set DMA data transfer length (SPI buffer length). */
  72. DMA1_Channel1->CNDTR = SPI_BUFFER_SIZE;
  73. /* Enable SPI transfer */
  74. SPI1->CR1 |= SPI_CR1_SPE;
  75. Flag.SPI_TX_End = 1;
  76. /* Enable tube power */
  77. TUBE_PWR_ON;
  78. /* display work now */
  79. /* Start RGB & Tube Power PWM */
  80. TIM1_Init();
  81. TIM3_Init();
  82. //TIM14_Init();
  83. //TIM16_Init();
  84. //TIM17_Init();
  85. //USART1_UART_Init();
  86. }
  87. /**
  88. * @brief Out digits to SPI buffer. ON/off tube power.
  89. * @param : array with four BCD digits
  90. * @retval : None
  91. */
  92. void showDigits(tube4_t dig)
  93. {
  94. static uint32_t old_dig = 0;
  95. uint8_t st = 0, ov = 0;
  96. if (old_dig == dig.u32) {
  97. _show_digits(dig);
  98. } else {
  99. while (ov < 15) {
  100. if (st == 0) {
  101. // new tube value
  102. st = 1;
  103. _show_digits(dig);
  104. ov ++;
  105. tdelay_ms(ov);
  106. } else {
  107. // old tube value
  108. st = 0;
  109. _show_digits((tube4_t)old_dig);
  110. tdelay_ms(15 - ov);
  111. }
  112. } // End of while
  113. old_dig = dig.u32;
  114. } // End of if-else
  115. }
  116. static void _show_digits(tube4_t dig)
  117. {
  118. /* Clear buffer */
  119. tubesBuffer[0] = 0;
  120. tubesBuffer[1] = 0;
  121. tubesBuffer[2] = 0;
  122. tubesBuffer[3] = 0;
  123. tubesBuffer[4] = 0;
  124. /* check values range */
  125. int i;
  126. for (i=0; i<4; i++) {
  127. if (dig.ar[i] > 9) {
  128. if (dig.ar[i] != 0xf) {
  129. dig.ar[i] = 0;
  130. }
  131. }
  132. }
  133. /* Wait for SPI */
  134. while (Flag.SPI_TX_End == 0);
  135. Flag.SPI_TX_End = 0;
  136. /* Feel buffer */
  137. tubesBuffer[0] = (uint8_t)(nixieCathodeMap[Tube_E][dig.s8.tE] >> 8);
  138. tubesBuffer[1] = (uint8_t)((nixieCathodeMap[Tube_E][dig.s8.tE]) | (nixieCathodeMap[Tube_D][dig.s8.tD] >> 8));
  139. tubesBuffer[2] = (uint8_t)((nixieCathodeMap[Tube_D][dig.s8.tD]) | (nixieCathodeMap[Tube_B][dig.s8.tB] >> 8));
  140. tubesBuffer[3] = (uint8_t)((nixieCathodeMap[Tube_B][dig.s8.tB]) | (nixieCathodeMap[Tube_A][dig.s8.tA] >> 8));
  141. tubesBuffer[4] = (uint8_t)(nixieCathodeMap[Tube_A][dig.s8.tA]);
  142. /* Start DMA transfer to SPI */
  143. DMA1_Channel1->CCR |= DMA_CCR_EN;
  144. /* On/Off tube power */
  145. for (i=0; i<4; i++) {
  146. if (dig.ar[i] == 0xf) {
  147. tube_PowerOff((tube_pos_t)i);
  148. } else {
  149. tube_PowerOn((tube_pos_t)i);
  150. }
  151. }
  152. }
  153. /**
  154. * @brief HSV to RGB convertion
  155. * @param hue: 0-59, sat: 0-255, val (lightness): 0-255
  156. * @return none. RGB value out direct to LED.
  157. */
  158. void HSV2LED(const uint8_t hue, const uint8_t sat, const uint8_t val) {
  159. int base;
  160. uint8_t r=0, g=0, b=0;
  161. if (sat == 0)
  162. { // Achromatic color (gray).
  163. r = val;
  164. g = val;
  165. b = val;
  166. } else {
  167. base = ((255 - sat) * val) >> 8;
  168. switch (hue / 10) {
  169. case 0:
  170. r = val;
  171. g = (((val - base) * hue) / 10) + base;
  172. b = base;
  173. break;
  174. case 1:
  175. r = (((val - base) * (10 - (hue % 10))) / 10) + base;
  176. g = val;
  177. b = base;
  178. break;
  179. case 2:
  180. r = base;
  181. g = val;
  182. b = (((val - base) * (hue % 10)) / 10) + base;
  183. break;
  184. case 3:
  185. r = base;
  186. g = (((val - base) * (10 - (hue % 10))) / 10) + base;
  187. b = val;
  188. break;
  189. case 4:
  190. r = (((val - base) * (hue % 10)) / 10) + base;
  191. g = base;
  192. b = val;
  193. break;
  194. case 5:
  195. r = val;
  196. g = base;
  197. b = (((val - base) * (10 - (hue % 10))) / 10) + base;
  198. break;
  199. }
  200. }
  201. COLOR_R(r);
  202. COLOR_G(g);
  203. COLOR_B(b);
  204. }
  205. void tube_PowerOn(tube_pos_t tube)
  206. {
  207. switch (tube) {
  208. case Tube_A:
  209. TUBE_A_ON;
  210. break;
  211. case Tube_B:
  212. TUBE_B_ON;
  213. break;
  214. case Tube_D:
  215. TUBE_D_ON;
  216. break;
  217. case Tube_E:
  218. TUBE_E_ON;
  219. break;
  220. default:
  221. break;
  222. }
  223. }
  224. void tube_PowerOff(tube_pos_t tube)
  225. {
  226. switch (tube) {
  227. case Tube_A:
  228. TUBE_A_OFF;
  229. break;
  230. case Tube_B:
  231. TUBE_B_OFF;
  232. break;
  233. case Tube_D:
  234. TUBE_D_OFF;
  235. break;
  236. case Tube_E:
  237. TUBE_E_OFF;
  238. break;
  239. default:
  240. break;
  241. }
  242. }
  243. /**
  244. * @brief System Clock Configuration
  245. * @retval None
  246. */
  247. void SystemClock_Config(void)
  248. {
  249. /* HSI configuration and activation */
  250. RCC->CR |= RCC_CR_HSION; // Enable HSI
  251. while((RCC->CR & RCC_CR_HSIRDY) == 0);
  252. /* Main PLL configuration and activation */
  253. //RCC->PLLCFGR &= ~(RCC_PLLCFGR_PLLSRC | RCC_PLLCFGR_PLLM | RCC_PLLCFGR_PLLN | RCC_PLLCFGR_PLLR);
  254. RCC->PLLCFGR = (RCC_PLLCFGR_PLLSRC_HSI | RCC_PLLCFGR_PLLM_0 | (9 << RCC_PLLCFGR_PLLN_Pos) | RCC_PLLCFGR_PLLR_1);
  255. RCC->PLLCFGR |= RCC_PLLCFGR_PLLREN; // RCC_PLL_EnableDomain_SYS
  256. RCC->CR |= RCC_CR_PLLON; // RCC_PLL_Enable
  257. while((RCC->CR & RCC_CR_PLLRDY) == 0);
  258. /* Sysclk activation on the main PLL */
  259. RCC->CFGR &= RCC_CFGR_SW;
  260. RCC->CFGR |= RCC_CFGR_SW_1;
  261. while((RCC->CFGR & RCC_CFGR_SWS) != RCC_CFGR_SWS_1);
  262. /* Update CMSIS variable (which can be updated also through SystemCoreClockUpdate function) */
  263. SystemCoreClock = 24000000;
  264. /* Set I2C Clock Source */
  265. RCC->CCIPR &= ~(RCC_CCIPR_I2C1SEL);
  266. RCC->CCIPR |= RCC_CCIPR_I2C1SEL_1;
  267. }
  268. /**
  269. * @brief GPIO Initialization Function
  270. * @param None
  271. * @retval None
  272. */
  273. static void GPIO_Init(void)
  274. {
  275. /* EXTI Line: falling, no pull, input */
  276. // interrupt on line 14
  277. EXTI->IMR1 |= EXTI_IMR1_IM14;
  278. // wake-up with event ?
  279. //EXTI->EMR1 |= EXTI_EMR1_EM14;
  280. // TRIGGER FALLING
  281. EXTI->FTSR1 = EXTI_FTSR1_FT14;
  282. // external interrupt selection - PC14 to EXTI14
  283. EXTI->EXTICR[3] = EXTI_EXTICR4_EXTI14_1;
  284. /* EXTI interrupt init*/
  285. NVIC_SetPriority(EXTI4_15_IRQn, 0);
  286. NVIC_EnableIRQ(EXTI4_15_IRQn);
  287. /* set GPIO modes */
  288. GPIO_SetPinMode(IRQ_GPIO_Port, IRQ_Pin, GPIO_MODE_IN);
  289. GPIO_SetPinPull(IRQ_GPIO_Port, IRQ_Pin, GPIO_PUPDR_UP);
  290. /* L0, L1, L2, L3 - IN-15 symbols control, PP out, high speed, pull down */
  291. GPIO_SetPinMode(LC0_GPIO_Port, LC0_Pin, GPIO_MODE_OUT);
  292. GPIO_SetPinSpeed(LC0_GPIO_Port, LC0_Pin, GPIO_OSPEED_HI);
  293. GPIO_SetPinPull(LC0_GPIO_Port, LC0_Pin, GPIO_PUPDR_DW);
  294. GPIO_SetPinMode(LC1_GPIO_Port, LC1_Pin, GPIO_MODE_OUT);
  295. GPIO_SetPinSpeed(LC1_GPIO_Port, LC1_Pin, GPIO_OSPEED_HI);
  296. GPIO_SetPinPull(LC1_GPIO_Port, LC1_Pin, GPIO_PUPDR_DW);
  297. GPIO_SetPinMode(LC2_GPIO_Port, LC2_Pin, GPIO_MODE_OUT);
  298. GPIO_SetPinSpeed(LC2_GPIO_Port, LC2_Pin, GPIO_OSPEED_HI);
  299. GPIO_SetPinPull(LC2_GPIO_Port, LC2_Pin, GPIO_PUPDR_DW);
  300. GPIO_SetPinMode(LC3_GPIO_Port, LC3_Pin, GPIO_MODE_OUT);
  301. GPIO_SetPinSpeed(LC3_GPIO_Port, LC3_Pin, GPIO_OSPEED_HI);
  302. GPIO_SetPinPull(LC3_GPIO_Port, LC3_Pin, GPIO_PUPDR_DW);
  303. /* Pwer Shutdown: PP out, high speed, pull down */
  304. GPIO_SetPinMode(SHDN_GPIO_Port, SHDN_Pin, GPIO_MODE_OUT);
  305. GPIO_SetPinSpeed(SHDN_GPIO_Port, SHDN_Pin, GPIO_OSPEED_HI);
  306. GPIO_SetPinPull(SHDN_GPIO_Port, SHDN_Pin, GPIO_PUPDR_DW);
  307. /* SPI Latch: OD out, high speed, no pull */
  308. GPIO_SetPinMode(Latch_GPIO_Port, Latch_Pin, GPIO_MODE_OUT);
  309. GPIO_SetPinOutputType(Latch_GPIO_Port, Latch_Pin, GPIO_OTYPE_OD);
  310. GPIO_SetPinSpeed(Latch_GPIO_Port, Latch_Pin, GPIO_OSPEED_HI);
  311. /* UART_Enable: PP out, low speed, no pull*/
  312. GPIO_SetPinMode(UART_EN_GPIO_Port, UART_EN_Pin, GPIO_MODE_OUT);
  313. /* UART_State: input, pull up */
  314. GPIO_SetPinPull(UART_ST_GPIO_Port, UART_ST_Pin, GPIO_PUPDR_UP);
  315. GPIO_SetPinMode(UART_ST_GPIO_Port, UART_ST_Pin, GPIO_MODE_IN);
  316. /* BTN1, BTN2, BTN3, BTN4: input, pull up */
  317. GPIO_SetPinPull(BTN1_GPIO_Port, BTN1_Pin, GPIO_PUPDR_UP);
  318. GPIO_SetPinMode(BTN1_GPIO_Port, BTN1_Pin, GPIO_MODE_IN);
  319. GPIO_SetPinPull(BTN2_GPIO_Port, BTN2_Pin, GPIO_PUPDR_UP);
  320. GPIO_SetPinMode(BTN2_GPIO_Port, BTN2_Pin, GPIO_MODE_IN);
  321. GPIO_SetPinPull(BTN3_GPIO_Port, BTN3_Pin, GPIO_PUPDR_UP);
  322. GPIO_SetPinMode(BTN4_GPIO_Port, BTN3_Pin, GPIO_MODE_IN);
  323. GPIO_SetPinPull(BTN4_GPIO_Port, BTN4_Pin, GPIO_PUPDR_UP);
  324. GPIO_SetPinMode(BTN4_GPIO_Port, BTN4_Pin, GPIO_MODE_IN);
  325. }
  326. /**
  327. * Enable DMA controller clock
  328. */
  329. static void DMA_Init(void)
  330. {
  331. /* DMA controller clock enable */
  332. RCC->AHBENR |= RCC_AHBENR_DMA1EN;
  333. /* enable DMA1 clock in Sleep/Stop mode */
  334. //RCC->AHBSMENR |= RCC_AHBSMENR_DMA1SMEN;
  335. /* DMA interrupt init */
  336. /* DMA1_Channel1_IRQn interrupt configuration */
  337. NVIC_SetPriority(DMA1_Channel1_IRQn, 0);
  338. NVIC_EnableIRQ(DMA1_Channel1_IRQn);
  339. /* DMA1_Channel2_3_IRQn interrupt configuration */
  340. NVIC_SetPriority(DMA1_Channel2_3_IRQn, 0);
  341. NVIC_EnableIRQ(DMA1_Channel2_3_IRQn);
  342. }
  343. /**
  344. * @brief I2C1 Initialization Function
  345. * @param None
  346. * @retval None
  347. */
  348. static void I2C1_Init(void)
  349. {
  350. /** I2C1 GPIO Configuration
  351. PB8 ------> I2C1_SCL
  352. PB9 ------> I2C1_SDA
  353. */
  354. GPIO_SetPinMode(GPIOB, GPIO_PIN_8, GPIO_MODE_AFF);
  355. GPIO_SetPinOutputType(GPIOB, GPIO_PIN_8, GPIO_OTYPE_OD);
  356. GPIO_SetPinSpeed(GPIOB, GPIO_PIN_8, GPIO_OSPEED_HI);
  357. GPIO_SetPinPull(GPIOB, GPIO_PIN_8, GPIO_PUPDR_UP);
  358. GPIO_SetAFPin_8_15(GPIOB, GPIO_PIN_8, GPIO_AF_6);
  359. GPIO_SetPinMode(GPIOB, GPIO_PIN_9, GPIO_MODE_AFF);
  360. GPIO_SetPinOutputType(GPIOB, GPIO_PIN_9, GPIO_OTYPE_OD);
  361. GPIO_SetPinSpeed(GPIOB, GPIO_PIN_9, GPIO_OSPEED_HI);
  362. GPIO_SetPinPull(GPIOB, GPIO_PIN_9, GPIO_PUPDR_UP);
  363. GPIO_SetAFPin_8_15(GPIOB, GPIO_PIN_9, GPIO_AF_6);
  364. /** I2C1 DMA Init */
  365. /* I2C1_RX Init: Priority medium, Memory increment, read from perephireal,
  366. transfer error interrupt enable, transfer complete interrupt enable */
  367. DMA1_Channel2->CCR = (DMA_CCR_PL_0 | DMA_CCR_MINC | DMA_CCR_TEIE | DMA_CCR_TCIE);
  368. /* Route DMA channel 2 to I2C1 RX */
  369. DMAMUX1_Channel1->CCR = 10;
  370. /* I2C1_TX Init: Priority medium, Memory increment, read from memory,
  371. transfer error interrupt enable, transfer complete interrupt enable */
  372. DMA1_Channel3->CCR = (DMA_CCR_PL_0 | DMA_CCR_MINC| DMA_CCR_DIR | DMA_CCR_TEIE | DMA_CCR_TCIE);
  373. /* Route DMA channel 3 to I2C1 TX */
  374. DMAMUX1_Channel2->CCR = 11;
  375. /** I2C Initialization: I2C_Fast */
  376. I2C1->TIMINGR = 0x0010061A;
  377. I2C1->CR2 = I2C_CR2_AUTOEND;
  378. I2C1->CR1 = I2C_CR1_PE;
  379. }
  380. /**
  381. * @brief SPI1 Initialization Function
  382. * @param None
  383. * @retval None
  384. */
  385. static void SPI1_Init(void)
  386. {
  387. /**SPI1 GPIO Configuration
  388. PB3 ------> SPI1_SCK
  389. PB5 ------> SPI1_MOSI
  390. */
  391. GPIO_SetPinMode(GPIOB, GPIO_PIN_3, GPIO_MODE_AFF);
  392. GPIO_SetPinOutputType(GPIOB, GPIO_PIN_3, GPIO_OTYPE_OD);
  393. GPIO_SetPinSpeed(GPIOB, GPIO_PIN_3, GPIO_OSPEED_HI);
  394. GPIO_SetPinMode(GPIOB, GPIO_PIN_5, GPIO_MODE_AFF);
  395. GPIO_SetPinOutputType(GPIOB, GPIO_PIN_5, GPIO_OTYPE_OD);
  396. GPIO_SetPinSpeed(GPIOB, GPIO_PIN_5, GPIO_OSPEED_HI);
  397. /* SPI1 DMA Init */
  398. /* SPI1_TX Init: Priority high, Memory increment, read from memory, circular mode,
  399. Enable DMA transfer complete/error interrupts */
  400. DMA1_Channel1->CCR = (DMA_CCR_PL_1 | DMA_CCR_MINC | DMA_CCR_CIRC | DMA_CCR_TEIE | DMA_CCR_DIR | DMA_CCR_TCIE);
  401. /* Route DMA channel 1 to SPI1 TX */
  402. DMAMUX1_Channel0->CCR = 0x11;
  403. /* SPI1 interrupt Init */
  404. NVIC_SetPriority(SPI1_IRQn, 0);
  405. NVIC_EnableIRQ(SPI1_IRQn);
  406. /* SPI1 parameter configuration: master mode, data 8 bit, divider = 16, TX DMA */
  407. SPI1->CR1 = (SPI_CR1_MSTR | SPI_CR1_BR_1 | SPI_CR1_BR_0 | SPI_CR1_SSM | SPI_CR1_SSI);
  408. SPI1->CR2 = (SPI_CR2_DS_2 | SPI_CR2_DS_1 | SPI_CR2_DS_0 | SPI_CR2_TXDMAEN | SPI_CR2_FRXTH);
  409. }
  410. /**
  411. * @brief TIM1 Initialization Function
  412. * @param None
  413. * @retval None
  414. */
  415. static void TIM1_Init(void)
  416. {
  417. /* target clock */
  418. TIM1->PSC = TIM1_PSC; // prescaler
  419. TIM1->ARR = TIM1_ARR; // auto reload value
  420. TIM1->CR1 = TIM_CR1_ARPE;
  421. // initial pwm value
  422. TIM1->CCR1 = PWM_TUBE_INIT_VAL;
  423. TIM1->CCR2 = PWM_LED_INIT_VAL;
  424. TIM1->CCR3 = PWM_LED_INIT_VAL;
  425. TIM1->CCR4 = PWM_LED_INIT_VAL;
  426. // pwm mode 1 for 4 chanels
  427. TIM1->CCMR1 = (TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC2M_1 | TIM_CCMR1_OC2M_2 | TIM_CCMR1_OC1PE | TIM_CCMR1_OC2PE);
  428. TIM1->CCMR2 = (TIM_CCMR2_OC3M_1 | TIM_CCMR2_OC3M_2 | TIM_CCMR2_OC4M_1 | TIM_CCMR2_OC4M_2 | TIM_CCMR2_OC3PE | TIM_CCMR2_OC4PE);
  429. // reset int flag - not needed, int unused
  430. //TIM1->SR |= TIM_SR_UIF;
  431. TIM1->BDTR = TIM_BDTR_MOE; // enable main output
  432. TIM1->EGR = TIM_EGR_UG; // force timer update
  433. /* TIM1 CC_EnableChannel */
  434. TIM1->CCER = (TIM_CCER_CC1E | TIM_CCER_CC2E | TIM_CCER_CC3E | TIM_CCER_CC4E);
  435. /* TIM_EnableCounter */
  436. TIM1->CR1 |= TIM_CR1_CEN;
  437. /** TIM1 GPIO Configuration
  438. PA8 ------> TIM1_CH1
  439. PA9 ------> TIM1_CH2
  440. PA10 ------> TIM1_CH3
  441. PA11 [PA9] ------> TIM1_CH4
  442. */
  443. GPIO_SetPinMode(PWM_1_GPIO_Port, PWM_1_Pin, GPIO_MODE_AFF);
  444. GPIO_SetPinSpeed(PWM_1_GPIO_Port, PWM_1_Pin, GPIO_OSPEED_HI);
  445. GPIO_SetPinPull(PWM_1_GPIO_Port, PWM_1_Pin, GPIO_PUPDR_DW);
  446. GPIO_SetAFPin_8_15(PWM_1_GPIO_Port, PWM_1_Pin, GPIO_AF_2);
  447. GPIO_SetPinMode(PWM_R_GPIO_Port, PWM_R_Pin, GPIO_MODE_AFF);
  448. GPIO_SetPinSpeed(PWM_R_GPIO_Port, PWM_R_Pin, GPIO_OSPEED_HI);
  449. GPIO_SetPinPull(PWM_R_GPIO_Port, PWM_R_Pin, GPIO_PUPDR_DW);
  450. GPIO_SetAFPin_8_15(PWM_R_GPIO_Port, PWM_R_Pin, GPIO_AF_2);
  451. GPIO_SetPinMode(PWM_B_GPIO_Port, PWM_B_Pin, GPIO_MODE_AFF);
  452. GPIO_SetPinSpeed(PWM_B_GPIO_Port, PWM_B_Pin, GPIO_OSPEED_HI);
  453. GPIO_SetPinPull(PWM_B_GPIO_Port, PWM_B_Pin, GPIO_PUPDR_DW);
  454. GPIO_SetAFPin_8_15(PWM_B_GPIO_Port, PWM_B_Pin, GPIO_AF_2);
  455. GPIO_SetPinMode(PWM_G_GPIO_Port, PWM_G_Pin, GPIO_MODE_AFF);
  456. GPIO_SetPinSpeed(PWM_G_GPIO_Port, PWM_G_Pin, GPIO_OSPEED_HI);
  457. GPIO_SetPinPull(PWM_G_GPIO_Port, PWM_G_Pin, GPIO_PUPDR_DW);
  458. GPIO_SetAFPin_8_15(PWM_G_GPIO_Port, PWM_G_Pin, GPIO_AF_2);
  459. }
  460. /**
  461. * @brief TIM3 Initialization Function
  462. * @param None
  463. * @retval None
  464. */
  465. static void TIM3_Init(void)
  466. {
  467. /* target clock */
  468. TIM3->PSC = TIM3_PSC; // prescaler
  469. TIM3->ARR = TIM3_ARR; // auto reload value
  470. TIM3->CR1 = TIM_CR1_ARPE;
  471. // initial pwm value
  472. TIM3->CCR1 = PWM_TUBE_INIT_VAL;
  473. TIM3->CCR2 = PWM_TUBE_INIT_VAL;
  474. TIM3->CCR3 = PWM_TUBE_INIT_VAL;
  475. TIM3->CCR4 = PWM_TUBE_INIT_VAL;
  476. // pwm mode 1 for 4 chanels
  477. TIM3->CCMR1 = (TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC2M_1 | TIM_CCMR1_OC2M_2 | TIM_CCMR1_OC1PE | TIM_CCMR1_OC2PE);
  478. TIM3->CCMR2 = (TIM_CCMR2_OC3M_1 | TIM_CCMR2_OC3M_2 | TIM_CCMR2_OC4M_1 | TIM_CCMR2_OC4M_2 | TIM_CCMR2_OC3PE | TIM_CCMR2_OC4PE);
  479. // launch timer
  480. TIM3->EGR = TIM_EGR_UG; // force timer update
  481. /* TIM3 TIM_CC_EnableChannel */
  482. TIM3->CCER = (TIM_CCER_CC1E | TIM_CCER_CC2E | TIM_CCER_CC3E | TIM_CCER_CC4E);
  483. /* TIM3 enable */
  484. TIM3->CR1 |= TIM_CR1_CEN;
  485. /**TIM3 GPIO Configuration
  486. PA6 ------> TIM3_CH1
  487. PA7 ------> TIM3_CH2
  488. PB0 ------> TIM3_CH3
  489. PB1 ------> TIM3_CH4
  490. */
  491. GPIO_SetPinMode(PWM_5_GPIO_Port, PWM_5_Pin, GPIO_MODE_AFF);
  492. GPIO_SetPinSpeed(PWM_5_GPIO_Port, PWM_5_Pin, GPIO_OSPEED_HI);
  493. GPIO_SetPinPull(PWM_5_GPIO_Port, PWM_5_Pin, GPIO_PUPDR_DW);
  494. GPIO_SetAFPin_0_7(PWM_5_GPIO_Port, PWM_5_Pin, GPIO_AF_1);
  495. GPIO_SetPinMode(PWM_4_GPIO_Port, PWM_4_Pin, GPIO_MODE_AFF);
  496. GPIO_SetPinSpeed(PWM_4_GPIO_Port, PWM_4_Pin, GPIO_OSPEED_HI);
  497. GPIO_SetPinPull(PWM_4_GPIO_Port, PWM_4_Pin, GPIO_PUPDR_DW);
  498. GPIO_SetAFPin_0_7(PWM_4_GPIO_Port, PWM_4_Pin, GPIO_AF_1);
  499. GPIO_SetPinMode(PWM_3_GPIO_Port, PWM_3_Pin, GPIO_MODE_AFF);
  500. GPIO_SetPinSpeed(PWM_3_GPIO_Port, PWM_3_Pin, GPIO_OSPEED_HI);
  501. GPIO_SetPinPull(PWM_3_GPIO_Port, PWM_3_Pin, GPIO_PUPDR_DW);
  502. GPIO_SetAFPin_0_7(PWM_3_GPIO_Port, PWM_3_Pin, GPIO_AF_1);
  503. GPIO_SetPinMode(PWM_2_GPIO_Port, PWM_2_Pin, GPIO_MODE_AFF);
  504. GPIO_SetPinSpeed(PWM_2_GPIO_Port, PWM_2_Pin, GPIO_OSPEED_HI);
  505. GPIO_SetPinPull(PWM_2_GPIO_Port, PWM_2_Pin, GPIO_PUPDR_DW);
  506. GPIO_SetAFPin_0_7(PWM_2_GPIO_Port, PWM_2_Pin, GPIO_AF_1);
  507. }
  508. /**
  509. * @brief TIM14 Initialization Function
  510. * @param None
  511. * @retval None
  512. * @desc "Блинкование" разрядами - 0,75/0,25 сек вкл/выкл.
  513. */
  514. static void TIM14_Init(void)
  515. {
  516. /* Peripheral clock enable */
  517. RCC->APBENR2 |= RCC_APBENR2_TIM14EN;
  518. /* TIM14 interrupt Init */
  519. NVIC_SetPriority(TIM14_IRQn, 0);
  520. NVIC_EnableIRQ(TIM14_IRQn);
  521. /* Set TIM14 for 1 sec period */
  522. TIM14->PSC = TIM14_PSC;
  523. TIM14->ARR = TIM14_ARR;
  524. /* Enable: Auto-reload preload, One-pulse mode, */
  525. TIM14->CR1 = (TIM_CR1_ARPE | TIM_CR1_OPM);
  526. /* OC or PWM? (for pwm - (TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_1) ) , Output compare 1 preload */
  527. TIM14->CCMR1 = (TIM_CCMR1_OC1M_0 | TIM_CCMR1_OC1PE);
  528. /* Enable Channel_1 or no needed ??? */
  529. TIM14->CCER = TIM_CCER_CC1E;
  530. /* Impulse value in msek */
  531. TIM14->CCR1 = TIM14_PULSE_VAL;
  532. /* Enable IRQ for Update end CaptureCompare envents or only CC ??? */
  533. //TIM14->DIER = (TIM_DIER_UIE | TIM_DIER_CC1IE);
  534. TIM14->DIER = TIM_DIER_CC1IE;
  535. }
  536. /**
  537. * На старте активируем все каналы, при совпадении отключаем (не)нужные.
  538. */
  539. void Blink_Start(void)
  540. {
  541. /* enable all channels */
  542. TUBE_ALL_ON;
  543. /* clear IRQ flag */
  544. TIM14->SR |= TIM_SR_CC1IF;
  545. /* clear counter value */
  546. TIM14->CNT = 0;
  547. /* enable timer */
  548. TIM14->CR1 |= TIM_CR1_CEN;
  549. }
  550. void Blink_Stop(void)
  551. {
  552. /* disable timer */
  553. TIM14->CR1 &= ~(TIM_CR1_CEN);
  554. /* On all tubes */
  555. TUBE_ALL_ON;
  556. }
  557. /**
  558. * @brief TIM16 Initialization Function
  559. * @param None
  560. * @retval None
  561. */
  562. static void TIM16_Init(void)
  563. {
  564. /* Peripheral clock enable */
  565. RCC->APBENR2 |= RCC_APBENR2_TIM16EN;
  566. /* TIM16 interrupt Init */
  567. NVIC_SetPriority(TIM16_IRQn, 0);
  568. NVIC_EnableIRQ(TIM16_IRQn);
  569. /* setup clock */
  570. TIM16->PSC = TIM16_PSC; // prescaler
  571. TIM16->ARR = TIM16_ARR; // auto reload value
  572. TIM16->CR1 = TIM_CR1_ARPE;
  573. // initial pwm value
  574. //TIM16->CCR1 = TIM16_PWM_VAL;
  575. // pwm mode 1 for 1 chanel
  576. TIM16->CCMR1 = (TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1PE);
  577. // reset int flag
  578. TIM16->SR |= TIM_SR_UIF;
  579. TIM16->BDTR = TIM_BDTR_MOE; // enable main output
  580. TIM16->EGR = TIM_EGR_UG; // force timer update
  581. /* TIM16 CC_EnableChannel */
  582. TIM16->CCER = TIM_CCER_CC1E;
  583. /* TIM_EnableCounter */
  584. TIM16->CR1 |= TIM_CR1_CEN;
  585. /* Enable IRQ */
  586. TIM16->DIER = TIM_DIER_UIE;
  587. }
  588. /**
  589. * @brief TIM17 Initialization Function
  590. * @param None
  591. * @retval None
  592. */
  593. static void TIM17_Init(void)
  594. {
  595. /* Peripheral clock enable */
  596. RCC->APBENR2 |= RCC_APBENR2_TIM17EN;
  597. /* TIM17 interrupt Init */
  598. NVIC_SetPriority(TIM17_IRQn, 0);
  599. NVIC_EnableIRQ(TIM17_IRQn);
  600. /* setup clock */
  601. TIM17->PSC = TIM17_PSC; // prescaler
  602. TIM17->ARR = TIM17_ARR; // auto reload value
  603. TIM17->CR1 = TIM_CR1_ARPE;
  604. // initial pwm value
  605. //TIM17->CCR1 = TIM17_PWM_VAL;
  606. // pwm mode 1 for 1 chanel
  607. TIM17->CCMR1 = (TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1PE);
  608. // reset int flag
  609. TIM17->SR |= TIM_SR_UIF;
  610. TIM17->BDTR = TIM_BDTR_MOE; // enable main output
  611. TIM17->EGR = TIM_EGR_UG; // force timer update
  612. /* TIM17 CC_EnableChannel */
  613. TIM17->CCER = TIM_CCER_CC1E;
  614. /* TIM_EnableCounter */
  615. TIM17->CR1 |= TIM_CR1_CEN;
  616. /* Enable IRQ */
  617. TIM17->DIER = TIM_DIER_UIE;
  618. }
  619. /**
  620. * @brief USART1 Initialization Function
  621. * @param None
  622. * @retval None
  623. */
  624. static void USART1_UART_Init(void)
  625. {
  626. /* Peripheral clock enable */
  627. RCC->APBENR2 |= RCC_APBENR2_USART1EN;
  628. /**USART1 GPIO Configuration
  629. PB6 ------> USART1_TX
  630. PB7 ------> USART1_RX
  631. */
  632. GPIO_SetPinMode(GPIOB, GPIO_PIN_6, GPIO_MODE_AFF);
  633. GPIO_SetPinSpeed(GPIOB, GPIO_PIN_6, GPIO_OSPEED_HI);
  634. GPIO_SetPinMode(GPIOB, GPIO_PIN_7, GPIO_MODE_AFF);
  635. GPIO_SetPinSpeed(GPIOB, GPIO_PIN_7, GPIO_OSPEED_HI);
  636. /* USART1 interrupt Init */
  637. NVIC_SetPriority(USART1_IRQn, 0);
  638. NVIC_EnableIRQ(USART1_IRQn);
  639. USART1->CR1 |= (USART_CR1_TE |USART_CR1_RE);
  640. USART1->BRR = 138;
  641. /* USART1 Enable */
  642. USART1->CR1 |= USART_CR1_UE;
  643. /* Polling USART1 initialisation */
  644. while((!(USART1->ISR & USART_ISR_TEACK)) || (!(USART1->ISR & USART_ISR_REACK)))
  645. {
  646. }
  647. }