board.c 23 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831
  1. #include "board.h"
  2. /* private defines */
  3. #define SPI_BUFFER_SIZE 5
  4. /* private variables */
  5. /**
  6. * Nixi Tube cathodes map in Byte Array:
  7. * {E0 E9 E8 E7 E6 E5 E4 E3}
  8. * {E2 E1 D0 D9 D8 D7 D6 D5}
  9. * {D4 D3 D2 D1 B0 B9 B8 B7}
  10. * {B6 B5 B4 B3 B2 B1 A0 A9}
  11. * {A8 A7 A6 A5 A4 A3 A2 A1}
  12. *
  13. * Shift register bit map in Tube cathodes (from 0 to 1):
  14. * {5.7 5.6 5.5 5.4 5.3 5.2 5.1 5.0 4.7 4.6} VL5/E
  15. * {4.5 4.4 4.3 4.2 4.1 4.0 3.7 3.6 3.5 3.4} VL4/D
  16. * {3.3 3.2 3.1 3.0 2.7 2.6 2.5 2.4 2.3 2.2} VL2/B
  17. * {2.1 2.0 1.7 1.6 1.5 1.4 1.3 1.2 1.1 1.0} VL1/A
  18. */
  19. static const uint16_t nixieCathodeMap[4][11] = {
  20. {0x8000, 0x0040, 0x0080, 0x0100, 0x0200, 0x0400, 0x0800, 0x1000, 0x2000, 0x4000, 0x0000},
  21. {0x2000, 0x0010, 0x0020, 0x0040, 0x0080, 0x0100, 0x0200, 0x0400, 0x0800, 0x1000, 0x0000},
  22. {0x0800, 0x0004, 0x0008, 0x0010, 0x0020, 0x0040, 0x0080, 0x0100, 0x0200, 0x0400, 0x0000},
  23. {0x0200, 0x0001, 0x0002, 0x0004, 0x0008, 0x0010, 0x0020, 0x0040, 0x0080, 0x0100, 0x0000}
  24. };
  25. //static const uint8_t nixieCathodeMask[4][2] = {{0x00, 0x3f}, {0xc0, 0x0f}, {0xf0, 0x03}, {0xc0, 0x00}};
  26. static uint8_t tubesBuffer[SPI_BUFFER_SIZE] = {0};
  27. /* private typedef */
  28. /* private functions */
  29. static void _show_digits(const uint32_t digits);
  30. static void GPIO_Init(void);
  31. static void DMA_Init(void);
  32. static void I2C1_Init(void);
  33. static void SPI1_Init(void);
  34. static void TIM1_Init(void);
  35. static void TIM3_Init(void);
  36. static void TIM14_Init(void);
  37. static void TIM16_Init(void);
  38. static void TIM17_Init(void);
  39. static void USART1_UART_Init(void);
  40. /* Board perephireal Configuration */
  41. void Board_Init(void)
  42. {
  43. /* Main peripheral clock enable */
  44. RCC->APBENR1 = (RCC_APBENR1_PWREN | RCC_APBENR1_I2C1EN | RCC_APBENR1_TIM3EN);
  45. RCC->APBENR2 = (RCC_APBENR2_SYSCFGEN | RCC_APBENR2_SPI1EN | RCC_APBENR2_TIM1EN);
  46. /* GPIO Ports Clock Enable */
  47. RCC->IOPENR = (RCC_IOPENR_GPIOAEN | RCC_IOPENR_GPIOBEN | RCC_IOPENR_GPIOCEN);
  48. /* Peripheral interrupt init*/
  49. /* RCC_IRQn interrupt configuration */
  50. NVIC_SetPriority(RCC_IRQn, 0);
  51. NVIC_EnableIRQ(RCC_IRQn);
  52. /* Configure the system clock */
  53. SystemClock_Config();
  54. /* Processor uses sleep as its low power mode */
  55. SCB->SCR &= ~((uint32_t)SCB_SCR_SLEEPDEEP_Msk);
  56. /* DisableSleepOnExit */
  57. SCB->SCR &= ~((uint32_t)SCB_SCR_SLEEPONEXIT_Msk);
  58. /* Initialize all configured peripherals */
  59. GPIO_Init();
  60. DMA_Init();
  61. I2C1_Init();
  62. SPI1_Init();
  63. /** Star SPI transfer to shift registers */
  64. /* Set DMA source and destination addresses. */
  65. /* Source: Address of the SPI buffer. */
  66. DMA1_Channel1->CMAR = (uint32_t)&tubesBuffer;
  67. /* Destination: SPI1 data register. */
  68. DMA1_Channel1->CPAR = (uint32_t)&(SPI1->DR);
  69. /* Set DMA data transfer length (SPI buffer length). */
  70. DMA1_Channel1->CNDTR = SPI_BUFFER_SIZE;
  71. /* Enable SPI transfer */
  72. SPI1->CR1 |= SPI_CR1_SPE;
  73. Flag.SPI_TX_End = 1;
  74. /* Enable tube power */
  75. TUBE_PWR_ON;
  76. /* display work now */
  77. /* Start RGB & Tube Power PWM */
  78. TIM1_Init();
  79. TIM3_Init();
  80. /* Blink timer */
  81. TIM14_Init();
  82. //TIM16_Init();
  83. //TIM17_Init();
  84. //USART1_UART_Init();
  85. }
  86. /**
  87. * @brief Out digits to SPI buffer. ON/off tube power.
  88. * @param : array with four BCD digits
  89. * @retval : None
  90. */
  91. void showDigits(tube4_t dig)
  92. {
  93. static uint32_t old_dig = 0;
  94. uint8_t st = 0, ov = FADE_START;
  95. // if (old_dig == dig.u32) {
  96. // _show_digits(dig.u32);
  97. // } else {
  98. if (old_dig != dig.u32) {
  99. while (ov < FADE_STOP) {
  100. if (st == 0) {
  101. // new tube value
  102. st = 1;
  103. _show_digits(dig.u32);
  104. ov += FADE_STEP;
  105. tdelay_ms(ov);
  106. } else {
  107. // old tube value
  108. st = 0;
  109. _show_digits(old_dig);
  110. tdelay_ms(FADE_STOP - ov);
  111. }
  112. } // End of while
  113. old_dig = dig.u32;
  114. } // End of if-else
  115. }
  116. void lShiftDigits(const tube4_t old, const tube4_t dig) {
  117. tube4_t buf;
  118. uint8_t sbuf[12];
  119. sbuf[0] = dig.ar[0];
  120. sbuf[1] = dig.ar[1];
  121. sbuf[2] = dig.ar[2];
  122. sbuf[3] = dig.ar[3];
  123. sbuf[4] = TUBE_BLANK;
  124. sbuf[5] = TUBE_BLANK;
  125. sbuf[6] = TUBE_BLANK;
  126. sbuf[7] = TUBE_BLANK;
  127. sbuf[8] = old.ar[0];
  128. sbuf[9] = old.ar[1];
  129. sbuf[10] = old.ar[2];
  130. sbuf[11] = old.ar[3];
  131. int i;
  132. for (i=11; i>2; i--) {
  133. buf.ar[3] = sbuf[i];
  134. buf.ar[2] = sbuf[i-1];
  135. buf.ar[1] = sbuf[i-2];
  136. buf.ar[0] = sbuf[i-3];
  137. _show_digits(buf.u32);
  138. tdelay_ms(100);
  139. }
  140. }
  141. void slideDigits(tube4_t dig) {
  142. tube4_t buf;
  143. const uint8_t pause = 100;;
  144. buf.s8.tA = TUBE_BLANK;
  145. buf.s8.tB = TUBE_BLANK;
  146. buf.s8.tD = TUBE_BLANK;
  147. buf.s8.tE = TUBE_BLANK;
  148. _show_digits(buf.u32);
  149. tdelay_ms(pause);
  150. buf.s8.tE = dig.s8.tA;
  151. _show_digits(buf.u32);
  152. tdelay_ms(pause);
  153. buf.s8.tD = dig.s8.tA;
  154. buf.s8.tE = dig.s8.tB;
  155. _show_digits(buf.u32);
  156. tdelay_ms(pause);
  157. buf.s8.tB = dig.s8.tA;
  158. buf.s8.tD = dig.s8.tB;
  159. buf.s8.tE = dig.s8.tD;
  160. _show_digits(buf.u32);
  161. tdelay_ms(pause);
  162. buf.s8.tA = dig.s8.tA;
  163. buf.s8.tB = dig.s8.tB;
  164. buf.s8.tD = dig.s8.tD;
  165. buf.s8.tE = dig.s8.tE;
  166. _show_digits(buf.u32);
  167. tdelay_ms(pause);
  168. buf.s8.tA = dig.s8.tB;
  169. buf.s8.tB = dig.s8.tD;
  170. buf.s8.tD = dig.s8.tE;
  171. buf.s8.tE = TUBE_BLANK;
  172. _show_digits(buf.u32);
  173. tdelay_ms(pause);
  174. buf.s8.tA = dig.s8.tD;
  175. buf.s8.tB = dig.s8.tE;
  176. buf.s8.tD = TUBE_BLANK;
  177. _show_digits(buf.u32);
  178. tdelay_ms(pause);
  179. buf.s8.tA = dig.s8.tE;
  180. buf.s8.tB = TUBE_BLANK;
  181. _show_digits(buf.u32);
  182. tdelay_ms(pause);
  183. buf.s8.tA = TUBE_BLANK;
  184. _show_digits(buf.u32);
  185. tdelay_ms(pause);
  186. }
  187. static void _show_digits(const uint32_t digits)
  188. {
  189. tube4_t dig;
  190. dig.u32 = digits;
  191. /* Clear buffer */
  192. tubesBuffer[0] = 0;
  193. tubesBuffer[1] = 0;
  194. tubesBuffer[2] = 0;
  195. tubesBuffer[3] = 0;
  196. tubesBuffer[4] = 0;
  197. /* check values range */
  198. int i;
  199. for (i=0; i<4; i++) {
  200. if (dig.ar[i] > 9) {
  201. if (dig.ar[i] != TUBE_BLANK) {
  202. dig.ar[i] = 0;
  203. }
  204. }
  205. }
  206. /* Wait for SPI */
  207. while (Flag.SPI_TX_End == 0);
  208. Flag.SPI_TX_End = 0;
  209. /* Feel buffer */
  210. tubesBuffer[0] = (uint8_t)(nixieCathodeMap[Tube_E][dig.s8.tE] >> 8);
  211. tubesBuffer[1] = (uint8_t)((nixieCathodeMap[Tube_E][dig.s8.tE]) | (nixieCathodeMap[Tube_D][dig.s8.tD] >> 8));
  212. tubesBuffer[2] = (uint8_t)((nixieCathodeMap[Tube_D][dig.s8.tD]) | (nixieCathodeMap[Tube_B][dig.s8.tB] >> 8));
  213. tubesBuffer[3] = (uint8_t)((nixieCathodeMap[Tube_B][dig.s8.tB]) | (nixieCathodeMap[Tube_A][dig.s8.tA] >> 8));
  214. tubesBuffer[4] = (uint8_t)(nixieCathodeMap[Tube_A][dig.s8.tA]);
  215. /* Start DMA transfer to SPI */
  216. DMA1_Channel1->CCR |= DMA_CCR_EN;
  217. /* On/Off tube power */
  218. for (i=0; i<4; i++) {
  219. if (dig.ar[i] == TUBE_BLANK) {
  220. tube_PowerOff((tube_pos_t)i);
  221. } else {
  222. tube_PowerOn((tube_pos_t)i);
  223. }
  224. }
  225. }
  226. void tube_PowerOn(tube_pos_t tube)
  227. {
  228. switch (tube) {
  229. case Tube_A:
  230. TUBE_A_ON;
  231. break;
  232. case Tube_B:
  233. TUBE_B_ON;
  234. break;
  235. case Tube_D:
  236. TUBE_D_ON;
  237. break;
  238. case Tube_E:
  239. TUBE_E_ON;
  240. break;
  241. case Tube_All:
  242. TUBE_ALL_ON;
  243. break;
  244. default:
  245. break;
  246. }
  247. }
  248. void tube_PowerOff(tube_pos_t tube)
  249. {
  250. switch (tube) {
  251. case Tube_A:
  252. TUBE_A_OFF;
  253. break;
  254. case Tube_B:
  255. TUBE_B_OFF;
  256. break;
  257. case Tube_D:
  258. TUBE_D_OFF;
  259. break;
  260. case Tube_E:
  261. TUBE_E_OFF;
  262. break;
  263. case Tube_All:
  264. TUBE_ALL_OFF;
  265. break;
  266. default:
  267. break;
  268. }
  269. }
  270. void tube_BrightLevel(tube_pos_t tube, uint8_t bright)
  271. {
  272. switch (tube) {
  273. case Tube_A:
  274. TUBE_A_BRIGHT(bright);
  275. break;
  276. case Tube_B:
  277. TUBE_B_BRIGHT(bright);
  278. break;
  279. case Tube_C:
  280. TUBE_C_BRIGHT(bright);
  281. break;
  282. case Tube_D:
  283. TUBE_D_BRIGHT(bright);
  284. break;
  285. case Tube_E:
  286. TUBE_E_BRIGHT(bright);
  287. break;
  288. case Tube_All:
  289. TUBES_BRIGHT(bright);
  290. break;
  291. default:
  292. break;
  293. }
  294. }
  295. /**
  296. * @brief System Clock Configuration
  297. * @retval None
  298. */
  299. void SystemClock_Config(void)
  300. {
  301. /* HSI configuration and activation */
  302. RCC->CR |= RCC_CR_HSION; // Enable HSI
  303. while((RCC->CR & RCC_CR_HSIRDY) == 0);
  304. /* Main PLL configuration and activation */
  305. //RCC->PLLCFGR &= ~(RCC_PLLCFGR_PLLSRC | RCC_PLLCFGR_PLLM | RCC_PLLCFGR_PLLN | RCC_PLLCFGR_PLLR);
  306. RCC->PLLCFGR = (RCC_PLLCFGR_PLLSRC_HSI | RCC_PLLCFGR_PLLM_0 | (9 << RCC_PLLCFGR_PLLN_Pos) | RCC_PLLCFGR_PLLR_1);
  307. RCC->PLLCFGR |= RCC_PLLCFGR_PLLREN; // RCC_PLL_EnableDomain_SYS
  308. RCC->CR |= RCC_CR_PLLON; // RCC_PLL_Enable
  309. while((RCC->CR & RCC_CR_PLLRDY) == 0);
  310. /* Sysclk activation on the main PLL */
  311. RCC->CFGR &= RCC_CFGR_SW;
  312. RCC->CFGR |= RCC_CFGR_SW_1;
  313. while((RCC->CFGR & RCC_CFGR_SWS) != RCC_CFGR_SWS_1);
  314. /* Update CMSIS variable (which can be updated also through SystemCoreClockUpdate function) */
  315. SystemCoreClock = 24000000;
  316. /* Set I2C Clock Source */
  317. RCC->CCIPR &= ~(RCC_CCIPR_I2C1SEL);
  318. RCC->CCIPR |= RCC_CCIPR_I2C1SEL_1;
  319. }
  320. /**
  321. * @brief GPIO Initialization Function
  322. * @param None
  323. * @retval None
  324. */
  325. static void GPIO_Init(void)
  326. {
  327. /* EXTI Line: falling, no pull, input */
  328. // interrupt on line 14
  329. EXTI->IMR1 |= EXTI_IMR1_IM14;
  330. // wake-up with event ?
  331. //EXTI->EMR1 |= EXTI_EMR1_EM14;
  332. // TRIGGER FALLING
  333. EXTI->FTSR1 = EXTI_FTSR1_FT14;
  334. // external interrupt selection - PC14 to EXTI14
  335. EXTI->EXTICR[3] = EXTI_EXTICR4_EXTI14_1;
  336. /* EXTI interrupt init*/
  337. NVIC_SetPriority(EXTI4_15_IRQn, 0);
  338. NVIC_EnableIRQ(EXTI4_15_IRQn);
  339. /* set GPIO modes */
  340. GPIO_SetPinMode(IRQ_GPIO_Port, IRQ_Pin, GPIO_MODE_IN);
  341. GPIO_SetPinPull(IRQ_GPIO_Port, IRQ_Pin, GPIO_PUPDR_UP);
  342. /* L0, L1, L2, L3 - IN-15 symbols control, PP out, high speed, pull down */
  343. GPIO_SetPinMode(LC0_GPIO_Port, LC0_Pin, GPIO_MODE_OUT);
  344. GPIO_SetPinSpeed(LC0_GPIO_Port, LC0_Pin, GPIO_OSPEED_HI);
  345. GPIO_SetPinPull(LC0_GPIO_Port, LC0_Pin, GPIO_PUPDR_DW);
  346. GPIO_SetPinMode(LC1_GPIO_Port, LC1_Pin, GPIO_MODE_OUT);
  347. GPIO_SetPinSpeed(LC1_GPIO_Port, LC1_Pin, GPIO_OSPEED_HI);
  348. GPIO_SetPinPull(LC1_GPIO_Port, LC1_Pin, GPIO_PUPDR_DW);
  349. GPIO_SetPinMode(LC2_GPIO_Port, LC2_Pin, GPIO_MODE_OUT);
  350. GPIO_SetPinSpeed(LC2_GPIO_Port, LC2_Pin, GPIO_OSPEED_HI);
  351. GPIO_SetPinPull(LC2_GPIO_Port, LC2_Pin, GPIO_PUPDR_DW);
  352. GPIO_SetPinMode(LC3_GPIO_Port, LC3_Pin, GPIO_MODE_OUT);
  353. GPIO_SetPinSpeed(LC3_GPIO_Port, LC3_Pin, GPIO_OSPEED_HI);
  354. GPIO_SetPinPull(LC3_GPIO_Port, LC3_Pin, GPIO_PUPDR_DW);
  355. /* Pwer Shutdown: PP out, high speed, pull down */
  356. GPIO_SetPinMode(SHDN_GPIO_Port, SHDN_Pin, GPIO_MODE_OUT);
  357. GPIO_SetPinSpeed(SHDN_GPIO_Port, SHDN_Pin, GPIO_OSPEED_HI);
  358. GPIO_SetPinPull(SHDN_GPIO_Port, SHDN_Pin, GPIO_PUPDR_DW);
  359. /* SPI Latch: OD out, high speed, no pull */
  360. GPIO_SetPinMode(Latch_GPIO_Port, Latch_Pin, GPIO_MODE_OUT);
  361. GPIO_SetPinOutputType(Latch_GPIO_Port, Latch_Pin, GPIO_OTYPE_OD);
  362. GPIO_SetPinSpeed(Latch_GPIO_Port, Latch_Pin, GPIO_OSPEED_HI);
  363. /* UART_Enable: PP out, low speed, no pull*/
  364. GPIO_SetPinMode(UART_EN_GPIO_Port, UART_EN_Pin, GPIO_MODE_OUT);
  365. /* UART_State: input, pull up */
  366. GPIO_SetPinPull(UART_ST_GPIO_Port, UART_ST_Pin, GPIO_PUPDR_UP);
  367. GPIO_SetPinMode(UART_ST_GPIO_Port, UART_ST_Pin, GPIO_MODE_IN);
  368. /* BTN1, BTN2, BTN3, BTN4: input, pull up */
  369. GPIO_SetPinPull(BTN1_GPIO_Port, BTN1_Pin, GPIO_PUPDR_UP);
  370. GPIO_SetPinMode(BTN1_GPIO_Port, BTN1_Pin, GPIO_MODE_IN);
  371. GPIO_SetPinPull(BTN2_GPIO_Port, BTN2_Pin, GPIO_PUPDR_UP);
  372. GPIO_SetPinMode(BTN2_GPIO_Port, BTN2_Pin, GPIO_MODE_IN);
  373. GPIO_SetPinPull(BTN3_GPIO_Port, BTN3_Pin, GPIO_PUPDR_UP);
  374. GPIO_SetPinMode(BTN3_GPIO_Port, BTN3_Pin, GPIO_MODE_IN);
  375. GPIO_SetPinPull(BTN4_GPIO_Port, BTN4_Pin, GPIO_PUPDR_UP);
  376. GPIO_SetPinMode(BTN4_GPIO_Port, BTN4_Pin, GPIO_MODE_IN);
  377. }
  378. /**
  379. * Enable DMA controller clock
  380. */
  381. static void DMA_Init(void)
  382. {
  383. /* DMA controller clock enable */
  384. RCC->AHBENR |= RCC_AHBENR_DMA1EN;
  385. /* enable DMA1 clock in Sleep/Stop mode */
  386. //RCC->AHBSMENR |= RCC_AHBSMENR_DMA1SMEN;
  387. /* DMA interrupt init */
  388. /* DMA1_Channel1_IRQn interrupt configuration */
  389. NVIC_SetPriority(DMA1_Channel1_IRQn, 0);
  390. NVIC_EnableIRQ(DMA1_Channel1_IRQn);
  391. /* DMA1_Channel2_3_IRQn interrupt configuration */
  392. NVIC_SetPriority(DMA1_Channel2_3_IRQn, 0);
  393. NVIC_EnableIRQ(DMA1_Channel2_3_IRQn);
  394. }
  395. /**
  396. * @brief I2C1 Initialization Function
  397. * @param None
  398. * @retval None
  399. */
  400. static void I2C1_Init(void)
  401. {
  402. /** I2C1 GPIO Configuration
  403. PB8 ------> I2C1_SCL
  404. PB9 ------> I2C1_SDA
  405. */
  406. GPIO_SetPinMode(GPIOB, GPIO_PIN_8, GPIO_MODE_AFF);
  407. GPIO_SetPinOutputType(GPIOB, GPIO_PIN_8, GPIO_OTYPE_OD);
  408. GPIO_SetPinSpeed(GPIOB, GPIO_PIN_8, GPIO_OSPEED_HI);
  409. GPIO_SetPinPull(GPIOB, GPIO_PIN_8, GPIO_PUPDR_UP);
  410. GPIO_SetAFPin_8_15(GPIOB, GPIO_PIN_8, GPIO_AF_6);
  411. GPIO_SetPinMode(GPIOB, GPIO_PIN_9, GPIO_MODE_AFF);
  412. GPIO_SetPinOutputType(GPIOB, GPIO_PIN_9, GPIO_OTYPE_OD);
  413. GPIO_SetPinSpeed(GPIOB, GPIO_PIN_9, GPIO_OSPEED_HI);
  414. GPIO_SetPinPull(GPIOB, GPIO_PIN_9, GPIO_PUPDR_UP);
  415. GPIO_SetAFPin_8_15(GPIOB, GPIO_PIN_9, GPIO_AF_6);
  416. /** I2C1 DMA Init */
  417. /* I2C1_RX Init: Priority medium, Memory increment, read from perephireal,
  418. transfer error interrupt enable, transfer complete interrupt enable */
  419. DMA1_Channel2->CCR = (DMA_CCR_PL_0 | DMA_CCR_MINC | DMA_CCR_TEIE | DMA_CCR_TCIE);
  420. /* Route DMA channel 2 to I2C1 RX */
  421. DMAMUX1_Channel1->CCR = 10;
  422. /* I2C1_TX Init: Priority medium, Memory increment, read from memory,
  423. transfer error interrupt enable, transfer complete interrupt enable */
  424. DMA1_Channel3->CCR = (DMA_CCR_PL_0 | DMA_CCR_MINC| DMA_CCR_DIR | DMA_CCR_TEIE | DMA_CCR_TCIE);
  425. /* Route DMA channel 3 to I2C1 TX */
  426. DMAMUX1_Channel2->CCR = 11;
  427. /** I2C Initialization: I2C_Fast */
  428. I2C1->TIMINGR = 0x0010061A;
  429. I2C1->CR2 = I2C_CR2_AUTOEND;
  430. I2C1->CR1 = I2C_CR1_PE;
  431. }
  432. /**
  433. * @brief SPI1 Initialization Function
  434. * @param None
  435. * @retval None
  436. */
  437. static void SPI1_Init(void)
  438. {
  439. /**SPI1 GPIO Configuration
  440. PB3 ------> SPI1_SCK
  441. PB5 ------> SPI1_MOSI
  442. */
  443. GPIO_SetPinMode(GPIOB, GPIO_PIN_3, GPIO_MODE_AFF);
  444. GPIO_SetPinOutputType(GPIOB, GPIO_PIN_3, GPIO_OTYPE_OD);
  445. GPIO_SetPinSpeed(GPIOB, GPIO_PIN_3, GPIO_OSPEED_HI);
  446. GPIO_SetPinMode(GPIOB, GPIO_PIN_5, GPIO_MODE_AFF);
  447. GPIO_SetPinOutputType(GPIOB, GPIO_PIN_5, GPIO_OTYPE_OD);
  448. GPIO_SetPinSpeed(GPIOB, GPIO_PIN_5, GPIO_OSPEED_HI);
  449. /* SPI1 DMA Init */
  450. /* SPI1_TX Init: Priority high, Memory increment, read from memory, circular mode,
  451. Enable DMA transfer complete/error interrupts */
  452. DMA1_Channel1->CCR = (DMA_CCR_PL_1 | DMA_CCR_MINC | DMA_CCR_CIRC | DMA_CCR_TEIE | DMA_CCR_DIR | DMA_CCR_TCIE);
  453. /* Route DMA channel 1 to SPI1 TX */
  454. DMAMUX1_Channel0->CCR = 0x11;
  455. /* SPI1 interrupt Init */
  456. NVIC_SetPriority(SPI1_IRQn, 0);
  457. NVIC_EnableIRQ(SPI1_IRQn);
  458. /* SPI1 parameter configuration: master mode, data 8 bit, divider = 16, TX DMA */
  459. SPI1->CR1 = (SPI_CR1_MSTR | SPI_CR1_BR_1 | SPI_CR1_BR_0 | SPI_CR1_SSM | SPI_CR1_SSI);
  460. SPI1->CR2 = (SPI_CR2_DS_2 | SPI_CR2_DS_1 | SPI_CR2_DS_0 | SPI_CR2_TXDMAEN | SPI_CR2_FRXTH);
  461. }
  462. /**
  463. * @brief TIM1 Initialization Function
  464. * @param None
  465. * @retval None
  466. */
  467. static void TIM1_Init(void)
  468. {
  469. /* target clock */
  470. TIM1->PSC = TIM1_PSC; // prescaler
  471. TIM1->ARR = TIM1_ARR; // auto reload value
  472. TIM1->CR1 = TIM_CR1_ARPE;
  473. // initial pwm value
  474. TIM1->CCR1 = PWM_TUBE_INIT_VAL;
  475. TIM1->CCR2 = PWM_LED_INIT_VAL;
  476. TIM1->CCR3 = PWM_LED_INIT_VAL;
  477. TIM1->CCR4 = PWM_LED_INIT_VAL;
  478. // pwm mode 1 for 4 chanels
  479. TIM1->CCMR1 = (TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC2M_1 | TIM_CCMR1_OC2M_2 | TIM_CCMR1_OC1PE | TIM_CCMR1_OC2PE);
  480. TIM1->CCMR2 = (TIM_CCMR2_OC3M_1 | TIM_CCMR2_OC3M_2 | TIM_CCMR2_OC4M_1 | TIM_CCMR2_OC4M_2 | TIM_CCMR2_OC3PE | TIM_CCMR2_OC4PE);
  481. // reset int flag - not needed, int unused
  482. //TIM1->SR |= TIM_SR_UIF;
  483. TIM1->BDTR = TIM_BDTR_MOE; // enable main output
  484. TIM1->EGR = TIM_EGR_UG; // force timer update
  485. /* TIM1 CC_EnableChannel */
  486. TIM1->CCER = (TIM_CCER_CC1E | TIM_CCER_CC2E | TIM_CCER_CC3E | TIM_CCER_CC4E);
  487. /* TIM_EnableCounter */
  488. TIM1->CR1 |= TIM_CR1_CEN;
  489. /** TIM1 GPIO Configuration
  490. PA8 ------> TIM1_CH1
  491. PA9 ------> TIM1_CH2
  492. PA10 ------> TIM1_CH3
  493. PA11 [PA9] ------> TIM1_CH4
  494. */
  495. GPIO_SetPinMode(PWM_1_GPIO_Port, PWM_1_Pin, GPIO_MODE_AFF);
  496. GPIO_SetPinSpeed(PWM_1_GPIO_Port, PWM_1_Pin, GPIO_OSPEED_HI);
  497. GPIO_SetPinPull(PWM_1_GPIO_Port, PWM_1_Pin, GPIO_PUPDR_DW);
  498. GPIO_SetAFPin_8_15(PWM_1_GPIO_Port, PWM_1_Pin, GPIO_AF_2);
  499. GPIO_SetPinMode(PWM_R_GPIO_Port, PWM_R_Pin, GPIO_MODE_AFF);
  500. GPIO_SetPinSpeed(PWM_R_GPIO_Port, PWM_R_Pin, GPIO_OSPEED_HI);
  501. GPIO_SetPinPull(PWM_R_GPIO_Port, PWM_R_Pin, GPIO_PUPDR_DW);
  502. GPIO_SetAFPin_8_15(PWM_R_GPIO_Port, PWM_R_Pin, GPIO_AF_2);
  503. GPIO_SetPinMode(PWM_B_GPIO_Port, PWM_B_Pin, GPIO_MODE_AFF);
  504. GPIO_SetPinSpeed(PWM_B_GPIO_Port, PWM_B_Pin, GPIO_OSPEED_HI);
  505. GPIO_SetPinPull(PWM_B_GPIO_Port, PWM_B_Pin, GPIO_PUPDR_DW);
  506. GPIO_SetAFPin_8_15(PWM_B_GPIO_Port, PWM_B_Pin, GPIO_AF_2);
  507. GPIO_SetPinMode(PWM_G_GPIO_Port, PWM_G_Pin, GPIO_MODE_AFF);
  508. GPIO_SetPinSpeed(PWM_G_GPIO_Port, PWM_G_Pin, GPIO_OSPEED_HI);
  509. GPIO_SetPinPull(PWM_G_GPIO_Port, PWM_G_Pin, GPIO_PUPDR_DW);
  510. GPIO_SetAFPin_8_15(PWM_G_GPIO_Port, PWM_G_Pin, GPIO_AF_2);
  511. }
  512. /**
  513. * @brief TIM3 Initialization Function
  514. * @param None
  515. * @retval None
  516. */
  517. static void TIM3_Init(void)
  518. {
  519. /* target clock */
  520. TIM3->PSC = TIM3_PSC; // prescaler
  521. TIM3->ARR = TIM3_ARR; // auto reload value
  522. TIM3->CR1 = TIM_CR1_ARPE;
  523. // initial pwm value
  524. TIM3->CCR1 = PWM_TUBE_INIT_VAL;
  525. TIM3->CCR2 = PWM_TUBE_INIT_VAL;
  526. TIM3->CCR3 = PWM_TUBE_INIT_VAL;
  527. TIM3->CCR4 = PWM_TUBE_INIT_VAL;
  528. // pwm mode 1 for 4 chanels
  529. TIM3->CCMR1 = (TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC2M_1 | TIM_CCMR1_OC2M_2 | TIM_CCMR1_OC1PE | TIM_CCMR1_OC2PE);
  530. TIM3->CCMR2 = (TIM_CCMR2_OC3M_1 | TIM_CCMR2_OC3M_2 | TIM_CCMR2_OC4M_1 | TIM_CCMR2_OC4M_2 | TIM_CCMR2_OC3PE | TIM_CCMR2_OC4PE);
  531. // launch timer
  532. TIM3->EGR = TIM_EGR_UG; // force timer update
  533. /* TIM3 TIM_CC_EnableChannel */
  534. TIM3->CCER = (TIM_CCER_CC1E | TIM_CCER_CC2E | TIM_CCER_CC3E | TIM_CCER_CC4E);
  535. /* TIM3 enable */
  536. TIM3->CR1 |= TIM_CR1_CEN;
  537. /**TIM3 GPIO Configuration
  538. PA6 ------> TIM3_CH1
  539. PA7 ------> TIM3_CH2
  540. PB0 ------> TIM3_CH3
  541. PB1 ------> TIM3_CH4
  542. */
  543. GPIO_SetPinMode(PWM_5_GPIO_Port, PWM_5_Pin, GPIO_MODE_AFF);
  544. GPIO_SetPinSpeed(PWM_5_GPIO_Port, PWM_5_Pin, GPIO_OSPEED_HI);
  545. GPIO_SetPinPull(PWM_5_GPIO_Port, PWM_5_Pin, GPIO_PUPDR_DW);
  546. GPIO_SetAFPin_0_7(PWM_5_GPIO_Port, PWM_5_Pin, GPIO_AF_1);
  547. GPIO_SetPinMode(PWM_4_GPIO_Port, PWM_4_Pin, GPIO_MODE_AFF);
  548. GPIO_SetPinSpeed(PWM_4_GPIO_Port, PWM_4_Pin, GPIO_OSPEED_HI);
  549. GPIO_SetPinPull(PWM_4_GPIO_Port, PWM_4_Pin, GPIO_PUPDR_DW);
  550. GPIO_SetAFPin_0_7(PWM_4_GPIO_Port, PWM_4_Pin, GPIO_AF_1);
  551. GPIO_SetPinMode(PWM_3_GPIO_Port, PWM_3_Pin, GPIO_MODE_AFF);
  552. GPIO_SetPinSpeed(PWM_3_GPIO_Port, PWM_3_Pin, GPIO_OSPEED_HI);
  553. GPIO_SetPinPull(PWM_3_GPIO_Port, PWM_3_Pin, GPIO_PUPDR_DW);
  554. GPIO_SetAFPin_0_7(PWM_3_GPIO_Port, PWM_3_Pin, GPIO_AF_1);
  555. GPIO_SetPinMode(PWM_2_GPIO_Port, PWM_2_Pin, GPIO_MODE_AFF);
  556. GPIO_SetPinSpeed(PWM_2_GPIO_Port, PWM_2_Pin, GPIO_OSPEED_HI);
  557. GPIO_SetPinPull(PWM_2_GPIO_Port, PWM_2_Pin, GPIO_PUPDR_DW);
  558. GPIO_SetAFPin_0_7(PWM_2_GPIO_Port, PWM_2_Pin, GPIO_AF_1);
  559. }
  560. /**
  561. * @brief TIM14 Initialization Function
  562. * @param None
  563. * @retval None
  564. * @desc "Блинкование" разрядами - 0,75/0,25 сек вкл/выкл.
  565. */
  566. static void TIM14_Init(void)
  567. {
  568. /* Peripheral clock enable */
  569. RCC->APBENR2 |= RCC_APBENR2_TIM14EN;
  570. /* TIM14 interrupt Init */
  571. NVIC_SetPriority(TIM14_IRQn, 0);
  572. NVIC_EnableIRQ(TIM14_IRQn);
  573. /* Set TIM14 for 1 sec period */
  574. TIM14->PSC = TIM14_PSC;
  575. TIM14->ARR = TIM14_ARR;
  576. /* Enable: Auto-reload preload, no One-pulse mode, */
  577. TIM14->CR1 = (TIM_CR1_ARPE); // | TIM_CR1_OPM);
  578. /* OC or PWM? (for pwm - (TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_1) ) , Output compare 1 preload */
  579. TIM14->CCMR1 = (TIM_CCMR1_OC1M_0 | TIM_CCMR1_OC1PE);
  580. /* Enable Channel_1 or no needed ??? */
  581. TIM14->CCER = TIM_CCER_CC1E;
  582. /* Impulse value in msek */
  583. TIM14->CCR1 = TIM14_PULSE_VAL;
  584. /* Enable IRQ for Update end CaptureCompare envents or only CC ??? */
  585. TIM14->DIER = (TIM_DIER_UIE | TIM_DIER_CC1IE);
  586. //TIM14->DIER = TIM_DIER_CC1IE;
  587. }
  588. /**
  589. * На старте активируем все каналы, при совпадении отключаем (не)нужные.
  590. */
  591. void Blink_Start(void)
  592. {
  593. /* enable all channels */
  594. //TUBE_ALL_ON;
  595. /* clear IRQ flags */
  596. TIM14->SR |= TIM_SR_UIF;
  597. TIM14->SR |= TIM_SR_CC1IF;
  598. /* clear counter value */
  599. TIM14->CNT = 0;
  600. /* enable timer */
  601. TIM14->CR1 |= TIM_CR1_CEN;
  602. }
  603. void Blink_Stop(void)
  604. {
  605. /* disable timer */
  606. TIM14->CR1 &= ~(TIM_CR1_CEN);
  607. /* enable channels */
  608. if (Flag.Blink_1 != 0) {
  609. TUBE_A_ON;
  610. }
  611. if (Flag.Blink_2 != 0) {
  612. TUBE_B_ON;
  613. }
  614. if (Flag.Blink_3 != 0) {
  615. TUBE_C_ON;
  616. }
  617. if (Flag.Blink_4 != 0) {
  618. TUBE_D_ON;
  619. }
  620. if (Flag.Blink_5 != 0) {
  621. TUBE_E_ON;
  622. }
  623. /* clear flags */
  624. Flag.Blink_1 = 0;
  625. Flag.Blink_2 = 0;
  626. Flag.Blink_3 = 0;
  627. Flag.Blink_4 = 0;
  628. Flag.Blink_5 = 0;
  629. }
  630. /**
  631. * @brief TIM16 Initialization Function
  632. * @param None
  633. * @retval None
  634. */
  635. static void TIM16_Init(void)
  636. {
  637. /* Peripheral clock enable */
  638. RCC->APBENR2 |= RCC_APBENR2_TIM16EN;
  639. /* TIM16 interrupt Init */
  640. NVIC_SetPriority(TIM16_IRQn, 0);
  641. NVIC_EnableIRQ(TIM16_IRQn);
  642. /* setup clock */
  643. TIM16->PSC = TIM16_PSC; // prescaler
  644. TIM16->ARR = TIM16_ARR; // auto reload value
  645. TIM16->CR1 = TIM_CR1_ARPE;
  646. // initial pwm value
  647. //TIM16->CCR1 = TIM16_PWM_VAL;
  648. // pwm mode 1 for 1 chanel
  649. TIM16->CCMR1 = (TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1PE);
  650. // reset int flag
  651. TIM16->SR |= TIM_SR_UIF;
  652. TIM16->BDTR = TIM_BDTR_MOE; // enable main output
  653. TIM16->EGR = TIM_EGR_UG; // force timer update
  654. /* TIM16 CC_EnableChannel */
  655. TIM16->CCER = TIM_CCER_CC1E;
  656. /* TIM_EnableCounter */
  657. TIM16->CR1 |= TIM_CR1_CEN;
  658. /* Enable IRQ */
  659. TIM16->DIER = TIM_DIER_UIE;
  660. }
  661. /**
  662. * @brief TIM17 Initialization Function
  663. * @param None
  664. * @retval None
  665. */
  666. static void TIM17_Init(void)
  667. {
  668. /* Peripheral clock enable */
  669. RCC->APBENR2 |= RCC_APBENR2_TIM17EN;
  670. /* TIM17 interrupt Init */
  671. NVIC_SetPriority(TIM17_IRQn, 0);
  672. NVIC_EnableIRQ(TIM17_IRQn);
  673. /* setup clock */
  674. TIM17->PSC = TIM17_PSC; // prescaler
  675. TIM17->ARR = TIM17_ARR; // auto reload value
  676. TIM17->CR1 = TIM_CR1_ARPE;
  677. // initial pwm value
  678. //TIM17->CCR1 = TIM17_PWM_VAL;
  679. // pwm mode 1 for 1 chanel
  680. TIM17->CCMR1 = (TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1PE);
  681. // reset int flag
  682. TIM17->SR |= TIM_SR_UIF;
  683. TIM17->BDTR = TIM_BDTR_MOE; // enable main output
  684. TIM17->EGR = TIM_EGR_UG; // force timer update
  685. /* TIM17 CC_EnableChannel */
  686. TIM17->CCER = TIM_CCER_CC1E;
  687. /* TIM_EnableCounter */
  688. TIM17->CR1 |= TIM_CR1_CEN;
  689. /* Enable IRQ */
  690. TIM17->DIER = TIM_DIER_UIE;
  691. }
  692. /**
  693. * @brief USART1 Initialization Function
  694. * @param None
  695. * @retval None
  696. */
  697. static void USART1_UART_Init(void)
  698. {
  699. /* Peripheral clock enable */
  700. RCC->APBENR2 |= RCC_APBENR2_USART1EN;
  701. /**USART1 GPIO Configuration
  702. PB6 ------> USART1_TX
  703. PB7 ------> USART1_RX
  704. */
  705. GPIO_SetPinMode(GPIOB, GPIO_PIN_6, GPIO_MODE_AFF);
  706. GPIO_SetPinSpeed(GPIOB, GPIO_PIN_6, GPIO_OSPEED_HI);
  707. GPIO_SetPinMode(GPIOB, GPIO_PIN_7, GPIO_MODE_AFF);
  708. GPIO_SetPinSpeed(GPIOB, GPIO_PIN_7, GPIO_OSPEED_HI);
  709. /* USART1 interrupt Init */
  710. NVIC_SetPriority(USART1_IRQn, 0);
  711. NVIC_EnableIRQ(USART1_IRQn);
  712. USART1->CR1 |= (USART_CR1_TE |USART_CR1_RE);
  713. USART1->BRR = 138;
  714. /* USART1 Enable */
  715. USART1->CR1 |= USART_CR1_UE;
  716. /* Polling USART1 initialisation */
  717. while((!(USART1->ISR & USART_ISR_TEACK)) || (!(USART1->ISR & USART_ISR_REACK)))
  718. {
  719. }
  720. }