board.c 21 KB

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  1. #include "board.h"
  2. /* private defines */
  3. #define SPI_BUFFER_SIZE 5
  4. /* private variables */
  5. /**
  6. * Nixi Tube cathodes map in Byte Array:
  7. * {E0 E9 E8 E7 E6 E5 E4 E3}
  8. * {E2 E1 D0 D9 D8 D7 D6 D5}
  9. * {D4 D3 D2 D1 B0 B9 B8 B7}
  10. * {B6 B5 B4 B3 B2 B1 A0 A9}
  11. * {A8 A7 A6 A5 A4 A3 A2 A1}
  12. *
  13. * Shift register bit map in Tube cathodes (from 0 to 1):
  14. * {5.7 5.6 5.5 5.4 5.3 5.2 5.1 5.0 4.7 4.6} VL5/E
  15. * {4.5 4.4 4.3 4.2 4.1 4.0 3.7 3.6 3.5 3.4} VL4/D
  16. * {3.3 3.2 3.1 3.0 2.7 2.6 2.5 2.4 2.3 2.2} VL2/B
  17. * {2.1 2.0 1.7 1.6 1.5 1.4 1.3 1.2 1.1 1.0} VL1/A
  18. */
  19. static const uint16_t nixieCathodeMap[4][10] = {
  20. {0x8000, 0x0040, 0x0080, 0x0100, 0x0200, 0x0400, 0x0800, 0x1000, 0x2000, 0x4000},
  21. {0x2000, 0x0010, 0x0020, 0x0040, 0x0080, 0x0100, 0x0200, 0x0400, 0x0800, 0x1000},
  22. {0x0800, 0x0004, 0x0008, 0x0010, 0x0020, 0x0040, 0x0080, 0x0100, 0x0200, 0x0400},
  23. {0x0200, 0x0001, 0x0002, 0x0004, 0x0008, 0x0010, 0x0020, 0x0040, 0x0080, 0x0100}
  24. };
  25. //static const uint8_t nixieCathodeMask[4][2] = {{0x00, 0x3f}, {0xc0, 0x0f}, {0xf0, 0x03}, {0xc0, 0x00}};
  26. static uint8_t tubesBuffer[SPI_BUFFER_SIZE] = {0};
  27. /* private typedef */
  28. /* private functions */
  29. static void _show_digits(const uint32_t digits);
  30. static void GPIO_Init(void);
  31. static void DMA_Init(void);
  32. static void I2C1_Init(void);
  33. static void SPI1_Init(void);
  34. static void TIM1_Init(void);
  35. static void TIM3_Init(void);
  36. static void TIM14_Init(void);
  37. static void TIM16_Init(void);
  38. static void TIM17_Init(void);
  39. static void USART1_UART_Init(void);
  40. /* Board perephireal Configuration */
  41. void Board_Init(void)
  42. {
  43. /* Main peripheral clock enable */
  44. RCC->APBENR1 = (RCC_APBENR1_PWREN | RCC_APBENR1_I2C1EN | RCC_APBENR1_TIM3EN);
  45. RCC->APBENR2 = (RCC_APBENR2_SYSCFGEN | RCC_APBENR2_SPI1EN | RCC_APBENR2_TIM1EN);
  46. /* GPIO Ports Clock Enable */
  47. RCC->IOPENR = (RCC_IOPENR_GPIOAEN | RCC_IOPENR_GPIOBEN | RCC_IOPENR_GPIOCEN);
  48. /* Peripheral interrupt init*/
  49. /* RCC_IRQn interrupt configuration */
  50. NVIC_SetPriority(RCC_IRQn, 0);
  51. NVIC_EnableIRQ(RCC_IRQn);
  52. /* Configure the system clock */
  53. SystemClock_Config();
  54. /* Processor uses sleep as its low power mode */
  55. SCB->SCR &= ~((uint32_t)SCB_SCR_SLEEPDEEP_Msk);
  56. /* DisableSleepOnExit */
  57. SCB->SCR &= ~((uint32_t)SCB_SCR_SLEEPONEXIT_Msk);
  58. /* Initialize all configured peripherals */
  59. GPIO_Init();
  60. DMA_Init();
  61. I2C1_Init();
  62. SPI1_Init();
  63. /** Star SPI transfer to shift registers */
  64. /* Set DMA source and destination addresses. */
  65. /* Source: Address of the SPI buffer. */
  66. DMA1_Channel1->CMAR = (uint32_t)&tubesBuffer;
  67. /* Destination: SPI1 data register. */
  68. DMA1_Channel1->CPAR = (uint32_t)&(SPI1->DR);
  69. /* Set DMA data transfer length (SPI buffer length). */
  70. DMA1_Channel1->CNDTR = SPI_BUFFER_SIZE;
  71. /* Enable SPI transfer */
  72. SPI1->CR1 |= SPI_CR1_SPE;
  73. Flag.SPI_TX_End = 1;
  74. /* Enable tube power */
  75. TUBE_PWR_ON;
  76. /* display work now */
  77. /* Start RGB & Tube Power PWM */
  78. TIM1_Init();
  79. TIM3_Init();
  80. /* Blink timer */
  81. TIM14_Init();
  82. //TIM16_Init();
  83. //TIM17_Init();
  84. //USART1_UART_Init();
  85. }
  86. /**
  87. * @brief Out digits to SPI buffer. ON/off tube power.
  88. * @param : array with four BCD digits
  89. * @retval : None
  90. */
  91. void showDigits(tube4_t dig)
  92. {
  93. static uint32_t old_dig = 0;
  94. uint8_t st = 0, ov = FADE_START;
  95. // if (old_dig == dig.u32) {
  96. // _show_digits(dig.u32);
  97. // } else {
  98. if (old_dig != dig.u32) {
  99. while (ov < FADE_STOP) {
  100. if (st == 0) {
  101. // new tube value
  102. st = 1;
  103. _show_digits(dig.u32);
  104. ov += FADE_STEP;
  105. tdelay_ms(ov);
  106. } else {
  107. // old tube value
  108. st = 0;
  109. _show_digits(old_dig);
  110. tdelay_ms(FADE_STOP - ov);
  111. }
  112. } // End of while
  113. old_dig = dig.u32;
  114. } // End of if-else
  115. }
  116. static void _show_digits(const uint32_t digits)
  117. {
  118. tube4_t dig;
  119. dig.u32 = digits;
  120. /* Clear buffer */
  121. tubesBuffer[0] = 0;
  122. tubesBuffer[1] = 0;
  123. tubesBuffer[2] = 0;
  124. tubesBuffer[3] = 0;
  125. tubesBuffer[4] = 0;
  126. /* check values range */
  127. int i;
  128. for (i=0; i<4; i++) {
  129. if (dig.ar[i] > 9) {
  130. if (dig.ar[i] != 0xf) {
  131. dig.ar[i] = 0;
  132. }
  133. }
  134. }
  135. /* Wait for SPI */
  136. while (Flag.SPI_TX_End == 0);
  137. Flag.SPI_TX_End = 0;
  138. /* Feel buffer */
  139. tubesBuffer[0] = (uint8_t)(nixieCathodeMap[Tube_E][dig.s8.tE] >> 8);
  140. tubesBuffer[1] = (uint8_t)((nixieCathodeMap[Tube_E][dig.s8.tE]) | (nixieCathodeMap[Tube_D][dig.s8.tD] >> 8));
  141. tubesBuffer[2] = (uint8_t)((nixieCathodeMap[Tube_D][dig.s8.tD]) | (nixieCathodeMap[Tube_B][dig.s8.tB] >> 8));
  142. tubesBuffer[3] = (uint8_t)((nixieCathodeMap[Tube_B][dig.s8.tB]) | (nixieCathodeMap[Tube_A][dig.s8.tA] >> 8));
  143. tubesBuffer[4] = (uint8_t)(nixieCathodeMap[Tube_A][dig.s8.tA]);
  144. /* Start DMA transfer to SPI */
  145. DMA1_Channel1->CCR |= DMA_CCR_EN;
  146. /* On/Off tube power */
  147. for (i=0; i<4; i++) {
  148. if (dig.ar[i] == 0xf) {
  149. tube_PowerOff((tube_pos_t)i);
  150. } else {
  151. tube_PowerOn((tube_pos_t)i);
  152. }
  153. }
  154. }
  155. void tube_PowerOn(tube_pos_t tube)
  156. {
  157. switch (tube) {
  158. case Tube_A:
  159. TUBE_A_ON;
  160. break;
  161. case Tube_B:
  162. TUBE_B_ON;
  163. break;
  164. case Tube_D:
  165. TUBE_D_ON;
  166. break;
  167. case Tube_E:
  168. TUBE_E_ON;
  169. break;
  170. case Tube_All:
  171. TUBE_ALL_ON;
  172. break;
  173. default:
  174. break;
  175. }
  176. }
  177. void tube_PowerOff(tube_pos_t tube)
  178. {
  179. switch (tube) {
  180. case Tube_A:
  181. TUBE_A_OFF;
  182. break;
  183. case Tube_B:
  184. TUBE_B_OFF;
  185. break;
  186. case Tube_D:
  187. TUBE_D_OFF;
  188. break;
  189. case Tube_E:
  190. TUBE_E_OFF;
  191. break;
  192. case Tube_All:
  193. TUBE_ALL_OFF;
  194. break;
  195. default:
  196. break;
  197. }
  198. }
  199. void tube_BrightLevel(tube_pos_t tube, uint8_t bright)
  200. {
  201. switch (tube) {
  202. case Tube_A:
  203. TUBE_A_BRIGHT(bright);
  204. break;
  205. case Tube_B:
  206. TUBE_B_BRIGHT(bright);
  207. break;
  208. case Tube_C:
  209. TUBE_C_BRIGHT(bright);
  210. break;
  211. case Tube_D:
  212. TUBE_D_BRIGHT(bright);
  213. break;
  214. case Tube_E:
  215. TUBE_E_BRIGHT(bright);
  216. break;
  217. case Tube_All:
  218. TUBES_BRIGHT(bright);
  219. break;
  220. default:
  221. break;
  222. }
  223. }
  224. /**
  225. * @brief System Clock Configuration
  226. * @retval None
  227. */
  228. void SystemClock_Config(void)
  229. {
  230. /* HSI configuration and activation */
  231. RCC->CR |= RCC_CR_HSION; // Enable HSI
  232. while((RCC->CR & RCC_CR_HSIRDY) == 0);
  233. /* Main PLL configuration and activation */
  234. //RCC->PLLCFGR &= ~(RCC_PLLCFGR_PLLSRC | RCC_PLLCFGR_PLLM | RCC_PLLCFGR_PLLN | RCC_PLLCFGR_PLLR);
  235. RCC->PLLCFGR = (RCC_PLLCFGR_PLLSRC_HSI | RCC_PLLCFGR_PLLM_0 | (9 << RCC_PLLCFGR_PLLN_Pos) | RCC_PLLCFGR_PLLR_1);
  236. RCC->PLLCFGR |= RCC_PLLCFGR_PLLREN; // RCC_PLL_EnableDomain_SYS
  237. RCC->CR |= RCC_CR_PLLON; // RCC_PLL_Enable
  238. while((RCC->CR & RCC_CR_PLLRDY) == 0);
  239. /* Sysclk activation on the main PLL */
  240. RCC->CFGR &= RCC_CFGR_SW;
  241. RCC->CFGR |= RCC_CFGR_SW_1;
  242. while((RCC->CFGR & RCC_CFGR_SWS) != RCC_CFGR_SWS_1);
  243. /* Update CMSIS variable (which can be updated also through SystemCoreClockUpdate function) */
  244. SystemCoreClock = 24000000;
  245. /* Set I2C Clock Source */
  246. RCC->CCIPR &= ~(RCC_CCIPR_I2C1SEL);
  247. RCC->CCIPR |= RCC_CCIPR_I2C1SEL_1;
  248. }
  249. /**
  250. * @brief GPIO Initialization Function
  251. * @param None
  252. * @retval None
  253. */
  254. static void GPIO_Init(void)
  255. {
  256. /* EXTI Line: falling, no pull, input */
  257. // interrupt on line 14
  258. EXTI->IMR1 |= EXTI_IMR1_IM14;
  259. // wake-up with event ?
  260. //EXTI->EMR1 |= EXTI_EMR1_EM14;
  261. // TRIGGER FALLING
  262. EXTI->FTSR1 = EXTI_FTSR1_FT14;
  263. // external interrupt selection - PC14 to EXTI14
  264. EXTI->EXTICR[3] = EXTI_EXTICR4_EXTI14_1;
  265. /* EXTI interrupt init*/
  266. NVIC_SetPriority(EXTI4_15_IRQn, 0);
  267. NVIC_EnableIRQ(EXTI4_15_IRQn);
  268. /* set GPIO modes */
  269. GPIO_SetPinMode(IRQ_GPIO_Port, IRQ_Pin, GPIO_MODE_IN);
  270. GPIO_SetPinPull(IRQ_GPIO_Port, IRQ_Pin, GPIO_PUPDR_UP);
  271. /* L0, L1, L2, L3 - IN-15 symbols control, PP out, high speed, pull down */
  272. GPIO_SetPinMode(LC0_GPIO_Port, LC0_Pin, GPIO_MODE_OUT);
  273. GPIO_SetPinSpeed(LC0_GPIO_Port, LC0_Pin, GPIO_OSPEED_HI);
  274. GPIO_SetPinPull(LC0_GPIO_Port, LC0_Pin, GPIO_PUPDR_DW);
  275. GPIO_SetPinMode(LC1_GPIO_Port, LC1_Pin, GPIO_MODE_OUT);
  276. GPIO_SetPinSpeed(LC1_GPIO_Port, LC1_Pin, GPIO_OSPEED_HI);
  277. GPIO_SetPinPull(LC1_GPIO_Port, LC1_Pin, GPIO_PUPDR_DW);
  278. GPIO_SetPinMode(LC2_GPIO_Port, LC2_Pin, GPIO_MODE_OUT);
  279. GPIO_SetPinSpeed(LC2_GPIO_Port, LC2_Pin, GPIO_OSPEED_HI);
  280. GPIO_SetPinPull(LC2_GPIO_Port, LC2_Pin, GPIO_PUPDR_DW);
  281. GPIO_SetPinMode(LC3_GPIO_Port, LC3_Pin, GPIO_MODE_OUT);
  282. GPIO_SetPinSpeed(LC3_GPIO_Port, LC3_Pin, GPIO_OSPEED_HI);
  283. GPIO_SetPinPull(LC3_GPIO_Port, LC3_Pin, GPIO_PUPDR_DW);
  284. /* Pwer Shutdown: PP out, high speed, pull down */
  285. GPIO_SetPinMode(SHDN_GPIO_Port, SHDN_Pin, GPIO_MODE_OUT);
  286. GPIO_SetPinSpeed(SHDN_GPIO_Port, SHDN_Pin, GPIO_OSPEED_HI);
  287. GPIO_SetPinPull(SHDN_GPIO_Port, SHDN_Pin, GPIO_PUPDR_DW);
  288. /* SPI Latch: OD out, high speed, no pull */
  289. GPIO_SetPinMode(Latch_GPIO_Port, Latch_Pin, GPIO_MODE_OUT);
  290. GPIO_SetPinOutputType(Latch_GPIO_Port, Latch_Pin, GPIO_OTYPE_OD);
  291. GPIO_SetPinSpeed(Latch_GPIO_Port, Latch_Pin, GPIO_OSPEED_HI);
  292. /* UART_Enable: PP out, low speed, no pull*/
  293. GPIO_SetPinMode(UART_EN_GPIO_Port, UART_EN_Pin, GPIO_MODE_OUT);
  294. /* UART_State: input, pull up */
  295. GPIO_SetPinPull(UART_ST_GPIO_Port, UART_ST_Pin, GPIO_PUPDR_UP);
  296. GPIO_SetPinMode(UART_ST_GPIO_Port, UART_ST_Pin, GPIO_MODE_IN);
  297. /* BTN1, BTN2, BTN3, BTN4: input, pull up */
  298. GPIO_SetPinPull(BTN1_GPIO_Port, BTN1_Pin, GPIO_PUPDR_UP);
  299. GPIO_SetPinMode(BTN1_GPIO_Port, BTN1_Pin, GPIO_MODE_IN);
  300. GPIO_SetPinPull(BTN2_GPIO_Port, BTN2_Pin, GPIO_PUPDR_UP);
  301. GPIO_SetPinMode(BTN2_GPIO_Port, BTN2_Pin, GPIO_MODE_IN);
  302. GPIO_SetPinPull(BTN3_GPIO_Port, BTN3_Pin, GPIO_PUPDR_UP);
  303. GPIO_SetPinMode(BTN3_GPIO_Port, BTN3_Pin, GPIO_MODE_IN);
  304. GPIO_SetPinPull(BTN4_GPIO_Port, BTN4_Pin, GPIO_PUPDR_UP);
  305. GPIO_SetPinMode(BTN4_GPIO_Port, BTN4_Pin, GPIO_MODE_IN);
  306. }
  307. /**
  308. * Enable DMA controller clock
  309. */
  310. static void DMA_Init(void)
  311. {
  312. /* DMA controller clock enable */
  313. RCC->AHBENR |= RCC_AHBENR_DMA1EN;
  314. /* enable DMA1 clock in Sleep/Stop mode */
  315. //RCC->AHBSMENR |= RCC_AHBSMENR_DMA1SMEN;
  316. /* DMA interrupt init */
  317. /* DMA1_Channel1_IRQn interrupt configuration */
  318. NVIC_SetPriority(DMA1_Channel1_IRQn, 0);
  319. NVIC_EnableIRQ(DMA1_Channel1_IRQn);
  320. /* DMA1_Channel2_3_IRQn interrupt configuration */
  321. NVIC_SetPriority(DMA1_Channel2_3_IRQn, 0);
  322. NVIC_EnableIRQ(DMA1_Channel2_3_IRQn);
  323. }
  324. /**
  325. * @brief I2C1 Initialization Function
  326. * @param None
  327. * @retval None
  328. */
  329. static void I2C1_Init(void)
  330. {
  331. /** I2C1 GPIO Configuration
  332. PB8 ------> I2C1_SCL
  333. PB9 ------> I2C1_SDA
  334. */
  335. GPIO_SetPinMode(GPIOB, GPIO_PIN_8, GPIO_MODE_AFF);
  336. GPIO_SetPinOutputType(GPIOB, GPIO_PIN_8, GPIO_OTYPE_OD);
  337. GPIO_SetPinSpeed(GPIOB, GPIO_PIN_8, GPIO_OSPEED_HI);
  338. GPIO_SetPinPull(GPIOB, GPIO_PIN_8, GPIO_PUPDR_UP);
  339. GPIO_SetAFPin_8_15(GPIOB, GPIO_PIN_8, GPIO_AF_6);
  340. GPIO_SetPinMode(GPIOB, GPIO_PIN_9, GPIO_MODE_AFF);
  341. GPIO_SetPinOutputType(GPIOB, GPIO_PIN_9, GPIO_OTYPE_OD);
  342. GPIO_SetPinSpeed(GPIOB, GPIO_PIN_9, GPIO_OSPEED_HI);
  343. GPIO_SetPinPull(GPIOB, GPIO_PIN_9, GPIO_PUPDR_UP);
  344. GPIO_SetAFPin_8_15(GPIOB, GPIO_PIN_9, GPIO_AF_6);
  345. /** I2C1 DMA Init */
  346. /* I2C1_RX Init: Priority medium, Memory increment, read from perephireal,
  347. transfer error interrupt enable, transfer complete interrupt enable */
  348. DMA1_Channel2->CCR = (DMA_CCR_PL_0 | DMA_CCR_MINC | DMA_CCR_TEIE | DMA_CCR_TCIE);
  349. /* Route DMA channel 2 to I2C1 RX */
  350. DMAMUX1_Channel1->CCR = 10;
  351. /* I2C1_TX Init: Priority medium, Memory increment, read from memory,
  352. transfer error interrupt enable, transfer complete interrupt enable */
  353. DMA1_Channel3->CCR = (DMA_CCR_PL_0 | DMA_CCR_MINC| DMA_CCR_DIR | DMA_CCR_TEIE | DMA_CCR_TCIE);
  354. /* Route DMA channel 3 to I2C1 TX */
  355. DMAMUX1_Channel2->CCR = 11;
  356. /** I2C Initialization: I2C_Fast */
  357. I2C1->TIMINGR = 0x0010061A;
  358. I2C1->CR2 = I2C_CR2_AUTOEND;
  359. I2C1->CR1 = I2C_CR1_PE;
  360. }
  361. /**
  362. * @brief SPI1 Initialization Function
  363. * @param None
  364. * @retval None
  365. */
  366. static void SPI1_Init(void)
  367. {
  368. /**SPI1 GPIO Configuration
  369. PB3 ------> SPI1_SCK
  370. PB5 ------> SPI1_MOSI
  371. */
  372. GPIO_SetPinMode(GPIOB, GPIO_PIN_3, GPIO_MODE_AFF);
  373. GPIO_SetPinOutputType(GPIOB, GPIO_PIN_3, GPIO_OTYPE_OD);
  374. GPIO_SetPinSpeed(GPIOB, GPIO_PIN_3, GPIO_OSPEED_HI);
  375. GPIO_SetPinMode(GPIOB, GPIO_PIN_5, GPIO_MODE_AFF);
  376. GPIO_SetPinOutputType(GPIOB, GPIO_PIN_5, GPIO_OTYPE_OD);
  377. GPIO_SetPinSpeed(GPIOB, GPIO_PIN_5, GPIO_OSPEED_HI);
  378. /* SPI1 DMA Init */
  379. /* SPI1_TX Init: Priority high, Memory increment, read from memory, circular mode,
  380. Enable DMA transfer complete/error interrupts */
  381. DMA1_Channel1->CCR = (DMA_CCR_PL_1 | DMA_CCR_MINC | DMA_CCR_CIRC | DMA_CCR_TEIE | DMA_CCR_DIR | DMA_CCR_TCIE);
  382. /* Route DMA channel 1 to SPI1 TX */
  383. DMAMUX1_Channel0->CCR = 0x11;
  384. /* SPI1 interrupt Init */
  385. NVIC_SetPriority(SPI1_IRQn, 0);
  386. NVIC_EnableIRQ(SPI1_IRQn);
  387. /* SPI1 parameter configuration: master mode, data 8 bit, divider = 16, TX DMA */
  388. SPI1->CR1 = (SPI_CR1_MSTR | SPI_CR1_BR_1 | SPI_CR1_BR_0 | SPI_CR1_SSM | SPI_CR1_SSI);
  389. SPI1->CR2 = (SPI_CR2_DS_2 | SPI_CR2_DS_1 | SPI_CR2_DS_0 | SPI_CR2_TXDMAEN | SPI_CR2_FRXTH);
  390. }
  391. /**
  392. * @brief TIM1 Initialization Function
  393. * @param None
  394. * @retval None
  395. */
  396. static void TIM1_Init(void)
  397. {
  398. /* target clock */
  399. TIM1->PSC = TIM1_PSC; // prescaler
  400. TIM1->ARR = TIM1_ARR; // auto reload value
  401. TIM1->CR1 = TIM_CR1_ARPE;
  402. // initial pwm value
  403. TIM1->CCR1 = PWM_TUBE_INIT_VAL;
  404. TIM1->CCR2 = PWM_LED_INIT_VAL;
  405. TIM1->CCR3 = PWM_LED_INIT_VAL;
  406. TIM1->CCR4 = PWM_LED_INIT_VAL;
  407. // pwm mode 1 for 4 chanels
  408. TIM1->CCMR1 = (TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC2M_1 | TIM_CCMR1_OC2M_2 | TIM_CCMR1_OC1PE | TIM_CCMR1_OC2PE);
  409. TIM1->CCMR2 = (TIM_CCMR2_OC3M_1 | TIM_CCMR2_OC3M_2 | TIM_CCMR2_OC4M_1 | TIM_CCMR2_OC4M_2 | TIM_CCMR2_OC3PE | TIM_CCMR2_OC4PE);
  410. // reset int flag - not needed, int unused
  411. //TIM1->SR |= TIM_SR_UIF;
  412. TIM1->BDTR = TIM_BDTR_MOE; // enable main output
  413. TIM1->EGR = TIM_EGR_UG; // force timer update
  414. /* TIM1 CC_EnableChannel */
  415. TIM1->CCER = (TIM_CCER_CC1E | TIM_CCER_CC2E | TIM_CCER_CC3E | TIM_CCER_CC4E);
  416. /* TIM_EnableCounter */
  417. TIM1->CR1 |= TIM_CR1_CEN;
  418. /** TIM1 GPIO Configuration
  419. PA8 ------> TIM1_CH1
  420. PA9 ------> TIM1_CH2
  421. PA10 ------> TIM1_CH3
  422. PA11 [PA9] ------> TIM1_CH4
  423. */
  424. GPIO_SetPinMode(PWM_1_GPIO_Port, PWM_1_Pin, GPIO_MODE_AFF);
  425. GPIO_SetPinSpeed(PWM_1_GPIO_Port, PWM_1_Pin, GPIO_OSPEED_HI);
  426. GPIO_SetPinPull(PWM_1_GPIO_Port, PWM_1_Pin, GPIO_PUPDR_DW);
  427. GPIO_SetAFPin_8_15(PWM_1_GPIO_Port, PWM_1_Pin, GPIO_AF_2);
  428. GPIO_SetPinMode(PWM_R_GPIO_Port, PWM_R_Pin, GPIO_MODE_AFF);
  429. GPIO_SetPinSpeed(PWM_R_GPIO_Port, PWM_R_Pin, GPIO_OSPEED_HI);
  430. GPIO_SetPinPull(PWM_R_GPIO_Port, PWM_R_Pin, GPIO_PUPDR_DW);
  431. GPIO_SetAFPin_8_15(PWM_R_GPIO_Port, PWM_R_Pin, GPIO_AF_2);
  432. GPIO_SetPinMode(PWM_B_GPIO_Port, PWM_B_Pin, GPIO_MODE_AFF);
  433. GPIO_SetPinSpeed(PWM_B_GPIO_Port, PWM_B_Pin, GPIO_OSPEED_HI);
  434. GPIO_SetPinPull(PWM_B_GPIO_Port, PWM_B_Pin, GPIO_PUPDR_DW);
  435. GPIO_SetAFPin_8_15(PWM_B_GPIO_Port, PWM_B_Pin, GPIO_AF_2);
  436. GPIO_SetPinMode(PWM_G_GPIO_Port, PWM_G_Pin, GPIO_MODE_AFF);
  437. GPIO_SetPinSpeed(PWM_G_GPIO_Port, PWM_G_Pin, GPIO_OSPEED_HI);
  438. GPIO_SetPinPull(PWM_G_GPIO_Port, PWM_G_Pin, GPIO_PUPDR_DW);
  439. GPIO_SetAFPin_8_15(PWM_G_GPIO_Port, PWM_G_Pin, GPIO_AF_2);
  440. }
  441. /**
  442. * @brief TIM3 Initialization Function
  443. * @param None
  444. * @retval None
  445. */
  446. static void TIM3_Init(void)
  447. {
  448. /* target clock */
  449. TIM3->PSC = TIM3_PSC; // prescaler
  450. TIM3->ARR = TIM3_ARR; // auto reload value
  451. TIM3->CR1 = TIM_CR1_ARPE;
  452. // initial pwm value
  453. TIM3->CCR1 = PWM_TUBE_INIT_VAL;
  454. TIM3->CCR2 = PWM_TUBE_INIT_VAL;
  455. TIM3->CCR3 = PWM_TUBE_INIT_VAL;
  456. TIM3->CCR4 = PWM_TUBE_INIT_VAL;
  457. // pwm mode 1 for 4 chanels
  458. TIM3->CCMR1 = (TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC2M_1 | TIM_CCMR1_OC2M_2 | TIM_CCMR1_OC1PE | TIM_CCMR1_OC2PE);
  459. TIM3->CCMR2 = (TIM_CCMR2_OC3M_1 | TIM_CCMR2_OC3M_2 | TIM_CCMR2_OC4M_1 | TIM_CCMR2_OC4M_2 | TIM_CCMR2_OC3PE | TIM_CCMR2_OC4PE);
  460. // launch timer
  461. TIM3->EGR = TIM_EGR_UG; // force timer update
  462. /* TIM3 TIM_CC_EnableChannel */
  463. TIM3->CCER = (TIM_CCER_CC1E | TIM_CCER_CC2E | TIM_CCER_CC3E | TIM_CCER_CC4E);
  464. /* TIM3 enable */
  465. TIM3->CR1 |= TIM_CR1_CEN;
  466. /**TIM3 GPIO Configuration
  467. PA6 ------> TIM3_CH1
  468. PA7 ------> TIM3_CH2
  469. PB0 ------> TIM3_CH3
  470. PB1 ------> TIM3_CH4
  471. */
  472. GPIO_SetPinMode(PWM_5_GPIO_Port, PWM_5_Pin, GPIO_MODE_AFF);
  473. GPIO_SetPinSpeed(PWM_5_GPIO_Port, PWM_5_Pin, GPIO_OSPEED_HI);
  474. GPIO_SetPinPull(PWM_5_GPIO_Port, PWM_5_Pin, GPIO_PUPDR_DW);
  475. GPIO_SetAFPin_0_7(PWM_5_GPIO_Port, PWM_5_Pin, GPIO_AF_1);
  476. GPIO_SetPinMode(PWM_4_GPIO_Port, PWM_4_Pin, GPIO_MODE_AFF);
  477. GPIO_SetPinSpeed(PWM_4_GPIO_Port, PWM_4_Pin, GPIO_OSPEED_HI);
  478. GPIO_SetPinPull(PWM_4_GPIO_Port, PWM_4_Pin, GPIO_PUPDR_DW);
  479. GPIO_SetAFPin_0_7(PWM_4_GPIO_Port, PWM_4_Pin, GPIO_AF_1);
  480. GPIO_SetPinMode(PWM_3_GPIO_Port, PWM_3_Pin, GPIO_MODE_AFF);
  481. GPIO_SetPinSpeed(PWM_3_GPIO_Port, PWM_3_Pin, GPIO_OSPEED_HI);
  482. GPIO_SetPinPull(PWM_3_GPIO_Port, PWM_3_Pin, GPIO_PUPDR_DW);
  483. GPIO_SetAFPin_0_7(PWM_3_GPIO_Port, PWM_3_Pin, GPIO_AF_1);
  484. GPIO_SetPinMode(PWM_2_GPIO_Port, PWM_2_Pin, GPIO_MODE_AFF);
  485. GPIO_SetPinSpeed(PWM_2_GPIO_Port, PWM_2_Pin, GPIO_OSPEED_HI);
  486. GPIO_SetPinPull(PWM_2_GPIO_Port, PWM_2_Pin, GPIO_PUPDR_DW);
  487. GPIO_SetAFPin_0_7(PWM_2_GPIO_Port, PWM_2_Pin, GPIO_AF_1);
  488. }
  489. /**
  490. * @brief TIM14 Initialization Function
  491. * @param None
  492. * @retval None
  493. * @desc "Блинкование" разрядами - 0,75/0,25 сек вкл/выкл.
  494. */
  495. static void TIM14_Init(void)
  496. {
  497. /* Peripheral clock enable */
  498. RCC->APBENR2 |= RCC_APBENR2_TIM14EN;
  499. /* TIM14 interrupt Init */
  500. NVIC_SetPriority(TIM14_IRQn, 0);
  501. NVIC_EnableIRQ(TIM14_IRQn);
  502. /* Set TIM14 for 1 sec period */
  503. TIM14->PSC = TIM14_PSC;
  504. TIM14->ARR = TIM14_ARR;
  505. /* Enable: Auto-reload preload, no One-pulse mode, */
  506. TIM14->CR1 = (TIM_CR1_ARPE); // | TIM_CR1_OPM);
  507. /* OC or PWM? (for pwm - (TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_1) ) , Output compare 1 preload */
  508. TIM14->CCMR1 = (TIM_CCMR1_OC1M_0 | TIM_CCMR1_OC1PE);
  509. /* Enable Channel_1 or no needed ??? */
  510. TIM14->CCER = TIM_CCER_CC1E;
  511. /* Impulse value in msek */
  512. TIM14->CCR1 = TIM14_PULSE_VAL;
  513. /* Enable IRQ for Update end CaptureCompare envents or only CC ??? */
  514. TIM14->DIER = (TIM_DIER_UIE | TIM_DIER_CC1IE);
  515. //TIM14->DIER = TIM_DIER_CC1IE;
  516. }
  517. /**
  518. * На старте активируем все каналы, при совпадении отключаем (не)нужные.
  519. */
  520. void Blink_Start(void)
  521. {
  522. /* enable all channels */
  523. //TUBE_ALL_ON;
  524. /* clear IRQ flags */
  525. TIM14->SR |= TIM_SR_UIF;
  526. TIM14->SR |= TIM_SR_CC1IF;
  527. /* clear counter value */
  528. TIM14->CNT = 0;
  529. /* enable timer */
  530. TIM14->CR1 |= TIM_CR1_CEN;
  531. }
  532. void Blink_Stop(void)
  533. {
  534. /* disable timer */
  535. TIM14->CR1 &= ~(TIM_CR1_CEN);
  536. /* enable channels */
  537. if (Flag.Blink_1 != 0) {
  538. TUBE_A_ON;
  539. }
  540. if (Flag.Blink_2 != 0) {
  541. TUBE_B_ON;
  542. }
  543. if (Flag.Blink_3 != 0) {
  544. TUBE_C_ON;
  545. }
  546. if (Flag.Blink_4 != 0) {
  547. TUBE_D_ON;
  548. }
  549. if (Flag.Blink_5 != 0) {
  550. TUBE_E_ON;
  551. }
  552. /* clear flags */
  553. Flag.Blink_1 = 0;
  554. Flag.Blink_2 = 0;
  555. Flag.Blink_3 = 0;
  556. Flag.Blink_4 = 0;
  557. Flag.Blink_5 = 0;
  558. }
  559. /**
  560. * @brief TIM16 Initialization Function
  561. * @param None
  562. * @retval None
  563. */
  564. static void TIM16_Init(void)
  565. {
  566. /* Peripheral clock enable */
  567. RCC->APBENR2 |= RCC_APBENR2_TIM16EN;
  568. /* TIM16 interrupt Init */
  569. NVIC_SetPriority(TIM16_IRQn, 0);
  570. NVIC_EnableIRQ(TIM16_IRQn);
  571. /* setup clock */
  572. TIM16->PSC = TIM16_PSC; // prescaler
  573. TIM16->ARR = TIM16_ARR; // auto reload value
  574. TIM16->CR1 = TIM_CR1_ARPE;
  575. // initial pwm value
  576. //TIM16->CCR1 = TIM16_PWM_VAL;
  577. // pwm mode 1 for 1 chanel
  578. TIM16->CCMR1 = (TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1PE);
  579. // reset int flag
  580. TIM16->SR |= TIM_SR_UIF;
  581. TIM16->BDTR = TIM_BDTR_MOE; // enable main output
  582. TIM16->EGR = TIM_EGR_UG; // force timer update
  583. /* TIM16 CC_EnableChannel */
  584. TIM16->CCER = TIM_CCER_CC1E;
  585. /* TIM_EnableCounter */
  586. TIM16->CR1 |= TIM_CR1_CEN;
  587. /* Enable IRQ */
  588. TIM16->DIER = TIM_DIER_UIE;
  589. }
  590. /**
  591. * @brief TIM17 Initialization Function
  592. * @param None
  593. * @retval None
  594. */
  595. static void TIM17_Init(void)
  596. {
  597. /* Peripheral clock enable */
  598. RCC->APBENR2 |= RCC_APBENR2_TIM17EN;
  599. /* TIM17 interrupt Init */
  600. NVIC_SetPriority(TIM17_IRQn, 0);
  601. NVIC_EnableIRQ(TIM17_IRQn);
  602. /* setup clock */
  603. TIM17->PSC = TIM17_PSC; // prescaler
  604. TIM17->ARR = TIM17_ARR; // auto reload value
  605. TIM17->CR1 = TIM_CR1_ARPE;
  606. // initial pwm value
  607. //TIM17->CCR1 = TIM17_PWM_VAL;
  608. // pwm mode 1 for 1 chanel
  609. TIM17->CCMR1 = (TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1PE);
  610. // reset int flag
  611. TIM17->SR |= TIM_SR_UIF;
  612. TIM17->BDTR = TIM_BDTR_MOE; // enable main output
  613. TIM17->EGR = TIM_EGR_UG; // force timer update
  614. /* TIM17 CC_EnableChannel */
  615. TIM17->CCER = TIM_CCER_CC1E;
  616. /* TIM_EnableCounter */
  617. TIM17->CR1 |= TIM_CR1_CEN;
  618. /* Enable IRQ */
  619. TIM17->DIER = TIM_DIER_UIE;
  620. }
  621. /**
  622. * @brief USART1 Initialization Function
  623. * @param None
  624. * @retval None
  625. */
  626. static void USART1_UART_Init(void)
  627. {
  628. /* Peripheral clock enable */
  629. RCC->APBENR2 |= RCC_APBENR2_USART1EN;
  630. /**USART1 GPIO Configuration
  631. PB6 ------> USART1_TX
  632. PB7 ------> USART1_RX
  633. */
  634. GPIO_SetPinMode(GPIOB, GPIO_PIN_6, GPIO_MODE_AFF);
  635. GPIO_SetPinSpeed(GPIOB, GPIO_PIN_6, GPIO_OSPEED_HI);
  636. GPIO_SetPinMode(GPIOB, GPIO_PIN_7, GPIO_MODE_AFF);
  637. GPIO_SetPinSpeed(GPIOB, GPIO_PIN_7, GPIO_OSPEED_HI);
  638. /* USART1 interrupt Init */
  639. NVIC_SetPriority(USART1_IRQn, 0);
  640. NVIC_EnableIRQ(USART1_IRQn);
  641. USART1->CR1 |= (USART_CR1_TE |USART_CR1_RE);
  642. USART1->BRR = 138;
  643. /* USART1 Enable */
  644. USART1->CR1 |= USART_CR1_UE;
  645. /* Polling USART1 initialisation */
  646. while((!(USART1->ISR & USART_ISR_TEACK)) || (!(USART1->ISR & USART_ISR_REACK)))
  647. {
  648. }
  649. }