board.c 11 KB

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  1. #include "board.h"
  2. #include "stm32g0xx_ll_rcc.h"
  3. #include "stm32g0xx_ll_bus.h"
  4. #include "stm32g0xx_ll_gpio.h"
  5. #include "stm32g0xx_ll_usart.h"
  6. /* private functions */
  7. static void TIM1_Init(void);
  8. static void TIM3_Init(void);
  9. static void TIM14_Init(void);
  10. static void TIM16_Init(void);
  11. static void TIM17_Init(void);
  12. static void USART1_UART_Init(void);
  13. /* Board perephireal Configuration */
  14. void Board_Init(void)
  15. {
  16. /* Start RGB & Tube Power PWM */
  17. TIM1_Init();
  18. TIM3_Init();
  19. //TIM14_Init();
  20. //TIM16_Init();
  21. //TIM17_Init();
  22. USART1_UART_Init();
  23. }
  24. /**
  25. * @brief System Clock Configuration
  26. * @retval None
  27. */
  28. void SystemClock_Config(void)
  29. {
  30. /* HSI configuration and activation */
  31. RCC->CR |= RCC_CR_HSIKERON; // Enable HSI even in stop mode
  32. while((RCC->CR & RCC_CR_HSIRDY) == 0)
  33. {
  34. }
  35. /* Main PLL configuration and activation */
  36. RCC->PLLCFGR &= ~(RCC_PLLCFGR_PLLSRC | RCC_PLLCFGR_PLLM | RCC_PLLCFGR_PLLN | RCC_PLLCFGR_PLLR);
  37. RCC->PLLCFGR |= (RCC_PLLCFGR_PLLSRC_HSI | (9 << RCC_PLLCFGR_PLLN_Pos) | RCC_PLLCFGR_PLLR_2 | RCC_PLLCFGR_PLLR_0);
  38. RCC->PLLCFGR |= RCC_PLLCFGR_PLLREN; // RCC_PLL_EnableDomain_SYS
  39. RCC->CR |= RCC_CR_PLLON; // RCC_PLL_Enable
  40. while((RCC->CR & RCC_CR_PLLRDY) == 0)
  41. {
  42. }
  43. /* Set AHB prescaler*/
  44. //RCC->CFGR &= ~(RCC_CFGR_HPRE);
  45. //RCC->CFGR |= 0x00000000U;
  46. /* Sysclk activation on the main PLL */
  47. RCC->CFGR &= RCC_CFGR_SW;
  48. RCC->CFGR |= RCC_CFGR_SW_1;
  49. while((RCC->CFGR & RCC_CFGR_SWS) != RCC_CFGR_SWS_1)
  50. {
  51. }
  52. /* Set APB1 prescaler !!! uncorrect !!! */
  53. //RCC->CFGR &= RCC_CFGR_PPRE;
  54. //RCC->CFGR |= 0x00000000U;
  55. #ifdef USES_SYSTICK
  56. /* Configure the SysTick to have interrupt in 1ms time base */
  57. SysTick->LOAD = (uint32_t)((24000000 / 1000) - 1UL); /* set reload register */
  58. SysTick->VAL = 0UL; /* Load the SysTick Counter Value */
  59. SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk |
  60. SysTick_CTRL_ENABLE_Msk; /* Enable the Systick Timer */
  61. #endif
  62. /* Update CMSIS variable (which can be updated also through SystemCoreClockUpdate function) */
  63. SystemCoreClock = 24000000;
  64. /* Set I2C Clock Source */
  65. RCC->CCIPR &= ~(RCC_CCIPR_I2C1SEL);
  66. RCC->CCIPR |= RCC_CCIPR_I2C1SEL_1;
  67. }
  68. /**
  69. * @brief TIM1 Initialization Function
  70. * @param None
  71. * @retval None
  72. */
  73. static void TIM1_Init(void)
  74. {
  75. /* Peripheral clock TIM1 enable */
  76. RCC->APBENR2 |= RCC_APBENR2_TIM1EN;
  77. /* Peripheral clock GPIOA enable */
  78. RCC->IOPENR |= RCC_IOPENR_GPIOAEN;
  79. /* target clock - 200 Hz */
  80. TIM1->PSC = TIM1_PSC; // prescaler
  81. TIM1->ARR = TIM1_ARR; // auto reload value
  82. TIM1->CR1 = TIM_CR1_ARPE;
  83. // initial pwm value
  84. TIM1->CCR1 = PWM_TUBE_INIT_VAL;
  85. TIM1->CCR2 = PWM_LED_INIT_VAL;
  86. TIM1->CCR3 = PWM_LED_INIT_VAL;
  87. TIM1->CCR4 = PWM_LED_INIT_VAL;
  88. // pwm mode 1 for 4 chanels
  89. TIM1->CCMR1 = (TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC2M_1 | TIM_CCMR1_OC2M_2 | TIM_CCMR1_OC1PE | TIM_CCMR1_OC2PE);
  90. TIM1->CCMR2 = (TIM_CCMR2_OC3M_1 | TIM_CCMR2_OC3M_2 | TIM_CCMR2_OC4M_1 | TIM_CCMR2_OC4M_2 | TIM_CCMR2_OC3PE | TIM_CCMR2_OC4PE);
  91. // reset int flag - not needed, int unused
  92. //TIM1->SR |= TIM_SR_UIF;
  93. TIM1->BDTR = TIM_BDTR_MOE; // enable main output
  94. TIM1->EGR = TIM_EGR_UG; // force timer update
  95. /* TIM1 CC_EnableChannel */
  96. TIM1->CCER = (TIM_CCER_CC1E | TIM_CCER_CC2E | TIM_CCER_CC3E | TIM_CCER_CC4E);
  97. /* TIM_EnableCounter */
  98. TIM1->CR1 |= TIM_CR1_CEN;
  99. /** TIM1 GPIO Configuration
  100. PA8 ------> TIM1_CH1
  101. PA9 ------> TIM1_CH2
  102. PA10 ------> TIM1_CH3
  103. PA11 [PA9] ------> TIM1_CH4
  104. */
  105. GPIO_SetPinMode(PWM_1_GPIO_Port, PWM_1_Pin, GPIO_MODE_AFF);
  106. GPIO_SetPinSpeed(PWM_1_GPIO_Port, PWM_1_Pin, GPIO_OSPEED_HI);
  107. GPIO_SetPinPull(PWM_1_GPIO_Port, PWM_1_Pin, GPIO_PUPDR_DW);
  108. GPIO_SetAFPin_8_15(PWM_1_GPIO_Port, PWM_1_Pin, GPIO_AF_2);
  109. GPIO_SetPinMode(PWM_R_GPIO_Port, PWM_R_Pin, GPIO_MODE_AFF);
  110. GPIO_SetPinSpeed(PWM_R_GPIO_Port, PWM_R_Pin, GPIO_OSPEED_HI);
  111. GPIO_SetPinPull(PWM_R_GPIO_Port, PWM_R_Pin, GPIO_PUPDR_DW);
  112. GPIO_SetAFPin_8_15(PWM_R_GPIO_Port, PWM_R_Pin, GPIO_AF_2);
  113. GPIO_SetPinMode(PWM_B_GPIO_Port, PWM_B_Pin, GPIO_MODE_AFF);
  114. GPIO_SetPinSpeed(PWM_B_GPIO_Port, PWM_B_Pin, GPIO_OSPEED_HI);
  115. GPIO_SetPinPull(PWM_B_GPIO_Port, PWM_B_Pin, GPIO_PUPDR_DW);
  116. GPIO_SetAFPin_8_15(PWM_B_GPIO_Port, PWM_B_Pin, GPIO_AF_2);
  117. GPIO_SetPinMode(PWM_G_GPIO_Port, PWM_G_Pin, GPIO_MODE_AFF);
  118. GPIO_SetPinSpeed(PWM_G_GPIO_Port, PWM_G_Pin, GPIO_OSPEED_HI);
  119. GPIO_SetPinPull(PWM_G_GPIO_Port, PWM_G_Pin, GPIO_PUPDR_DW);
  120. GPIO_SetAFPin_8_15(PWM_G_GPIO_Port, PWM_G_Pin, GPIO_AF_2);
  121. }
  122. /**
  123. * @brief TIM3 Initialization Function
  124. * @param None
  125. * @retval None
  126. */
  127. static void TIM3_Init(void)
  128. {
  129. /* Peripheral clock TIM1 enable */
  130. RCC->APBENR1 |= RCC_APBENR1_TIM3EN;
  131. /* Peripheral clock GPIOA and GPIOB enable */
  132. RCC->IOPENR |= (RCC_IOPENR_GPIOAEN | RCC_IOPENR_GPIOBEN);
  133. /* target clock - 200 Hz */
  134. TIM3->PSC = TIM3_PSC; // prescaler
  135. TIM3->ARR = TIM3_ARR; // auto reload value
  136. TIM3->CR1 = TIM_CR1_ARPE;
  137. // initial pwm value
  138. TIM3->CCR1 = PWM_TUBE_INIT_VAL;
  139. TIM3->CCR2 = PWM_TUBE_INIT_VAL;
  140. TIM3->CCR3 = PWM_TUBE_INIT_VAL;
  141. TIM3->CCR4 = PWM_TUBE_INIT_VAL;
  142. // pwm mode 1 for 4 chanels
  143. TIM3->CCMR1 = (TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC2M_1 | TIM_CCMR1_OC2M_2 | TIM_CCMR1_OC1PE | TIM_CCMR1_OC2PE);
  144. TIM3->CCMR2 = (TIM_CCMR2_OC3M_1 | TIM_CCMR2_OC3M_2 | TIM_CCMR2_OC4M_1 | TIM_CCMR2_OC4M_2 | TIM_CCMR2_OC3PE | TIM_CCMR2_OC4PE);
  145. // launch timer
  146. TIM3->EGR = TIM_EGR_UG; // force timer update
  147. /* TIM3 TIM_CC_EnableChannel */
  148. TIM3->CCER = (TIM_CCER_CC1E | TIM_CCER_CC2E | TIM_CCER_CC3E | TIM_CCER_CC4E);
  149. /* TIM3 enable */
  150. TIM3->CR1 |= TIM_CR1_CEN;
  151. /**TIM3 GPIO Configuration
  152. PA6 ------> TIM3_CH1
  153. PA7 ------> TIM3_CH2
  154. PB0 ------> TIM3_CH3
  155. PB1 ------> TIM3_CH4
  156. */
  157. GPIO_SetPinMode(PWM_5_GPIO_Port, PWM_5_Pin, GPIO_MODE_AFF);
  158. GPIO_SetPinSpeed(PWM_5_GPIO_Port, PWM_5_Pin, GPIO_OSPEED_HI);
  159. GPIO_SetPinPull(PWM_5_GPIO_Port, PWM_5_Pin, GPIO_PUPDR_DW);
  160. GPIO_SetAFPin_0_7(PWM_5_GPIO_Port, PWM_5_Pin, GPIO_AF_1);
  161. GPIO_SetPinMode(PWM_4_GPIO_Port, PWM_4_Pin, GPIO_MODE_AFF);
  162. GPIO_SetPinSpeed(PWM_4_GPIO_Port, PWM_4_Pin, GPIO_OSPEED_HI);
  163. GPIO_SetPinPull(PWM_4_GPIO_Port, PWM_4_Pin, GPIO_PUPDR_DW);
  164. GPIO_SetAFPin_0_7(PWM_4_GPIO_Port, PWM_4_Pin, GPIO_AF_1);
  165. GPIO_SetPinMode(PWM_3_GPIO_Port, PWM_3_Pin, GPIO_MODE_AFF);
  166. GPIO_SetPinSpeed(PWM_3_GPIO_Port, PWM_3_Pin, GPIO_OSPEED_HI);
  167. GPIO_SetPinPull(PWM_3_GPIO_Port, PWM_3_Pin, GPIO_PUPDR_DW);
  168. GPIO_SetAFPin_0_7(PWM_3_GPIO_Port, PWM_3_Pin, GPIO_AF_1);
  169. GPIO_SetPinMode(PWM_2_GPIO_Port, PWM_2_Pin, GPIO_MODE_AFF);
  170. GPIO_SetPinSpeed(PWM_2_GPIO_Port, PWM_2_Pin, GPIO_OSPEED_HI);
  171. GPIO_SetPinPull(PWM_2_GPIO_Port, PWM_2_Pin, GPIO_PUPDR_DW);
  172. GPIO_SetAFPin_0_7(PWM_2_GPIO_Port, PWM_2_Pin, GPIO_AF_1);
  173. }
  174. /**
  175. * @brief TIM14 Initialization Function
  176. * @param None
  177. * @retval None
  178. * @desc "Блинкование" разрядами - 0,75/0,25 сек вкл/выкл.
  179. */
  180. static void TIM14_Init(void)
  181. {
  182. /* Peripheral clock enable */
  183. RCC->APBENR2 |= RCC_APBENR2_TIM14EN;
  184. /* TIM14 interrupt Init */
  185. NVIC_SetPriority(TIM14_IRQn, 0);
  186. NVIC_EnableIRQ(TIM14_IRQn);
  187. /* Set TIM14 for 1 sec period */
  188. TIM14->PSC = TIM14_PSC;
  189. TIM14->ARR = TIM14_ARR;
  190. /* Enable: Auto-reload preload, One-pulse mode, */
  191. TIM14->CR1 = (TIM_CR1_ARPE | TIM_CR1_OPM);
  192. /* OC or PWM? (for pwm - (TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_1) ) , Output compare 1 preload */
  193. TIM14->CCMR1 = (TIM_CCMR1_OC1M_0 | TIM_CCMR1_OC1PE);
  194. /* Enable Channel_1 or no needed ??? */
  195. TIM14->CCER = TIM_CCER_CC1E;
  196. /* Impulse value in msek */
  197. TIM14->CCR1 = TIM14_PULSE_VAL;
  198. /* Enable IRQ for Update end CaptureCompare envents or only CC ??? */
  199. //TIM14->DIER = (TIM_DIER_UIE | TIM_DIER_CC1IE);
  200. TIM14->DIER = TIM_DIER_CC1IE;
  201. }
  202. /**
  203. * На старте активируем все каналы, при совпадении отключаем (не)нужные.
  204. */
  205. void Blink_Start(void)
  206. {
  207. /* enable all channels */
  208. TUBE_ALL_ON;
  209. /* clear IRQ flag */
  210. TIM14->SR |= TIM_SR_CC1IF;
  211. /* clear counter value */
  212. TIM14->CNT = 0;
  213. /* enable timer */
  214. TIM14->CR1 |= TIM_CR1_CEN;
  215. }
  216. void Blink_Stop(void)
  217. {
  218. /* disable timer */
  219. TIM14->CR1 &= ~(TIM_CR1_CEN);
  220. /* On all tubes */
  221. TUBE_ALL_ON;
  222. }
  223. /**
  224. * @brief TIM16 Initialization Function
  225. * @param None
  226. * @retval None
  227. */
  228. static void TIM16_Init(void)
  229. {
  230. /* Peripheral clock enable */
  231. RCC->APBENR2 |= RCC_APBENR2_TIM16EN;
  232. /* TIM16 interrupt Init */
  233. NVIC_SetPriority(TIM16_IRQn, 0);
  234. NVIC_EnableIRQ(TIM16_IRQn);
  235. /* setup clock */
  236. TIM16->PSC = TIM16_PSC; // prescaler
  237. TIM16->ARR = TIM16_ARR; // auto reload value
  238. TIM16->CR1 = TIM_CR1_ARPE;
  239. // initial pwm value
  240. //TIM16->CCR1 = TIM16_PWM_VAL;
  241. // pwm mode 1 for 1 chanel
  242. TIM16->CCMR1 = (TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1PE);
  243. // reset int flag
  244. TIM16->SR |= TIM_SR_UIF;
  245. TIM16->BDTR = TIM_BDTR_MOE; // enable main output
  246. TIM16->EGR = TIM_EGR_UG; // force timer update
  247. /* TIM16 CC_EnableChannel */
  248. TIM16->CCER = TIM_CCER_CC1E;
  249. /* TIM_EnableCounter */
  250. TIM16->CR1 |= TIM_CR1_CEN;
  251. /* Enable IRQ */
  252. TIM16->DIER = TIM_DIER_UIE;
  253. }
  254. /**
  255. * @brief TIM17 Initialization Function
  256. * @param None
  257. * @retval None
  258. */
  259. static void TIM17_Init(void)
  260. {
  261. /* Peripheral clock enable */
  262. RCC->APBENR2 |= RCC_APBENR2_TIM17EN;
  263. /* TIM17 interrupt Init */
  264. NVIC_SetPriority(TIM17_IRQn, 0);
  265. NVIC_EnableIRQ(TIM17_IRQn);
  266. /* setup clock */
  267. TIM17->PSC = TIM17_PSC; // prescaler
  268. TIM17->ARR = TIM17_ARR; // auto reload value
  269. TIM17->CR1 = TIM_CR1_ARPE;
  270. // initial pwm value
  271. //TIM17->CCR1 = TIM17_PWM_VAL;
  272. // pwm mode 1 for 1 chanel
  273. TIM17->CCMR1 = (TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1PE);
  274. // reset int flag
  275. TIM17->SR |= TIM_SR_UIF;
  276. TIM17->BDTR = TIM_BDTR_MOE; // enable main output
  277. TIM17->EGR = TIM_EGR_UG; // force timer update
  278. /* TIM17 CC_EnableChannel */
  279. TIM17->CCER = TIM_CCER_CC1E;
  280. /* TIM_EnableCounter */
  281. TIM17->CR1 |= TIM_CR1_CEN;
  282. /* Enable IRQ */
  283. TIM17->DIER = TIM_DIER_UIE;
  284. }
  285. /**
  286. * @brief USART1 Initialization Function
  287. * @param None
  288. * @retval None
  289. */
  290. static void USART1_UART_Init(void)
  291. {
  292. /* Peripheral clock enable */
  293. RCC->APBENR2 |= RCC_APBENR2_USART1EN;
  294. RCC->IOPENR |= RCC_IOPENR_GPIOBEN;
  295. /**USART1 GPIO Configuration
  296. PB6 ------> USART1_TX
  297. PB7 ------> USART1_RX
  298. */
  299. GPIO_SetPinMode(GPIOB, GPIO_PIN_6, GPIO_MODE_AFF);
  300. GPIO_SetPinSpeed(GPIOB, GPIO_PIN_6, GPIO_OSPEED_HI);
  301. GPIO_SetPinMode(GPIOB, GPIO_PIN_7, GPIO_MODE_AFF);
  302. GPIO_SetPinSpeed(GPIOB, GPIO_PIN_7, GPIO_OSPEED_HI);
  303. /* USART1 interrupt Init */
  304. NVIC_SetPriority(USART1_IRQn, 0);
  305. NVIC_EnableIRQ(USART1_IRQn);
  306. USART1->CR1 |= (USART_CR1_TE |USART_CR1_RE);
  307. USART1->BRR = 138;
  308. /* USART1 Enable */
  309. USART1->CR1 |= USART_CR1_UE;
  310. /* Polling USART1 initialisation */
  311. while((!(USART1->ISR & USART_ISR_TEACK)) || (!(USART1->ISR & USART_ISR_REACK)))
  312. {
  313. }
  314. }