board.c 21 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747
  1. #include "board.h"
  2. /* private defines */
  3. #define SPI_BUFFER_SIZE 5
  4. /* private variables */
  5. /**
  6. * Nixi Tube cathodes map in Byte Array:
  7. * {E0 E9 E8 E7 E6 E5 E4 E3}
  8. * {E2 E1 D0 D9 D8 D7 D6 D5}
  9. * {D4 D3 D2 D1 B0 B9 B8 B7}
  10. * {B6 B5 B4 B3 B2 B1 A0 A9}
  11. * {A8 A7 A6 A5 A4 A3 A2 A1}
  12. *
  13. * Shift register bit map in Tube cathodes (from 0 to 1):
  14. * {5.7 5.6 5.5 5.4 5.3 5.2 5.1 5.0 4.7 4.6} VL5/E
  15. * {4.5 4.4 4.3 4.2 4.1 4.0 3.7 3.6 3.5 3.4} VL4/D
  16. * {3.3 3.2 3.1 3.0 2.7 2.6 2.5 2.4 2.3 2.2} VL2/B
  17. * {2.1 2.0 1.7 1.6 1.5 1.4 1.3 1.2 1.1 1.0} VL1/A
  18. */
  19. static const uint16_t nixieCathodeMap[4][10] = {
  20. {0x8000, 0x0040, 0x0080, 0x0100, 0x0200, 0x0400, 0x0800, 0x1000, 0x2000, 0x4000},
  21. {0x2000, 0x0010, 0x0020, 0x0040, 0x0080, 0x0100, 0x0200, 0x0400, 0x0800, 0x1000},
  22. {0x0800, 0x0004, 0x0008, 0x0010, 0x0020, 0x0040, 0x0080, 0x0100, 0x0200, 0x0400},
  23. {0x0200, 0x0001, 0x0002, 0x0004, 0x0008, 0x0010, 0x0020, 0x0040, 0x0080, 0x0100}
  24. };
  25. //static const uint8_t nixieCathodeMask[4][2] = {{0x00, 0x3f}, {0xc0, 0x0f}, {0xf0, 0x03}, {0xc0, 0x00}};
  26. static uint8_t tubesBuffer[SPI_BUFFER_SIZE] = {0};
  27. //convert linear bright level to logariphmic
  28. const uint8_t cie[8] = { 0, 5, 14, 33, 64, 109, 172, 255 };
  29. /* private typedef */
  30. /* private functions */
  31. static void _show_digits(const uint32_t digits);
  32. static void GPIO_Init(void);
  33. static void DMA_Init(void);
  34. static void I2C1_Init(void);
  35. static void SPI1_Init(void);
  36. static void TIM1_Init(void);
  37. static void TIM3_Init(void);
  38. static void TIM14_Init(void);
  39. static void TIM16_Init(void);
  40. static void TIM17_Init(void);
  41. static void USART1_UART_Init(void);
  42. /* Board perephireal Configuration */
  43. void Board_Init(void)
  44. {
  45. /* Main peripheral clock enable */
  46. RCC->APBENR1 = (RCC_APBENR1_PWREN | RCC_APBENR1_I2C1EN | RCC_APBENR1_TIM3EN);
  47. RCC->APBENR2 = (RCC_APBENR2_SYSCFGEN | RCC_APBENR2_SPI1EN | RCC_APBENR2_TIM1EN);
  48. /* GPIO Ports Clock Enable */
  49. RCC->IOPENR = (RCC_IOPENR_GPIOAEN | RCC_IOPENR_GPIOBEN | RCC_IOPENR_GPIOCEN);
  50. /* Peripheral interrupt init*/
  51. /* RCC_IRQn interrupt configuration */
  52. NVIC_SetPriority(RCC_IRQn, 0);
  53. NVIC_EnableIRQ(RCC_IRQn);
  54. /* Configure the system clock */
  55. SystemClock_Config();
  56. /* Processor uses sleep as its low power mode */
  57. SCB->SCR &= ~((uint32_t)SCB_SCR_SLEEPDEEP_Msk);
  58. /* DisableSleepOnExit */
  59. SCB->SCR &= ~((uint32_t)SCB_SCR_SLEEPONEXIT_Msk);
  60. /* Initialize all configured peripherals */
  61. GPIO_Init();
  62. DMA_Init();
  63. I2C1_Init();
  64. SPI1_Init();
  65. /** Star SPI transfer to shift registers */
  66. /* Set DMA source and destination addresses. */
  67. /* Source: Address of the SPI buffer. */
  68. DMA1_Channel1->CMAR = (uint32_t)&tubesBuffer;
  69. /* Destination: SPI1 data register. */
  70. DMA1_Channel1->CPAR = (uint32_t)&(SPI1->DR);
  71. /* Set DMA data transfer length (SPI buffer length). */
  72. DMA1_Channel1->CNDTR = SPI_BUFFER_SIZE;
  73. /* Enable SPI transfer */
  74. SPI1->CR1 |= SPI_CR1_SPE;
  75. Flag.SPI_TX_End = 1;
  76. /* Enable tube power */
  77. TUBE_PWR_ON;
  78. /* display work now */
  79. /* Start RGB & Tube Power PWM */
  80. TIM1_Init();
  81. TIM3_Init();
  82. //TIM14_Init();
  83. //TIM16_Init();
  84. //TIM17_Init();
  85. //USART1_UART_Init();
  86. }
  87. /**
  88. * @brief Out digits to SPI buffer. ON/off tube power.
  89. * @param : array with four BCD digits
  90. * @retval : None
  91. */
  92. void showDigits(tube4_t dig)
  93. {
  94. static uint32_t old_dig = 0;
  95. uint8_t st = 0, ov = FADE_START;
  96. if (old_dig == dig.u32) {
  97. _show_digits(dig.u32);
  98. } else {
  99. while (ov < FADE_STOP) {
  100. if (st == 0) {
  101. // new tube value
  102. st = 1;
  103. _show_digits(dig.u32);
  104. ov += FADE_STEP;
  105. tdelay_ms(ov);
  106. } else {
  107. // old tube value
  108. st = 0;
  109. _show_digits(old_dig);
  110. tdelay_ms(FADE_STOP - ov);
  111. }
  112. } // End of while
  113. old_dig = dig.u32;
  114. } // End of if-else
  115. }
  116. static void _show_digits(const uint32_t digits)
  117. {
  118. tube4_t dig;
  119. dig.u32 = digits;
  120. /* Clear buffer */
  121. tubesBuffer[0] = 0;
  122. tubesBuffer[1] = 0;
  123. tubesBuffer[2] = 0;
  124. tubesBuffer[3] = 0;
  125. tubesBuffer[4] = 0;
  126. /* check values range */
  127. int i;
  128. for (i=0; i<4; i++) {
  129. if (dig.ar[i] > 9) {
  130. if (dig.ar[i] != 0xf) {
  131. dig.ar[i] = 0;
  132. }
  133. }
  134. }
  135. /* Wait for SPI */
  136. while (Flag.SPI_TX_End == 0);
  137. Flag.SPI_TX_End = 0;
  138. /* Feel buffer */
  139. tubesBuffer[0] = (uint8_t)(nixieCathodeMap[Tube_E][dig.s8.tE] >> 8);
  140. tubesBuffer[1] = (uint8_t)((nixieCathodeMap[Tube_E][dig.s8.tE]) | (nixieCathodeMap[Tube_D][dig.s8.tD] >> 8));
  141. tubesBuffer[2] = (uint8_t)((nixieCathodeMap[Tube_D][dig.s8.tD]) | (nixieCathodeMap[Tube_B][dig.s8.tB] >> 8));
  142. tubesBuffer[3] = (uint8_t)((nixieCathodeMap[Tube_B][dig.s8.tB]) | (nixieCathodeMap[Tube_A][dig.s8.tA] >> 8));
  143. tubesBuffer[4] = (uint8_t)(nixieCathodeMap[Tube_A][dig.s8.tA]);
  144. /* Start DMA transfer to SPI */
  145. DMA1_Channel1->CCR |= DMA_CCR_EN;
  146. /* On/Off tube power */
  147. for (i=0; i<4; i++) {
  148. if (dig.ar[i] == 0xf) {
  149. tube_PowerOff((tube_pos_t)i);
  150. } else {
  151. tube_PowerOn((tube_pos_t)i);
  152. }
  153. }
  154. }
  155. /**
  156. * @brief HSV to RGB convertion
  157. * @param hue: 0-59, sat: 0-255, val (lightness): 0-255
  158. * @return none. RGB value out direct to LED.
  159. */
  160. void HSV2LED(const uint8_t hue, const uint8_t sat, const uint8_t val) {
  161. int base;
  162. uint8_t r=0, g=0, b=0;
  163. if (sat == 0)
  164. { // Achromatic color (gray).
  165. r = val;
  166. g = val;
  167. b = val;
  168. } else {
  169. base = ((255 - sat) * val) >> 8;
  170. switch (hue / 10) {
  171. case 0:
  172. r = val;
  173. g = (((val - base) * hue) / 10) + base;
  174. b = base;
  175. break;
  176. case 1:
  177. r = (((val - base) * (10 - (hue % 10))) / 10) + base;
  178. g = val;
  179. b = base;
  180. break;
  181. case 2:
  182. r = base;
  183. g = val;
  184. b = (((val - base) * (hue % 10)) / 10) + base;
  185. break;
  186. case 3:
  187. r = base;
  188. g = (((val - base) * (10 - (hue % 10))) / 10) + base;
  189. b = val;
  190. break;
  191. case 4:
  192. r = (((val - base) * (hue % 10)) / 10) + base;
  193. g = base;
  194. b = val;
  195. break;
  196. case 5:
  197. r = val;
  198. g = base;
  199. b = (((val - base) * (10 - (hue % 10))) / 10) + base;
  200. break;
  201. }
  202. }
  203. COLOR_R(r);
  204. COLOR_G(g);
  205. COLOR_B(b);
  206. }
  207. void tube_PowerOn(tube_pos_t tube)
  208. {
  209. switch (tube) {
  210. case Tube_A:
  211. TUBE_A_ON;
  212. break;
  213. case Tube_B:
  214. TUBE_B_ON;
  215. break;
  216. case Tube_D:
  217. TUBE_D_ON;
  218. break;
  219. case Tube_E:
  220. TUBE_E_ON;
  221. break;
  222. default:
  223. break;
  224. }
  225. }
  226. void tube_PowerOff(tube_pos_t tube)
  227. {
  228. switch (tube) {
  229. case Tube_A:
  230. TUBE_A_OFF;
  231. break;
  232. case Tube_B:
  233. TUBE_B_OFF;
  234. break;
  235. case Tube_D:
  236. TUBE_D_OFF;
  237. break;
  238. case Tube_E:
  239. TUBE_E_OFF;
  240. break;
  241. default:
  242. break;
  243. }
  244. }
  245. /**
  246. * @brief System Clock Configuration
  247. * @retval None
  248. */
  249. void SystemClock_Config(void)
  250. {
  251. /* HSI configuration and activation */
  252. RCC->CR |= RCC_CR_HSION; // Enable HSI
  253. while((RCC->CR & RCC_CR_HSIRDY) == 0);
  254. /* Main PLL configuration and activation */
  255. //RCC->PLLCFGR &= ~(RCC_PLLCFGR_PLLSRC | RCC_PLLCFGR_PLLM | RCC_PLLCFGR_PLLN | RCC_PLLCFGR_PLLR);
  256. RCC->PLLCFGR = (RCC_PLLCFGR_PLLSRC_HSI | RCC_PLLCFGR_PLLM_0 | (9 << RCC_PLLCFGR_PLLN_Pos) | RCC_PLLCFGR_PLLR_1);
  257. RCC->PLLCFGR |= RCC_PLLCFGR_PLLREN; // RCC_PLL_EnableDomain_SYS
  258. RCC->CR |= RCC_CR_PLLON; // RCC_PLL_Enable
  259. while((RCC->CR & RCC_CR_PLLRDY) == 0);
  260. /* Sysclk activation on the main PLL */
  261. RCC->CFGR &= RCC_CFGR_SW;
  262. RCC->CFGR |= RCC_CFGR_SW_1;
  263. while((RCC->CFGR & RCC_CFGR_SWS) != RCC_CFGR_SWS_1);
  264. /* Update CMSIS variable (which can be updated also through SystemCoreClockUpdate function) */
  265. SystemCoreClock = 24000000;
  266. /* Set I2C Clock Source */
  267. RCC->CCIPR &= ~(RCC_CCIPR_I2C1SEL);
  268. RCC->CCIPR |= RCC_CCIPR_I2C1SEL_1;
  269. }
  270. /**
  271. * @brief GPIO Initialization Function
  272. * @param None
  273. * @retval None
  274. */
  275. static void GPIO_Init(void)
  276. {
  277. /* EXTI Line: falling, no pull, input */
  278. // interrupt on line 14
  279. EXTI->IMR1 |= EXTI_IMR1_IM14;
  280. // wake-up with event ?
  281. //EXTI->EMR1 |= EXTI_EMR1_EM14;
  282. // TRIGGER FALLING
  283. EXTI->FTSR1 = EXTI_FTSR1_FT14;
  284. // external interrupt selection - PC14 to EXTI14
  285. EXTI->EXTICR[3] = EXTI_EXTICR4_EXTI14_1;
  286. /* EXTI interrupt init*/
  287. NVIC_SetPriority(EXTI4_15_IRQn, 0);
  288. NVIC_EnableIRQ(EXTI4_15_IRQn);
  289. /* set GPIO modes */
  290. GPIO_SetPinMode(IRQ_GPIO_Port, IRQ_Pin, GPIO_MODE_IN);
  291. GPIO_SetPinPull(IRQ_GPIO_Port, IRQ_Pin, GPIO_PUPDR_UP);
  292. /* L0, L1, L2, L3 - IN-15 symbols control, PP out, high speed, pull down */
  293. GPIO_SetPinMode(LC0_GPIO_Port, LC0_Pin, GPIO_MODE_OUT);
  294. GPIO_SetPinSpeed(LC0_GPIO_Port, LC0_Pin, GPIO_OSPEED_HI);
  295. GPIO_SetPinPull(LC0_GPIO_Port, LC0_Pin, GPIO_PUPDR_DW);
  296. GPIO_SetPinMode(LC1_GPIO_Port, LC1_Pin, GPIO_MODE_OUT);
  297. GPIO_SetPinSpeed(LC1_GPIO_Port, LC1_Pin, GPIO_OSPEED_HI);
  298. GPIO_SetPinPull(LC1_GPIO_Port, LC1_Pin, GPIO_PUPDR_DW);
  299. GPIO_SetPinMode(LC2_GPIO_Port, LC2_Pin, GPIO_MODE_OUT);
  300. GPIO_SetPinSpeed(LC2_GPIO_Port, LC2_Pin, GPIO_OSPEED_HI);
  301. GPIO_SetPinPull(LC2_GPIO_Port, LC2_Pin, GPIO_PUPDR_DW);
  302. GPIO_SetPinMode(LC3_GPIO_Port, LC3_Pin, GPIO_MODE_OUT);
  303. GPIO_SetPinSpeed(LC3_GPIO_Port, LC3_Pin, GPIO_OSPEED_HI);
  304. GPIO_SetPinPull(LC3_GPIO_Port, LC3_Pin, GPIO_PUPDR_DW);
  305. /* Pwer Shutdown: PP out, high speed, pull down */
  306. GPIO_SetPinMode(SHDN_GPIO_Port, SHDN_Pin, GPIO_MODE_OUT);
  307. GPIO_SetPinSpeed(SHDN_GPIO_Port, SHDN_Pin, GPIO_OSPEED_HI);
  308. GPIO_SetPinPull(SHDN_GPIO_Port, SHDN_Pin, GPIO_PUPDR_DW);
  309. /* SPI Latch: OD out, high speed, no pull */
  310. GPIO_SetPinMode(Latch_GPIO_Port, Latch_Pin, GPIO_MODE_OUT);
  311. GPIO_SetPinOutputType(Latch_GPIO_Port, Latch_Pin, GPIO_OTYPE_OD);
  312. GPIO_SetPinSpeed(Latch_GPIO_Port, Latch_Pin, GPIO_OSPEED_HI);
  313. /* UART_Enable: PP out, low speed, no pull*/
  314. GPIO_SetPinMode(UART_EN_GPIO_Port, UART_EN_Pin, GPIO_MODE_OUT);
  315. /* UART_State: input, pull up */
  316. GPIO_SetPinPull(UART_ST_GPIO_Port, UART_ST_Pin, GPIO_PUPDR_UP);
  317. GPIO_SetPinMode(UART_ST_GPIO_Port, UART_ST_Pin, GPIO_MODE_IN);
  318. /* BTN1, BTN2, BTN3, BTN4: input, pull up */
  319. GPIO_SetPinPull(BTN1_GPIO_Port, BTN1_Pin, GPIO_PUPDR_UP);
  320. GPIO_SetPinMode(BTN1_GPIO_Port, BTN1_Pin, GPIO_MODE_IN);
  321. GPIO_SetPinPull(BTN2_GPIO_Port, BTN2_Pin, GPIO_PUPDR_UP);
  322. GPIO_SetPinMode(BTN2_GPIO_Port, BTN2_Pin, GPIO_MODE_IN);
  323. GPIO_SetPinPull(BTN3_GPIO_Port, BTN3_Pin, GPIO_PUPDR_UP);
  324. GPIO_SetPinMode(BTN4_GPIO_Port, BTN3_Pin, GPIO_MODE_IN);
  325. GPIO_SetPinPull(BTN4_GPIO_Port, BTN4_Pin, GPIO_PUPDR_UP);
  326. GPIO_SetPinMode(BTN4_GPIO_Port, BTN4_Pin, GPIO_MODE_IN);
  327. }
  328. /**
  329. * Enable DMA controller clock
  330. */
  331. static void DMA_Init(void)
  332. {
  333. /* DMA controller clock enable */
  334. RCC->AHBENR |= RCC_AHBENR_DMA1EN;
  335. /* enable DMA1 clock in Sleep/Stop mode */
  336. //RCC->AHBSMENR |= RCC_AHBSMENR_DMA1SMEN;
  337. /* DMA interrupt init */
  338. /* DMA1_Channel1_IRQn interrupt configuration */
  339. NVIC_SetPriority(DMA1_Channel1_IRQn, 0);
  340. NVIC_EnableIRQ(DMA1_Channel1_IRQn);
  341. /* DMA1_Channel2_3_IRQn interrupt configuration */
  342. NVIC_SetPriority(DMA1_Channel2_3_IRQn, 0);
  343. NVIC_EnableIRQ(DMA1_Channel2_3_IRQn);
  344. }
  345. /**
  346. * @brief I2C1 Initialization Function
  347. * @param None
  348. * @retval None
  349. */
  350. static void I2C1_Init(void)
  351. {
  352. /** I2C1 GPIO Configuration
  353. PB8 ------> I2C1_SCL
  354. PB9 ------> I2C1_SDA
  355. */
  356. GPIO_SetPinMode(GPIOB, GPIO_PIN_8, GPIO_MODE_AFF);
  357. GPIO_SetPinOutputType(GPIOB, GPIO_PIN_8, GPIO_OTYPE_OD);
  358. GPIO_SetPinSpeed(GPIOB, GPIO_PIN_8, GPIO_OSPEED_HI);
  359. GPIO_SetPinPull(GPIOB, GPIO_PIN_8, GPIO_PUPDR_UP);
  360. GPIO_SetAFPin_8_15(GPIOB, GPIO_PIN_8, GPIO_AF_6);
  361. GPIO_SetPinMode(GPIOB, GPIO_PIN_9, GPIO_MODE_AFF);
  362. GPIO_SetPinOutputType(GPIOB, GPIO_PIN_9, GPIO_OTYPE_OD);
  363. GPIO_SetPinSpeed(GPIOB, GPIO_PIN_9, GPIO_OSPEED_HI);
  364. GPIO_SetPinPull(GPIOB, GPIO_PIN_9, GPIO_PUPDR_UP);
  365. GPIO_SetAFPin_8_15(GPIOB, GPIO_PIN_9, GPIO_AF_6);
  366. /** I2C1 DMA Init */
  367. /* I2C1_RX Init: Priority medium, Memory increment, read from perephireal,
  368. transfer error interrupt enable, transfer complete interrupt enable */
  369. DMA1_Channel2->CCR = (DMA_CCR_PL_0 | DMA_CCR_MINC | DMA_CCR_TEIE | DMA_CCR_TCIE);
  370. /* Route DMA channel 2 to I2C1 RX */
  371. DMAMUX1_Channel1->CCR = 10;
  372. /* I2C1_TX Init: Priority medium, Memory increment, read from memory,
  373. transfer error interrupt enable, transfer complete interrupt enable */
  374. DMA1_Channel3->CCR = (DMA_CCR_PL_0 | DMA_CCR_MINC| DMA_CCR_DIR | DMA_CCR_TEIE | DMA_CCR_TCIE);
  375. /* Route DMA channel 3 to I2C1 TX */
  376. DMAMUX1_Channel2->CCR = 11;
  377. /** I2C Initialization: I2C_Fast */
  378. I2C1->TIMINGR = 0x0010061A;
  379. I2C1->CR2 = I2C_CR2_AUTOEND;
  380. I2C1->CR1 = I2C_CR1_PE;
  381. }
  382. /**
  383. * @brief SPI1 Initialization Function
  384. * @param None
  385. * @retval None
  386. */
  387. static void SPI1_Init(void)
  388. {
  389. /**SPI1 GPIO Configuration
  390. PB3 ------> SPI1_SCK
  391. PB5 ------> SPI1_MOSI
  392. */
  393. GPIO_SetPinMode(GPIOB, GPIO_PIN_3, GPIO_MODE_AFF);
  394. GPIO_SetPinOutputType(GPIOB, GPIO_PIN_3, GPIO_OTYPE_OD);
  395. GPIO_SetPinSpeed(GPIOB, GPIO_PIN_3, GPIO_OSPEED_HI);
  396. GPIO_SetPinMode(GPIOB, GPIO_PIN_5, GPIO_MODE_AFF);
  397. GPIO_SetPinOutputType(GPIOB, GPIO_PIN_5, GPIO_OTYPE_OD);
  398. GPIO_SetPinSpeed(GPIOB, GPIO_PIN_5, GPIO_OSPEED_HI);
  399. /* SPI1 DMA Init */
  400. /* SPI1_TX Init: Priority high, Memory increment, read from memory, circular mode,
  401. Enable DMA transfer complete/error interrupts */
  402. DMA1_Channel1->CCR = (DMA_CCR_PL_1 | DMA_CCR_MINC | DMA_CCR_CIRC | DMA_CCR_TEIE | DMA_CCR_DIR | DMA_CCR_TCIE);
  403. /* Route DMA channel 1 to SPI1 TX */
  404. DMAMUX1_Channel0->CCR = 0x11;
  405. /* SPI1 interrupt Init */
  406. NVIC_SetPriority(SPI1_IRQn, 0);
  407. NVIC_EnableIRQ(SPI1_IRQn);
  408. /* SPI1 parameter configuration: master mode, data 8 bit, divider = 16, TX DMA */
  409. SPI1->CR1 = (SPI_CR1_MSTR | SPI_CR1_BR_1 | SPI_CR1_BR_0 | SPI_CR1_SSM | SPI_CR1_SSI);
  410. SPI1->CR2 = (SPI_CR2_DS_2 | SPI_CR2_DS_1 | SPI_CR2_DS_0 | SPI_CR2_TXDMAEN | SPI_CR2_FRXTH);
  411. }
  412. /**
  413. * @brief TIM1 Initialization Function
  414. * @param None
  415. * @retval None
  416. */
  417. static void TIM1_Init(void)
  418. {
  419. /* target clock */
  420. TIM1->PSC = TIM1_PSC; // prescaler
  421. TIM1->ARR = TIM1_ARR; // auto reload value
  422. TIM1->CR1 = TIM_CR1_ARPE;
  423. // initial pwm value
  424. TIM1->CCR1 = PWM_TUBE_INIT_VAL;
  425. TIM1->CCR2 = PWM_LED_INIT_VAL;
  426. TIM1->CCR3 = PWM_LED_INIT_VAL;
  427. TIM1->CCR4 = PWM_LED_INIT_VAL;
  428. // pwm mode 1 for 4 chanels
  429. TIM1->CCMR1 = (TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC2M_1 | TIM_CCMR1_OC2M_2 | TIM_CCMR1_OC1PE | TIM_CCMR1_OC2PE);
  430. TIM1->CCMR2 = (TIM_CCMR2_OC3M_1 | TIM_CCMR2_OC3M_2 | TIM_CCMR2_OC4M_1 | TIM_CCMR2_OC4M_2 | TIM_CCMR2_OC3PE | TIM_CCMR2_OC4PE);
  431. // reset int flag - not needed, int unused
  432. //TIM1->SR |= TIM_SR_UIF;
  433. TIM1->BDTR = TIM_BDTR_MOE; // enable main output
  434. TIM1->EGR = TIM_EGR_UG; // force timer update
  435. /* TIM1 CC_EnableChannel */
  436. TIM1->CCER = (TIM_CCER_CC1E | TIM_CCER_CC2E | TIM_CCER_CC3E | TIM_CCER_CC4E);
  437. /* TIM_EnableCounter */
  438. TIM1->CR1 |= TIM_CR1_CEN;
  439. /** TIM1 GPIO Configuration
  440. PA8 ------> TIM1_CH1
  441. PA9 ------> TIM1_CH2
  442. PA10 ------> TIM1_CH3
  443. PA11 [PA9] ------> TIM1_CH4
  444. */
  445. GPIO_SetPinMode(PWM_1_GPIO_Port, PWM_1_Pin, GPIO_MODE_AFF);
  446. GPIO_SetPinSpeed(PWM_1_GPIO_Port, PWM_1_Pin, GPIO_OSPEED_HI);
  447. GPIO_SetPinPull(PWM_1_GPIO_Port, PWM_1_Pin, GPIO_PUPDR_DW);
  448. GPIO_SetAFPin_8_15(PWM_1_GPIO_Port, PWM_1_Pin, GPIO_AF_2);
  449. GPIO_SetPinMode(PWM_R_GPIO_Port, PWM_R_Pin, GPIO_MODE_AFF);
  450. GPIO_SetPinSpeed(PWM_R_GPIO_Port, PWM_R_Pin, GPIO_OSPEED_HI);
  451. GPIO_SetPinPull(PWM_R_GPIO_Port, PWM_R_Pin, GPIO_PUPDR_DW);
  452. GPIO_SetAFPin_8_15(PWM_R_GPIO_Port, PWM_R_Pin, GPIO_AF_2);
  453. GPIO_SetPinMode(PWM_B_GPIO_Port, PWM_B_Pin, GPIO_MODE_AFF);
  454. GPIO_SetPinSpeed(PWM_B_GPIO_Port, PWM_B_Pin, GPIO_OSPEED_HI);
  455. GPIO_SetPinPull(PWM_B_GPIO_Port, PWM_B_Pin, GPIO_PUPDR_DW);
  456. GPIO_SetAFPin_8_15(PWM_B_GPIO_Port, PWM_B_Pin, GPIO_AF_2);
  457. GPIO_SetPinMode(PWM_G_GPIO_Port, PWM_G_Pin, GPIO_MODE_AFF);
  458. GPIO_SetPinSpeed(PWM_G_GPIO_Port, PWM_G_Pin, GPIO_OSPEED_HI);
  459. GPIO_SetPinPull(PWM_G_GPIO_Port, PWM_G_Pin, GPIO_PUPDR_DW);
  460. GPIO_SetAFPin_8_15(PWM_G_GPIO_Port, PWM_G_Pin, GPIO_AF_2);
  461. }
  462. /**
  463. * @brief TIM3 Initialization Function
  464. * @param None
  465. * @retval None
  466. */
  467. static void TIM3_Init(void)
  468. {
  469. /* target clock */
  470. TIM3->PSC = TIM3_PSC; // prescaler
  471. TIM3->ARR = TIM3_ARR; // auto reload value
  472. TIM3->CR1 = TIM_CR1_ARPE;
  473. // initial pwm value
  474. TIM3->CCR1 = PWM_TUBE_INIT_VAL;
  475. TIM3->CCR2 = PWM_TUBE_INIT_VAL;
  476. TIM3->CCR3 = PWM_TUBE_INIT_VAL;
  477. TIM3->CCR4 = PWM_TUBE_INIT_VAL;
  478. // pwm mode 1 for 4 chanels
  479. TIM3->CCMR1 = (TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC2M_1 | TIM_CCMR1_OC2M_2 | TIM_CCMR1_OC1PE | TIM_CCMR1_OC2PE);
  480. TIM3->CCMR2 = (TIM_CCMR2_OC3M_1 | TIM_CCMR2_OC3M_2 | TIM_CCMR2_OC4M_1 | TIM_CCMR2_OC4M_2 | TIM_CCMR2_OC3PE | TIM_CCMR2_OC4PE);
  481. // launch timer
  482. TIM3->EGR = TIM_EGR_UG; // force timer update
  483. /* TIM3 TIM_CC_EnableChannel */
  484. TIM3->CCER = (TIM_CCER_CC1E | TIM_CCER_CC2E | TIM_CCER_CC3E | TIM_CCER_CC4E);
  485. /* TIM3 enable */
  486. TIM3->CR1 |= TIM_CR1_CEN;
  487. /**TIM3 GPIO Configuration
  488. PA6 ------> TIM3_CH1
  489. PA7 ------> TIM3_CH2
  490. PB0 ------> TIM3_CH3
  491. PB1 ------> TIM3_CH4
  492. */
  493. GPIO_SetPinMode(PWM_5_GPIO_Port, PWM_5_Pin, GPIO_MODE_AFF);
  494. GPIO_SetPinSpeed(PWM_5_GPIO_Port, PWM_5_Pin, GPIO_OSPEED_HI);
  495. GPIO_SetPinPull(PWM_5_GPIO_Port, PWM_5_Pin, GPIO_PUPDR_DW);
  496. GPIO_SetAFPin_0_7(PWM_5_GPIO_Port, PWM_5_Pin, GPIO_AF_1);
  497. GPIO_SetPinMode(PWM_4_GPIO_Port, PWM_4_Pin, GPIO_MODE_AFF);
  498. GPIO_SetPinSpeed(PWM_4_GPIO_Port, PWM_4_Pin, GPIO_OSPEED_HI);
  499. GPIO_SetPinPull(PWM_4_GPIO_Port, PWM_4_Pin, GPIO_PUPDR_DW);
  500. GPIO_SetAFPin_0_7(PWM_4_GPIO_Port, PWM_4_Pin, GPIO_AF_1);
  501. GPIO_SetPinMode(PWM_3_GPIO_Port, PWM_3_Pin, GPIO_MODE_AFF);
  502. GPIO_SetPinSpeed(PWM_3_GPIO_Port, PWM_3_Pin, GPIO_OSPEED_HI);
  503. GPIO_SetPinPull(PWM_3_GPIO_Port, PWM_3_Pin, GPIO_PUPDR_DW);
  504. GPIO_SetAFPin_0_7(PWM_3_GPIO_Port, PWM_3_Pin, GPIO_AF_1);
  505. GPIO_SetPinMode(PWM_2_GPIO_Port, PWM_2_Pin, GPIO_MODE_AFF);
  506. GPIO_SetPinSpeed(PWM_2_GPIO_Port, PWM_2_Pin, GPIO_OSPEED_HI);
  507. GPIO_SetPinPull(PWM_2_GPIO_Port, PWM_2_Pin, GPIO_PUPDR_DW);
  508. GPIO_SetAFPin_0_7(PWM_2_GPIO_Port, PWM_2_Pin, GPIO_AF_1);
  509. }
  510. /**
  511. * @brief TIM14 Initialization Function
  512. * @param None
  513. * @retval None
  514. * @desc "Блинкование" разрядами - 0,75/0,25 сек вкл/выкл.
  515. */
  516. static void TIM14_Init(void)
  517. {
  518. /* Peripheral clock enable */
  519. RCC->APBENR2 |= RCC_APBENR2_TIM14EN;
  520. /* TIM14 interrupt Init */
  521. NVIC_SetPriority(TIM14_IRQn, 0);
  522. NVIC_EnableIRQ(TIM14_IRQn);
  523. /* Set TIM14 for 1 sec period */
  524. TIM14->PSC = TIM14_PSC;
  525. TIM14->ARR = TIM14_ARR;
  526. /* Enable: Auto-reload preload, One-pulse mode, */
  527. TIM14->CR1 = (TIM_CR1_ARPE | TIM_CR1_OPM);
  528. /* OC or PWM? (for pwm - (TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_1) ) , Output compare 1 preload */
  529. TIM14->CCMR1 = (TIM_CCMR1_OC1M_0 | TIM_CCMR1_OC1PE);
  530. /* Enable Channel_1 or no needed ??? */
  531. TIM14->CCER = TIM_CCER_CC1E;
  532. /* Impulse value in msek */
  533. TIM14->CCR1 = TIM14_PULSE_VAL;
  534. /* Enable IRQ for Update end CaptureCompare envents or only CC ??? */
  535. //TIM14->DIER = (TIM_DIER_UIE | TIM_DIER_CC1IE);
  536. TIM14->DIER = TIM_DIER_CC1IE;
  537. }
  538. /**
  539. * На старте активируем все каналы, при совпадении отключаем (не)нужные.
  540. */
  541. void Blink_Start(void)
  542. {
  543. /* enable all channels */
  544. TUBE_ALL_ON;
  545. /* clear IRQ flag */
  546. TIM14->SR |= TIM_SR_CC1IF;
  547. /* clear counter value */
  548. TIM14->CNT = 0;
  549. /* enable timer */
  550. TIM14->CR1 |= TIM_CR1_CEN;
  551. }
  552. void Blink_Stop(void)
  553. {
  554. /* disable timer */
  555. TIM14->CR1 &= ~(TIM_CR1_CEN);
  556. /* On all tubes */
  557. TUBE_ALL_ON;
  558. }
  559. /**
  560. * @brief TIM16 Initialization Function
  561. * @param None
  562. * @retval None
  563. */
  564. static void TIM16_Init(void)
  565. {
  566. /* Peripheral clock enable */
  567. RCC->APBENR2 |= RCC_APBENR2_TIM16EN;
  568. /* TIM16 interrupt Init */
  569. NVIC_SetPriority(TIM16_IRQn, 0);
  570. NVIC_EnableIRQ(TIM16_IRQn);
  571. /* setup clock */
  572. TIM16->PSC = TIM16_PSC; // prescaler
  573. TIM16->ARR = TIM16_ARR; // auto reload value
  574. TIM16->CR1 = TIM_CR1_ARPE;
  575. // initial pwm value
  576. //TIM16->CCR1 = TIM16_PWM_VAL;
  577. // pwm mode 1 for 1 chanel
  578. TIM16->CCMR1 = (TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1PE);
  579. // reset int flag
  580. TIM16->SR |= TIM_SR_UIF;
  581. TIM16->BDTR = TIM_BDTR_MOE; // enable main output
  582. TIM16->EGR = TIM_EGR_UG; // force timer update
  583. /* TIM16 CC_EnableChannel */
  584. TIM16->CCER = TIM_CCER_CC1E;
  585. /* TIM_EnableCounter */
  586. TIM16->CR1 |= TIM_CR1_CEN;
  587. /* Enable IRQ */
  588. TIM16->DIER = TIM_DIER_UIE;
  589. }
  590. /**
  591. * @brief TIM17 Initialization Function
  592. * @param None
  593. * @retval None
  594. */
  595. static void TIM17_Init(void)
  596. {
  597. /* Peripheral clock enable */
  598. RCC->APBENR2 |= RCC_APBENR2_TIM17EN;
  599. /* TIM17 interrupt Init */
  600. NVIC_SetPriority(TIM17_IRQn, 0);
  601. NVIC_EnableIRQ(TIM17_IRQn);
  602. /* setup clock */
  603. TIM17->PSC = TIM17_PSC; // prescaler
  604. TIM17->ARR = TIM17_ARR; // auto reload value
  605. TIM17->CR1 = TIM_CR1_ARPE;
  606. // initial pwm value
  607. //TIM17->CCR1 = TIM17_PWM_VAL;
  608. // pwm mode 1 for 1 chanel
  609. TIM17->CCMR1 = (TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1PE);
  610. // reset int flag
  611. TIM17->SR |= TIM_SR_UIF;
  612. TIM17->BDTR = TIM_BDTR_MOE; // enable main output
  613. TIM17->EGR = TIM_EGR_UG; // force timer update
  614. /* TIM17 CC_EnableChannel */
  615. TIM17->CCER = TIM_CCER_CC1E;
  616. /* TIM_EnableCounter */
  617. TIM17->CR1 |= TIM_CR1_CEN;
  618. /* Enable IRQ */
  619. TIM17->DIER = TIM_DIER_UIE;
  620. }
  621. /**
  622. * @brief USART1 Initialization Function
  623. * @param None
  624. * @retval None
  625. */
  626. static void USART1_UART_Init(void)
  627. {
  628. /* Peripheral clock enable */
  629. RCC->APBENR2 |= RCC_APBENR2_USART1EN;
  630. /**USART1 GPIO Configuration
  631. PB6 ------> USART1_TX
  632. PB7 ------> USART1_RX
  633. */
  634. GPIO_SetPinMode(GPIOB, GPIO_PIN_6, GPIO_MODE_AFF);
  635. GPIO_SetPinSpeed(GPIOB, GPIO_PIN_6, GPIO_OSPEED_HI);
  636. GPIO_SetPinMode(GPIOB, GPIO_PIN_7, GPIO_MODE_AFF);
  637. GPIO_SetPinSpeed(GPIOB, GPIO_PIN_7, GPIO_OSPEED_HI);
  638. /* USART1 interrupt Init */
  639. NVIC_SetPriority(USART1_IRQn, 0);
  640. NVIC_EnableIRQ(USART1_IRQn);
  641. USART1->CR1 |= (USART_CR1_TE |USART_CR1_RE);
  642. USART1->BRR = 138;
  643. /* USART1 Enable */
  644. USART1->CR1 |= USART_CR1_UE;
  645. /* Polling USART1 initialisation */
  646. while((!(USART1->ISR & USART_ISR_TEACK)) || (!(USART1->ISR & USART_ISR_REACK)))
  647. {
  648. }
  649. }