board.c 23 KB

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  1. #include "board.h"
  2. /* private defines */
  3. #define SPI_BUFFER_SIZE 5
  4. /* private variables */
  5. /**
  6. * Nixi Tube cathodes map in Byte Array:
  7. * {E0 E9 E8 E7 E6 E5 E4 E3}
  8. * {E2 E1 D0 D9 D8 D7 D6 D5}
  9. * {D4 D3 D2 D1 B0 B9 B8 B7}
  10. * {B6 B5 B4 B3 B2 B1 A0 A9}
  11. * {A8 A7 A6 A5 A4 A3 A2 A1}
  12. *
  13. * Shift register bit map in Tube cathodes (from 0 to 1):
  14. * {5.7 5.6 5.5 5.4 5.3 5.2 5.1 5.0 4.7 4.6} VL5/E
  15. * {4.5 4.4 4.3 4.2 4.1 4.0 3.7 3.6 3.5 3.4} VL4/D
  16. * {3.3 3.2 3.1 3.0 2.7 2.6 2.5 2.4 2.3 2.2} VL2/B
  17. * {2.1 2.0 1.7 1.6 1.5 1.4 1.3 1.2 1.1 1.0} VL1/A
  18. */
  19. static const uint16_t nixieCathodeMap[4][11] = {
  20. {0x8000, 0x0040, 0x0080, 0x0100, 0x0200, 0x0400, 0x0800, 0x1000, 0x2000, 0x4000, 0x0000},
  21. {0x2000, 0x0010, 0x0020, 0x0040, 0x0080, 0x0100, 0x0200, 0x0400, 0x0800, 0x1000, 0x0000},
  22. {0x0800, 0x0004, 0x0008, 0x0010, 0x0020, 0x0040, 0x0080, 0x0100, 0x0200, 0x0400, 0x0000},
  23. {0x0200, 0x0001, 0x0002, 0x0004, 0x0008, 0x0010, 0x0020, 0x0040, 0x0080, 0x0100, 0x0000}
  24. };
  25. //static const uint8_t nixieCathodeMask[4][2] = {{0x00, 0x3f}, {0xc0, 0x0f}, {0xf0, 0x03}, {0xc0, 0x00}};
  26. static uint8_t tubesBuffer[SPI_BUFFER_SIZE] = {0};
  27. /* private typedef */
  28. /* private functions */
  29. static void _show_digits(const uint32_t digits);
  30. static void GPIO_Init(void);
  31. static void DMA_Init(void);
  32. static void I2C1_Init(void);
  33. static void SPI1_Init(void);
  34. static void TIM1_Init(void);
  35. static void TIM3_Init(void);
  36. static void TIM14_Init(void);
  37. static void TIM16_Init(void);
  38. static void TIM17_Init(void);
  39. static void USART1_UART_Init(void);
  40. /* Board perephireal Configuration */
  41. void Board_Init(void)
  42. {
  43. /* Main peripheral clock enable */
  44. RCC->APBENR1 = (RCC_APBENR1_PWREN | RCC_APBENR1_I2C1EN | RCC_APBENR1_TIM3EN);
  45. RCC->APBENR2 = (RCC_APBENR2_SYSCFGEN | RCC_APBENR2_SPI1EN | RCC_APBENR2_TIM1EN);
  46. /* GPIO Ports Clock Enable */
  47. RCC->IOPENR = (RCC_IOPENR_GPIOAEN | RCC_IOPENR_GPIOBEN | RCC_IOPENR_GPIOCEN);
  48. /* Peripheral interrupt init*/
  49. /* RCC_IRQn interrupt configuration */
  50. NVIC_SetPriority(RCC_IRQn, 0);
  51. NVIC_EnableIRQ(RCC_IRQn);
  52. /* Configure the system clock */
  53. SystemClock_Config();
  54. /* Processor uses sleep as its low power mode */
  55. SCB->SCR &= ~((uint32_t)SCB_SCR_SLEEPDEEP_Msk);
  56. /* DisableSleepOnExit */
  57. SCB->SCR &= ~((uint32_t)SCB_SCR_SLEEPONEXIT_Msk);
  58. /* Initialize all configured peripherals */
  59. GPIO_Init();
  60. DMA_Init();
  61. I2C1_Init();
  62. SPI1_Init();
  63. /** Star SPI transfer to shift registers */
  64. /* Set DMA source and destination addresses. */
  65. /* Source: Address of the SPI buffer. */
  66. DMA1_Channel1->CMAR = (uint32_t)&tubesBuffer;
  67. /* Destination: SPI1 data register. */
  68. DMA1_Channel1->CPAR = (uint32_t)&(SPI1->DR);
  69. /* Set DMA data transfer length (SPI buffer length). */
  70. DMA1_Channel1->CNDTR = SPI_BUFFER_SIZE;
  71. /* Enable SPI transfer */
  72. SPI1->CR1 |= SPI_CR1_SPE;
  73. Flag.SPI_TX_End = 1;
  74. /* Enable tube power */
  75. TUBE_PWR_ON;
  76. /* display work now */
  77. /* Start RGB & Tube Power PWM */
  78. TIM1_Init();
  79. TIM3_Init();
  80. /* Blink timer */
  81. TIM14_Init();
  82. //TIM16_Init();
  83. //TIM17_Init();
  84. //USART1_UART_Init();
  85. }
  86. /**
  87. * @brief Out digits to SPI buffer. ON/off tube power.
  88. * @param : array with four BCD digits
  89. * @retval : None
  90. */
  91. void showDigits(tube4_t dig)
  92. {
  93. static uint32_t old_dig = 0;
  94. uint8_t st = 0, ov = FADE_START;
  95. // if (old_dig == dig.u32) {
  96. // _show_digits(dig.u32);
  97. // } else {
  98. if (old_dig != dig.u32) {
  99. while (ov < FADE_STOP) {
  100. if (st == 0) {
  101. // new tube value
  102. st = 1;
  103. _show_digits(dig.u32);
  104. ov += FADE_STEP;
  105. tdelay_ms(ov);
  106. } else {
  107. // old tube value
  108. st = 0;
  109. _show_digits(old_dig);
  110. tdelay_ms(FADE_STOP - ov);
  111. }
  112. } // End of while
  113. old_dig = dig.u32;
  114. } // End of if-else
  115. }
  116. void lShiftDigits(const tube4_t old, const tube4_t dig) {
  117. uint32_t * buf;
  118. uint8_t sbuf[12];
  119. sbuf[0] = dig.ar[0];
  120. sbuf[1] = dig.ar[1];
  121. sbuf[2] = dig.ar[2];
  122. sbuf[3] = dig.ar[3];
  123. sbuf[4] = TUBE_BLANK;
  124. sbuf[5] = TUBE_BLANK;
  125. sbuf[6] = TUBE_BLANK;
  126. sbuf[7] = TUBE_BLANK;
  127. sbuf[8] = old.ar[0];
  128. sbuf[9] = old.ar[1];
  129. sbuf[10] = old.ar[2];
  130. sbuf[11] = old.ar[3];
  131. int i;
  132. for (i=8; i>=0; i--) {
  133. buf = (uint32_t *)&sbuf[i];
  134. _show_digits(*buf);
  135. tdelay_ms(100);
  136. }
  137. }
  138. void slideDigits(tube4_t dig) {
  139. tube4_t buf;
  140. const uint8_t pause = 100;;
  141. buf.s8.tA = TUBE_BLANK;
  142. buf.s8.tB = TUBE_BLANK;
  143. buf.s8.tD = TUBE_BLANK;
  144. buf.s8.tE = TUBE_BLANK;
  145. _show_digits(buf.u32);
  146. tdelay_ms(pause);
  147. buf.s8.tE = dig.s8.tA;
  148. _show_digits(buf.u32);
  149. tdelay_ms(pause);
  150. buf.s8.tD = dig.s8.tA;
  151. buf.s8.tE = dig.s8.tB;
  152. _show_digits(buf.u32);
  153. tdelay_ms(pause);
  154. buf.s8.tB = dig.s8.tA;
  155. buf.s8.tD = dig.s8.tB;
  156. buf.s8.tE = dig.s8.tD;
  157. _show_digits(buf.u32);
  158. tdelay_ms(pause);
  159. buf.s8.tA = dig.s8.tA;
  160. buf.s8.tB = dig.s8.tB;
  161. buf.s8.tD = dig.s8.tD;
  162. buf.s8.tE = dig.s8.tE;
  163. _show_digits(buf.u32);
  164. tdelay_ms(pause);
  165. buf.s8.tA = dig.s8.tB;
  166. buf.s8.tB = dig.s8.tD;
  167. buf.s8.tD = dig.s8.tE;
  168. buf.s8.tE = TUBE_BLANK;
  169. _show_digits(buf.u32);
  170. tdelay_ms(pause);
  171. buf.s8.tA = dig.s8.tD;
  172. buf.s8.tB = dig.s8.tE;
  173. buf.s8.tD = TUBE_BLANK;
  174. _show_digits(buf.u32);
  175. tdelay_ms(pause);
  176. buf.s8.tA = dig.s8.tE;
  177. buf.s8.tB = TUBE_BLANK;
  178. _show_digits(buf.u32);
  179. tdelay_ms(pause);
  180. buf.s8.tA = TUBE_BLANK;
  181. _show_digits(buf.u32);
  182. tdelay_ms(pause);
  183. }
  184. static void _show_digits(const uint32_t digits)
  185. {
  186. tube4_t dig;
  187. dig.u32 = digits;
  188. /* Clear buffer */
  189. tubesBuffer[0] = 0;
  190. tubesBuffer[1] = 0;
  191. tubesBuffer[2] = 0;
  192. tubesBuffer[3] = 0;
  193. tubesBuffer[4] = 0;
  194. /* check values range */
  195. int i;
  196. for (i=0; i<4; i++) {
  197. if (dig.ar[i] > 9) {
  198. if (dig.ar[i] != TUBE_BLANK) {
  199. dig.ar[i] = 0;
  200. }
  201. }
  202. }
  203. /* Wait for SPI */
  204. while (Flag.SPI_TX_End == 0);
  205. Flag.SPI_TX_End = 0;
  206. /* Feel buffer */
  207. tubesBuffer[0] = (uint8_t)(nixieCathodeMap[Tube_E][dig.s8.tE] >> 8);
  208. tubesBuffer[1] = (uint8_t)((nixieCathodeMap[Tube_E][dig.s8.tE]) | (nixieCathodeMap[Tube_D][dig.s8.tD] >> 8));
  209. tubesBuffer[2] = (uint8_t)((nixieCathodeMap[Tube_D][dig.s8.tD]) | (nixieCathodeMap[Tube_B][dig.s8.tB] >> 8));
  210. tubesBuffer[3] = (uint8_t)((nixieCathodeMap[Tube_B][dig.s8.tB]) | (nixieCathodeMap[Tube_A][dig.s8.tA] >> 8));
  211. tubesBuffer[4] = (uint8_t)(nixieCathodeMap[Tube_A][dig.s8.tA]);
  212. /* Start DMA transfer to SPI */
  213. DMA1_Channel1->CCR |= DMA_CCR_EN;
  214. /* On/Off tube power */
  215. for (i=0; i<4; i++) {
  216. if (dig.ar[i] == TUBE_BLANK) {
  217. tube_PowerOff((tube_pos_t)i);
  218. } else {
  219. tube_PowerOn((tube_pos_t)i);
  220. }
  221. }
  222. }
  223. void tube_PowerOn(tube_pos_t tube)
  224. {
  225. switch (tube) {
  226. case Tube_A:
  227. TUBE_A_ON;
  228. break;
  229. case Tube_B:
  230. TUBE_B_ON;
  231. break;
  232. case Tube_D:
  233. TUBE_D_ON;
  234. break;
  235. case Tube_E:
  236. TUBE_E_ON;
  237. break;
  238. case Tube_All:
  239. TUBE_ALL_ON;
  240. break;
  241. default:
  242. break;
  243. }
  244. }
  245. void tube_PowerOff(tube_pos_t tube)
  246. {
  247. switch (tube) {
  248. case Tube_A:
  249. TUBE_A_OFF;
  250. break;
  251. case Tube_B:
  252. TUBE_B_OFF;
  253. break;
  254. case Tube_D:
  255. TUBE_D_OFF;
  256. break;
  257. case Tube_E:
  258. TUBE_E_OFF;
  259. break;
  260. case Tube_All:
  261. TUBE_ALL_OFF;
  262. break;
  263. default:
  264. break;
  265. }
  266. }
  267. void tube_BrightLevel(tube_pos_t tube, uint8_t bright)
  268. {
  269. switch (tube) {
  270. case Tube_A:
  271. TUBE_A_BRIGHT(bright);
  272. break;
  273. case Tube_B:
  274. TUBE_B_BRIGHT(bright);
  275. break;
  276. case Tube_C:
  277. TUBE_C_BRIGHT(bright);
  278. break;
  279. case Tube_D:
  280. TUBE_D_BRIGHT(bright);
  281. break;
  282. case Tube_E:
  283. TUBE_E_BRIGHT(bright);
  284. break;
  285. case Tube_All:
  286. TUBES_BRIGHT(bright);
  287. break;
  288. default:
  289. break;
  290. }
  291. }
  292. /**
  293. * @brief System Clock Configuration
  294. * @retval None
  295. */
  296. void SystemClock_Config(void)
  297. {
  298. /* HSI configuration and activation */
  299. RCC->CR |= RCC_CR_HSION; // Enable HSI
  300. while((RCC->CR & RCC_CR_HSIRDY) == 0);
  301. /* Main PLL configuration and activation */
  302. //RCC->PLLCFGR &= ~(RCC_PLLCFGR_PLLSRC | RCC_PLLCFGR_PLLM | RCC_PLLCFGR_PLLN | RCC_PLLCFGR_PLLR);
  303. RCC->PLLCFGR = (RCC_PLLCFGR_PLLSRC_HSI | RCC_PLLCFGR_PLLM_0 | (9 << RCC_PLLCFGR_PLLN_Pos) | RCC_PLLCFGR_PLLR_1);
  304. RCC->PLLCFGR |= RCC_PLLCFGR_PLLREN; // RCC_PLL_EnableDomain_SYS
  305. RCC->CR |= RCC_CR_PLLON; // RCC_PLL_Enable
  306. while((RCC->CR & RCC_CR_PLLRDY) == 0);
  307. /* Sysclk activation on the main PLL */
  308. RCC->CFGR &= RCC_CFGR_SW;
  309. RCC->CFGR |= RCC_CFGR_SW_1;
  310. while((RCC->CFGR & RCC_CFGR_SWS) != RCC_CFGR_SWS_1);
  311. /* Update CMSIS variable (which can be updated also through SystemCoreClockUpdate function) */
  312. SystemCoreClock = 24000000;
  313. /* Set I2C Clock Source */
  314. RCC->CCIPR &= ~(RCC_CCIPR_I2C1SEL);
  315. RCC->CCIPR |= RCC_CCIPR_I2C1SEL_1;
  316. }
  317. /**
  318. * @brief GPIO Initialization Function
  319. * @param None
  320. * @retval None
  321. */
  322. static void GPIO_Init(void)
  323. {
  324. /* EXTI Line: falling, no pull, input */
  325. // interrupt on line 14
  326. EXTI->IMR1 |= EXTI_IMR1_IM14;
  327. // wake-up with event ?
  328. //EXTI->EMR1 |= EXTI_EMR1_EM14;
  329. // TRIGGER FALLING
  330. EXTI->FTSR1 = EXTI_FTSR1_FT14;
  331. // external interrupt selection - PC14 to EXTI14
  332. EXTI->EXTICR[3] = EXTI_EXTICR4_EXTI14_1;
  333. /* EXTI interrupt init*/
  334. NVIC_SetPriority(EXTI4_15_IRQn, 0);
  335. NVIC_EnableIRQ(EXTI4_15_IRQn);
  336. /* set GPIO modes */
  337. GPIO_SetPinMode(IRQ_GPIO_Port, IRQ_Pin, GPIO_MODE_IN);
  338. GPIO_SetPinPull(IRQ_GPIO_Port, IRQ_Pin, GPIO_PUPDR_UP);
  339. /* L0, L1, L2, L3 - IN-15 symbols control, PP out, high speed, pull down */
  340. GPIO_SetPinMode(LC0_GPIO_Port, LC0_Pin, GPIO_MODE_OUT);
  341. GPIO_SetPinSpeed(LC0_GPIO_Port, LC0_Pin, GPIO_OSPEED_HI);
  342. GPIO_SetPinPull(LC0_GPIO_Port, LC0_Pin, GPIO_PUPDR_DW);
  343. GPIO_SetPinMode(LC1_GPIO_Port, LC1_Pin, GPIO_MODE_OUT);
  344. GPIO_SetPinSpeed(LC1_GPIO_Port, LC1_Pin, GPIO_OSPEED_HI);
  345. GPIO_SetPinPull(LC1_GPIO_Port, LC1_Pin, GPIO_PUPDR_DW);
  346. GPIO_SetPinMode(LC2_GPIO_Port, LC2_Pin, GPIO_MODE_OUT);
  347. GPIO_SetPinSpeed(LC2_GPIO_Port, LC2_Pin, GPIO_OSPEED_HI);
  348. GPIO_SetPinPull(LC2_GPIO_Port, LC2_Pin, GPIO_PUPDR_DW);
  349. GPIO_SetPinMode(LC3_GPIO_Port, LC3_Pin, GPIO_MODE_OUT);
  350. GPIO_SetPinSpeed(LC3_GPIO_Port, LC3_Pin, GPIO_OSPEED_HI);
  351. GPIO_SetPinPull(LC3_GPIO_Port, LC3_Pin, GPIO_PUPDR_DW);
  352. /* Pwer Shutdown: PP out, high speed, pull down */
  353. GPIO_SetPinMode(SHDN_GPIO_Port, SHDN_Pin, GPIO_MODE_OUT);
  354. GPIO_SetPinSpeed(SHDN_GPIO_Port, SHDN_Pin, GPIO_OSPEED_HI);
  355. GPIO_SetPinPull(SHDN_GPIO_Port, SHDN_Pin, GPIO_PUPDR_DW);
  356. /* SPI Latch: OD out, high speed, no pull */
  357. GPIO_SetPinMode(Latch_GPIO_Port, Latch_Pin, GPIO_MODE_OUT);
  358. GPIO_SetPinOutputType(Latch_GPIO_Port, Latch_Pin, GPIO_OTYPE_OD);
  359. GPIO_SetPinSpeed(Latch_GPIO_Port, Latch_Pin, GPIO_OSPEED_HI);
  360. /* UART_Enable: PP out, low speed, no pull*/
  361. GPIO_SetPinMode(UART_EN_GPIO_Port, UART_EN_Pin, GPIO_MODE_OUT);
  362. /* UART_State: input, pull up */
  363. GPIO_SetPinPull(UART_ST_GPIO_Port, UART_ST_Pin, GPIO_PUPDR_UP);
  364. GPIO_SetPinMode(UART_ST_GPIO_Port, UART_ST_Pin, GPIO_MODE_IN);
  365. /* BTN1, BTN2, BTN3, BTN4: input, pull up */
  366. GPIO_SetPinPull(BTN1_GPIO_Port, BTN1_Pin, GPIO_PUPDR_UP);
  367. GPIO_SetPinMode(BTN1_GPIO_Port, BTN1_Pin, GPIO_MODE_IN);
  368. GPIO_SetPinPull(BTN2_GPIO_Port, BTN2_Pin, GPIO_PUPDR_UP);
  369. GPIO_SetPinMode(BTN2_GPIO_Port, BTN2_Pin, GPIO_MODE_IN);
  370. GPIO_SetPinPull(BTN3_GPIO_Port, BTN3_Pin, GPIO_PUPDR_UP);
  371. GPIO_SetPinMode(BTN3_GPIO_Port, BTN3_Pin, GPIO_MODE_IN);
  372. GPIO_SetPinPull(BTN4_GPIO_Port, BTN4_Pin, GPIO_PUPDR_UP);
  373. GPIO_SetPinMode(BTN4_GPIO_Port, BTN4_Pin, GPIO_MODE_IN);
  374. }
  375. /**
  376. * Enable DMA controller clock
  377. */
  378. static void DMA_Init(void)
  379. {
  380. /* DMA controller clock enable */
  381. RCC->AHBENR |= RCC_AHBENR_DMA1EN;
  382. /* enable DMA1 clock in Sleep/Stop mode */
  383. //RCC->AHBSMENR |= RCC_AHBSMENR_DMA1SMEN;
  384. /* DMA interrupt init */
  385. /* DMA1_Channel1_IRQn interrupt configuration */
  386. NVIC_SetPriority(DMA1_Channel1_IRQn, 0);
  387. NVIC_EnableIRQ(DMA1_Channel1_IRQn);
  388. /* DMA1_Channel2_3_IRQn interrupt configuration */
  389. NVIC_SetPriority(DMA1_Channel2_3_IRQn, 0);
  390. NVIC_EnableIRQ(DMA1_Channel2_3_IRQn);
  391. }
  392. /**
  393. * @brief I2C1 Initialization Function
  394. * @param None
  395. * @retval None
  396. */
  397. static void I2C1_Init(void)
  398. {
  399. /** I2C1 GPIO Configuration
  400. PB8 ------> I2C1_SCL
  401. PB9 ------> I2C1_SDA
  402. */
  403. GPIO_SetPinMode(GPIOB, GPIO_PIN_8, GPIO_MODE_AFF);
  404. GPIO_SetPinOutputType(GPIOB, GPIO_PIN_8, GPIO_OTYPE_OD);
  405. GPIO_SetPinSpeed(GPIOB, GPIO_PIN_8, GPIO_OSPEED_HI);
  406. GPIO_SetPinPull(GPIOB, GPIO_PIN_8, GPIO_PUPDR_UP);
  407. GPIO_SetAFPin_8_15(GPIOB, GPIO_PIN_8, GPIO_AF_6);
  408. GPIO_SetPinMode(GPIOB, GPIO_PIN_9, GPIO_MODE_AFF);
  409. GPIO_SetPinOutputType(GPIOB, GPIO_PIN_9, GPIO_OTYPE_OD);
  410. GPIO_SetPinSpeed(GPIOB, GPIO_PIN_9, GPIO_OSPEED_HI);
  411. GPIO_SetPinPull(GPIOB, GPIO_PIN_9, GPIO_PUPDR_UP);
  412. GPIO_SetAFPin_8_15(GPIOB, GPIO_PIN_9, GPIO_AF_6);
  413. /** I2C1 DMA Init */
  414. /* I2C1_RX Init: Priority medium, Memory increment, read from perephireal,
  415. transfer error interrupt enable, transfer complete interrupt enable */
  416. DMA1_Channel2->CCR = (DMA_CCR_PL_0 | DMA_CCR_MINC | DMA_CCR_TEIE | DMA_CCR_TCIE);
  417. /* Route DMA channel 2 to I2C1 RX */
  418. DMAMUX1_Channel1->CCR = 10;
  419. /* I2C1_TX Init: Priority medium, Memory increment, read from memory,
  420. transfer error interrupt enable, transfer complete interrupt enable */
  421. DMA1_Channel3->CCR = (DMA_CCR_PL_0 | DMA_CCR_MINC| DMA_CCR_DIR | DMA_CCR_TEIE | DMA_CCR_TCIE);
  422. /* Route DMA channel 3 to I2C1 TX */
  423. DMAMUX1_Channel2->CCR = 11;
  424. /** I2C Initialization: I2C_Fast */
  425. I2C1->TIMINGR = 0x0010061A;
  426. I2C1->CR2 = I2C_CR2_AUTOEND;
  427. I2C1->CR1 = I2C_CR1_PE;
  428. }
  429. /**
  430. * @brief SPI1 Initialization Function
  431. * @param None
  432. * @retval None
  433. */
  434. static void SPI1_Init(void)
  435. {
  436. /**SPI1 GPIO Configuration
  437. PB3 ------> SPI1_SCK
  438. PB5 ------> SPI1_MOSI
  439. */
  440. GPIO_SetPinMode(GPIOB, GPIO_PIN_3, GPIO_MODE_AFF);
  441. GPIO_SetPinOutputType(GPIOB, GPIO_PIN_3, GPIO_OTYPE_OD);
  442. GPIO_SetPinSpeed(GPIOB, GPIO_PIN_3, GPIO_OSPEED_HI);
  443. GPIO_SetPinMode(GPIOB, GPIO_PIN_5, GPIO_MODE_AFF);
  444. GPIO_SetPinOutputType(GPIOB, GPIO_PIN_5, GPIO_OTYPE_OD);
  445. GPIO_SetPinSpeed(GPIOB, GPIO_PIN_5, GPIO_OSPEED_HI);
  446. /* SPI1 DMA Init */
  447. /* SPI1_TX Init: Priority high, Memory increment, read from memory, circular mode,
  448. Enable DMA transfer complete/error interrupts */
  449. DMA1_Channel1->CCR = (DMA_CCR_PL_1 | DMA_CCR_MINC | DMA_CCR_CIRC | DMA_CCR_TEIE | DMA_CCR_DIR | DMA_CCR_TCIE);
  450. /* Route DMA channel 1 to SPI1 TX */
  451. DMAMUX1_Channel0->CCR = 0x11;
  452. /* SPI1 interrupt Init */
  453. NVIC_SetPriority(SPI1_IRQn, 0);
  454. NVIC_EnableIRQ(SPI1_IRQn);
  455. /* SPI1 parameter configuration: master mode, data 8 bit, divider = 16, TX DMA */
  456. SPI1->CR1 = (SPI_CR1_MSTR | SPI_CR1_BR_1 | SPI_CR1_BR_0 | SPI_CR1_SSM | SPI_CR1_SSI);
  457. SPI1->CR2 = (SPI_CR2_DS_2 | SPI_CR2_DS_1 | SPI_CR2_DS_0 | SPI_CR2_TXDMAEN | SPI_CR2_FRXTH);
  458. }
  459. /**
  460. * @brief TIM1 Initialization Function
  461. * @param None
  462. * @retval None
  463. */
  464. static void TIM1_Init(void)
  465. {
  466. /* target clock */
  467. TIM1->PSC = TIM1_PSC; // prescaler
  468. TIM1->ARR = TIM1_ARR; // auto reload value
  469. TIM1->CR1 = TIM_CR1_ARPE;
  470. // initial pwm value
  471. TIM1->CCR1 = PWM_TUBE_INIT_VAL;
  472. TIM1->CCR2 = PWM_LED_INIT_VAL;
  473. TIM1->CCR3 = PWM_LED_INIT_VAL;
  474. TIM1->CCR4 = PWM_LED_INIT_VAL;
  475. // pwm mode 1 for 4 chanels
  476. TIM1->CCMR1 = (TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC2M_1 | TIM_CCMR1_OC2M_2 | TIM_CCMR1_OC1PE | TIM_CCMR1_OC2PE);
  477. TIM1->CCMR2 = (TIM_CCMR2_OC3M_1 | TIM_CCMR2_OC3M_2 | TIM_CCMR2_OC4M_1 | TIM_CCMR2_OC4M_2 | TIM_CCMR2_OC3PE | TIM_CCMR2_OC4PE);
  478. // reset int flag - not needed, int unused
  479. //TIM1->SR |= TIM_SR_UIF;
  480. TIM1->BDTR = TIM_BDTR_MOE; // enable main output
  481. TIM1->EGR = TIM_EGR_UG; // force timer update
  482. /* TIM1 CC_EnableChannel */
  483. TIM1->CCER = (TIM_CCER_CC1E | TIM_CCER_CC2E | TIM_CCER_CC3E | TIM_CCER_CC4E);
  484. /* TIM_EnableCounter */
  485. TIM1->CR1 |= TIM_CR1_CEN;
  486. /** TIM1 GPIO Configuration
  487. PA8 ------> TIM1_CH1
  488. PA9 ------> TIM1_CH2
  489. PA10 ------> TIM1_CH3
  490. PA11 [PA9] ------> TIM1_CH4
  491. */
  492. GPIO_SetPinMode(PWM_1_GPIO_Port, PWM_1_Pin, GPIO_MODE_AFF);
  493. GPIO_SetPinSpeed(PWM_1_GPIO_Port, PWM_1_Pin, GPIO_OSPEED_HI);
  494. GPIO_SetPinPull(PWM_1_GPIO_Port, PWM_1_Pin, GPIO_PUPDR_DW);
  495. GPIO_SetAFPin_8_15(PWM_1_GPIO_Port, PWM_1_Pin, GPIO_AF_2);
  496. GPIO_SetPinMode(PWM_R_GPIO_Port, PWM_R_Pin, GPIO_MODE_AFF);
  497. GPIO_SetPinSpeed(PWM_R_GPIO_Port, PWM_R_Pin, GPIO_OSPEED_HI);
  498. GPIO_SetPinPull(PWM_R_GPIO_Port, PWM_R_Pin, GPIO_PUPDR_DW);
  499. GPIO_SetAFPin_8_15(PWM_R_GPIO_Port, PWM_R_Pin, GPIO_AF_2);
  500. GPIO_SetPinMode(PWM_B_GPIO_Port, PWM_B_Pin, GPIO_MODE_AFF);
  501. GPIO_SetPinSpeed(PWM_B_GPIO_Port, PWM_B_Pin, GPIO_OSPEED_HI);
  502. GPIO_SetPinPull(PWM_B_GPIO_Port, PWM_B_Pin, GPIO_PUPDR_DW);
  503. GPIO_SetAFPin_8_15(PWM_B_GPIO_Port, PWM_B_Pin, GPIO_AF_2);
  504. GPIO_SetPinMode(PWM_G_GPIO_Port, PWM_G_Pin, GPIO_MODE_AFF);
  505. GPIO_SetPinSpeed(PWM_G_GPIO_Port, PWM_G_Pin, GPIO_OSPEED_HI);
  506. GPIO_SetPinPull(PWM_G_GPIO_Port, PWM_G_Pin, GPIO_PUPDR_DW);
  507. GPIO_SetAFPin_8_15(PWM_G_GPIO_Port, PWM_G_Pin, GPIO_AF_2);
  508. }
  509. /**
  510. * @brief TIM3 Initialization Function
  511. * @param None
  512. * @retval None
  513. */
  514. static void TIM3_Init(void)
  515. {
  516. /* target clock */
  517. TIM3->PSC = TIM3_PSC; // prescaler
  518. TIM3->ARR = TIM3_ARR; // auto reload value
  519. TIM3->CR1 = TIM_CR1_ARPE;
  520. // initial pwm value
  521. TIM3->CCR1 = PWM_TUBE_INIT_VAL;
  522. TIM3->CCR2 = PWM_TUBE_INIT_VAL;
  523. TIM3->CCR3 = PWM_TUBE_INIT_VAL;
  524. TIM3->CCR4 = PWM_TUBE_INIT_VAL;
  525. // pwm mode 1 for 4 chanels
  526. TIM3->CCMR1 = (TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC2M_1 | TIM_CCMR1_OC2M_2 | TIM_CCMR1_OC1PE | TIM_CCMR1_OC2PE);
  527. TIM3->CCMR2 = (TIM_CCMR2_OC3M_1 | TIM_CCMR2_OC3M_2 | TIM_CCMR2_OC4M_1 | TIM_CCMR2_OC4M_2 | TIM_CCMR2_OC3PE | TIM_CCMR2_OC4PE);
  528. // launch timer
  529. TIM3->EGR = TIM_EGR_UG; // force timer update
  530. /* TIM3 TIM_CC_EnableChannel */
  531. TIM3->CCER = (TIM_CCER_CC1E | TIM_CCER_CC2E | TIM_CCER_CC3E | TIM_CCER_CC4E);
  532. /* TIM3 enable */
  533. TIM3->CR1 |= TIM_CR1_CEN;
  534. /**TIM3 GPIO Configuration
  535. PA6 ------> TIM3_CH1
  536. PA7 ------> TIM3_CH2
  537. PB0 ------> TIM3_CH3
  538. PB1 ------> TIM3_CH4
  539. */
  540. GPIO_SetPinMode(PWM_5_GPIO_Port, PWM_5_Pin, GPIO_MODE_AFF);
  541. GPIO_SetPinSpeed(PWM_5_GPIO_Port, PWM_5_Pin, GPIO_OSPEED_HI);
  542. GPIO_SetPinPull(PWM_5_GPIO_Port, PWM_5_Pin, GPIO_PUPDR_DW);
  543. GPIO_SetAFPin_0_7(PWM_5_GPIO_Port, PWM_5_Pin, GPIO_AF_1);
  544. GPIO_SetPinMode(PWM_4_GPIO_Port, PWM_4_Pin, GPIO_MODE_AFF);
  545. GPIO_SetPinSpeed(PWM_4_GPIO_Port, PWM_4_Pin, GPIO_OSPEED_HI);
  546. GPIO_SetPinPull(PWM_4_GPIO_Port, PWM_4_Pin, GPIO_PUPDR_DW);
  547. GPIO_SetAFPin_0_7(PWM_4_GPIO_Port, PWM_4_Pin, GPIO_AF_1);
  548. GPIO_SetPinMode(PWM_3_GPIO_Port, PWM_3_Pin, GPIO_MODE_AFF);
  549. GPIO_SetPinSpeed(PWM_3_GPIO_Port, PWM_3_Pin, GPIO_OSPEED_HI);
  550. GPIO_SetPinPull(PWM_3_GPIO_Port, PWM_3_Pin, GPIO_PUPDR_DW);
  551. GPIO_SetAFPin_0_7(PWM_3_GPIO_Port, PWM_3_Pin, GPIO_AF_1);
  552. GPIO_SetPinMode(PWM_2_GPIO_Port, PWM_2_Pin, GPIO_MODE_AFF);
  553. GPIO_SetPinSpeed(PWM_2_GPIO_Port, PWM_2_Pin, GPIO_OSPEED_HI);
  554. GPIO_SetPinPull(PWM_2_GPIO_Port, PWM_2_Pin, GPIO_PUPDR_DW);
  555. GPIO_SetAFPin_0_7(PWM_2_GPIO_Port, PWM_2_Pin, GPIO_AF_1);
  556. }
  557. /**
  558. * @brief TIM14 Initialization Function
  559. * @param None
  560. * @retval None
  561. * @desc "Блинкование" разрядами - 0,75/0,25 сек вкл/выкл.
  562. */
  563. static void TIM14_Init(void)
  564. {
  565. /* Peripheral clock enable */
  566. RCC->APBENR2 |= RCC_APBENR2_TIM14EN;
  567. /* TIM14 interrupt Init */
  568. NVIC_SetPriority(TIM14_IRQn, 0);
  569. NVIC_EnableIRQ(TIM14_IRQn);
  570. /* Set TIM14 for 1 sec period */
  571. TIM14->PSC = TIM14_PSC;
  572. TIM14->ARR = TIM14_ARR;
  573. /* Enable: Auto-reload preload, no One-pulse mode, */
  574. TIM14->CR1 = (TIM_CR1_ARPE); // | TIM_CR1_OPM);
  575. /* OC or PWM? (for pwm - (TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_1) ) , Output compare 1 preload */
  576. TIM14->CCMR1 = (TIM_CCMR1_OC1M_0 | TIM_CCMR1_OC1PE);
  577. /* Enable Channel_1 or no needed ??? */
  578. TIM14->CCER = TIM_CCER_CC1E;
  579. /* Impulse value in msek */
  580. TIM14->CCR1 = TIM14_PULSE_VAL;
  581. /* Enable IRQ for Update end CaptureCompare envents or only CC ??? */
  582. TIM14->DIER = (TIM_DIER_UIE | TIM_DIER_CC1IE);
  583. //TIM14->DIER = TIM_DIER_CC1IE;
  584. }
  585. /**
  586. * На старте активируем все каналы, при совпадении отключаем (не)нужные.
  587. */
  588. void Blink_Start(void)
  589. {
  590. /* enable all channels */
  591. //TUBE_ALL_ON;
  592. /* clear IRQ flags */
  593. TIM14->SR |= TIM_SR_UIF;
  594. TIM14->SR |= TIM_SR_CC1IF;
  595. /* clear counter value */
  596. TIM14->CNT = 0;
  597. /* enable timer */
  598. TIM14->CR1 |= TIM_CR1_CEN;
  599. }
  600. void Blink_Stop(void)
  601. {
  602. /* disable timer */
  603. TIM14->CR1 &= ~(TIM_CR1_CEN);
  604. /* enable channels */
  605. if (Flag.Blink_1 != 0) {
  606. TUBE_A_ON;
  607. }
  608. if (Flag.Blink_2 != 0) {
  609. TUBE_B_ON;
  610. }
  611. if (Flag.Blink_3 != 0) {
  612. TUBE_C_ON;
  613. }
  614. if (Flag.Blink_4 != 0) {
  615. TUBE_D_ON;
  616. }
  617. if (Flag.Blink_5 != 0) {
  618. TUBE_E_ON;
  619. }
  620. /* clear flags */
  621. Flag.Blink_1 = 0;
  622. Flag.Blink_2 = 0;
  623. Flag.Blink_3 = 0;
  624. Flag.Blink_4 = 0;
  625. Flag.Blink_5 = 0;
  626. }
  627. /**
  628. * @brief TIM16 Initialization Function
  629. * @param None
  630. * @retval None
  631. */
  632. static void TIM16_Init(void)
  633. {
  634. /* Peripheral clock enable */
  635. RCC->APBENR2 |= RCC_APBENR2_TIM16EN;
  636. /* TIM16 interrupt Init */
  637. NVIC_SetPriority(TIM16_IRQn, 0);
  638. NVIC_EnableIRQ(TIM16_IRQn);
  639. /* setup clock */
  640. TIM16->PSC = TIM16_PSC; // prescaler
  641. TIM16->ARR = TIM16_ARR; // auto reload value
  642. TIM16->CR1 = TIM_CR1_ARPE;
  643. // initial pwm value
  644. //TIM16->CCR1 = TIM16_PWM_VAL;
  645. // pwm mode 1 for 1 chanel
  646. TIM16->CCMR1 = (TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1PE);
  647. // reset int flag
  648. TIM16->SR |= TIM_SR_UIF;
  649. TIM16->BDTR = TIM_BDTR_MOE; // enable main output
  650. TIM16->EGR = TIM_EGR_UG; // force timer update
  651. /* TIM16 CC_EnableChannel */
  652. TIM16->CCER = TIM_CCER_CC1E;
  653. /* TIM_EnableCounter */
  654. TIM16->CR1 |= TIM_CR1_CEN;
  655. /* Enable IRQ */
  656. TIM16->DIER = TIM_DIER_UIE;
  657. }
  658. /**
  659. * @brief TIM17 Initialization Function
  660. * @param None
  661. * @retval None
  662. */
  663. static void TIM17_Init(void)
  664. {
  665. /* Peripheral clock enable */
  666. RCC->APBENR2 |= RCC_APBENR2_TIM17EN;
  667. /* TIM17 interrupt Init */
  668. NVIC_SetPriority(TIM17_IRQn, 0);
  669. NVIC_EnableIRQ(TIM17_IRQn);
  670. /* setup clock */
  671. TIM17->PSC = TIM17_PSC; // prescaler
  672. TIM17->ARR = TIM17_ARR; // auto reload value
  673. TIM17->CR1 = TIM_CR1_ARPE;
  674. // initial pwm value
  675. //TIM17->CCR1 = TIM17_PWM_VAL;
  676. // pwm mode 1 for 1 chanel
  677. TIM17->CCMR1 = (TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1PE);
  678. // reset int flag
  679. TIM17->SR |= TIM_SR_UIF;
  680. TIM17->BDTR = TIM_BDTR_MOE; // enable main output
  681. TIM17->EGR = TIM_EGR_UG; // force timer update
  682. /* TIM17 CC_EnableChannel */
  683. TIM17->CCER = TIM_CCER_CC1E;
  684. /* TIM_EnableCounter */
  685. TIM17->CR1 |= TIM_CR1_CEN;
  686. /* Enable IRQ */
  687. TIM17->DIER = TIM_DIER_UIE;
  688. }
  689. /**
  690. * @brief USART1 Initialization Function
  691. * @param None
  692. * @retval None
  693. */
  694. static void USART1_UART_Init(void)
  695. {
  696. /* Peripheral clock enable */
  697. RCC->APBENR2 |= RCC_APBENR2_USART1EN;
  698. /**USART1 GPIO Configuration
  699. PB6 ------> USART1_TX
  700. PB7 ------> USART1_RX
  701. */
  702. GPIO_SetPinMode(GPIOB, GPIO_PIN_6, GPIO_MODE_AFF);
  703. GPIO_SetPinSpeed(GPIOB, GPIO_PIN_6, GPIO_OSPEED_HI);
  704. GPIO_SetPinMode(GPIOB, GPIO_PIN_7, GPIO_MODE_AFF);
  705. GPIO_SetPinSpeed(GPIOB, GPIO_PIN_7, GPIO_OSPEED_HI);
  706. /* USART1 interrupt Init */
  707. NVIC_SetPriority(USART1_IRQn, 0);
  708. NVIC_EnableIRQ(USART1_IRQn);
  709. USART1->CR1 |= (USART_CR1_TE |USART_CR1_RE);
  710. USART1->BRR = 138;
  711. /* USART1 Enable */
  712. USART1->CR1 |= USART_CR1_UE;
  713. /* Polling USART1 initialisation */
  714. while((!(USART1->ISR & USART_ISR_TEACK)) || (!(USART1->ISR & USART_ISR_REACK)))
  715. {
  716. }
  717. }