stm32g0xx_it.c 8.3 KB

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  1. /* USER CODE BEGIN Header */
  2. /**
  3. ******************************************************************************
  4. * @file stm32g0xx_it.c
  5. * @brief Interrupt Service Routines.
  6. ******************************************************************************
  7. * @attention
  8. *
  9. * <h2><center>&copy; Copyright (c) 2021 STMicroelectronics.
  10. * All rights reserved.</center></h2>
  11. *
  12. * This software component is licensed by ST under BSD 3-Clause license,
  13. * the "License"; You may not use this file except in compliance with the
  14. * License. You may obtain a copy of the License at:
  15. * opensource.org/licenses/BSD-3-Clause
  16. *
  17. ******************************************************************************
  18. */
  19. /* USER CODE END Header */
  20. /* Includes ------------------------------------------------------------------*/
  21. #include "main.h"
  22. #include "stm32g0xx_it.h"
  23. /* Private includes ----------------------------------------------------------*/
  24. /* USER CODE BEGIN Includes */
  25. /* USER CODE END Includes */
  26. /* Private typedef -----------------------------------------------------------*/
  27. /* USER CODE BEGIN TD */
  28. /* USER CODE END TD */
  29. /* Private define ------------------------------------------------------------*/
  30. /* USER CODE BEGIN PD */
  31. /* USER CODE END PD */
  32. /* Private macro -------------------------------------------------------------*/
  33. /* USER CODE BEGIN PM */
  34. /* USER CODE END PM */
  35. /* Private variables ---------------------------------------------------------*/
  36. /* USER CODE BEGIN PV */
  37. /* USER CODE END PV */
  38. /* Private function prototypes -----------------------------------------------*/
  39. /* USER CODE BEGIN PFP */
  40. /* USER CODE END PFP */
  41. /* Private user code ---------------------------------------------------------*/
  42. /* USER CODE BEGIN 0 */
  43. /* USER CODE END 0 */
  44. /* External variables --------------------------------------------------------*/
  45. /* USER CODE BEGIN EV */
  46. /* USER CODE END EV */
  47. /******************************************************************************/
  48. /* Cortex-M0+ Processor Interruption and Exception Handlers */
  49. /******************************************************************************/
  50. /**
  51. * @brief This function handles Non maskable interrupt.
  52. */
  53. void NMI_Handler(void)
  54. {
  55. /* USER CODE BEGIN NonMaskableInt_IRQn 0 */
  56. /* USER CODE END NonMaskableInt_IRQn 0 */
  57. /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
  58. while (1)
  59. {
  60. }
  61. /* USER CODE END NonMaskableInt_IRQn 1 */
  62. }
  63. /**
  64. * @brief This function handles Hard fault interrupt.
  65. */
  66. void HardFault_Handler(void)
  67. {
  68. /* USER CODE BEGIN HardFault_IRQn 0 */
  69. /* USER CODE END HardFault_IRQn 0 */
  70. while (1)
  71. {
  72. /* USER CODE BEGIN W1_HardFault_IRQn 0 */
  73. /* USER CODE END W1_HardFault_IRQn 0 */
  74. }
  75. }
  76. /**
  77. * @brief This function handles System service call via SWI instruction.
  78. */
  79. void SVC_Handler(void)
  80. {
  81. /* USER CODE BEGIN SVC_IRQn 0 */
  82. /* USER CODE END SVC_IRQn 0 */
  83. /* USER CODE BEGIN SVC_IRQn 1 */
  84. /* USER CODE END SVC_IRQn 1 */
  85. }
  86. /**
  87. * @brief This function handles Pendable request for system service.
  88. */
  89. void PendSV_Handler(void)
  90. {
  91. /* USER CODE BEGIN PendSV_IRQn 0 */
  92. /* USER CODE END PendSV_IRQn 0 */
  93. /* USER CODE BEGIN PendSV_IRQn 1 */
  94. /* USER CODE END PendSV_IRQn 1 */
  95. }
  96. #ifdef DONT_USE_SHED
  97. /**
  98. * @brief This function handles System tick timer.
  99. */
  100. void SysTick_Handler(void)
  101. {
  102. /* USER CODE BEGIN SysTick_IRQn 0 */
  103. /* USER CODE END SysTick_IRQn 0 */
  104. /* USER CODE BEGIN SysTick_IRQn 1 */
  105. /* USER CODE END SysTick_IRQn 1 */
  106. }
  107. #endif /* DONT_USE_SHED */
  108. /******************************************************************************/
  109. /* STM32G0xx Peripheral Interrupt Handlers */
  110. /* Add here the Interrupt Handlers for the used peripherals. */
  111. /* For the available peripheral interrupt handler names, */
  112. /* please refer to the startup file (startup_stm32g0xx.s). */
  113. /******************************************************************************/
  114. /**
  115. * @brief This function handles EXTI line 4 to 15 interrupts.
  116. */
  117. void EXTI4_15_IRQHandler(void)
  118. {
  119. /* USER CODE BEGIN EXTI4_15_IRQn 0 */
  120. //if ((EXTI->RPR1 & 1<<14) != 0)
  121. /* USER CODE END EXTI4_15_IRQn 0 */
  122. if (LL_EXTI_IsActiveRisingFlag_0_31(LL_EXTI_LINE_14) != RESET)
  123. {
  124. LL_EXTI_ClearRisingFlag_0_31(LL_EXTI_LINE_14);
  125. /* USER CODE BEGIN LL_EXTI_LINE_14_RISING */
  126. //EXTI->RPR1 = 1<<14;
  127. Flag.RTC_IRQ = 1;
  128. ES_PlaceEvent(evNewSecond);
  129. /* USER CODE END LL_EXTI_LINE_14_RISING */
  130. }
  131. /* USER CODE BEGIN EXTI4_15_IRQn 1 */
  132. /* USER CODE END EXTI4_15_IRQn 1 */
  133. }
  134. /**
  135. * @brief This function handles DMA1 channel 1 interrupt.
  136. */
  137. void DMA1_Channel1_IRQHandler(void)
  138. {
  139. /* USER CODE BEGIN DMA1_Channel1_IRQn 0 */
  140. if (LL_DMA_IsActiveFlag_TC1(DMA1) != 0) {
  141. DMA1->IFCR |= DMA_IFCR_CTCIF1; // reset IRQ flag
  142. Flag.SPI_TX_End = 1;
  143. /* Stop SPI-DMA transfer */
  144. DMA1_Channel1->CCR &= ~DMA_CCR_EN;
  145. /* Wait for end SPI transmit */
  146. LATCH_DOWN;
  147. while ((SPI1->SR & SPI_SR_FTLVL) != 0) {};
  148. while ((SPI1->SR & SPI_SR_BSY) != 0) {};
  149. LATCH_UP;
  150. }
  151. /* USER CODE END DMA1_Channel1_IRQn 0 */
  152. /* USER CODE BEGIN DMA1_Channel1_IRQn 1 */
  153. /* USER CODE END DMA1_Channel1_IRQn 1 */
  154. }
  155. /**
  156. * @brief This function handles DMA1 channel 2 and channel 3 interrupts.
  157. */
  158. void DMA1_Channel2_3_IRQHandler(void)
  159. {
  160. /* USER CODE BEGIN DMA1_Channel2_3_IRQn 0 */
  161. if (LL_DMA_IsActiveFlag_TC2(DMA1) != 0) {
  162. /* reset IRQ flag */
  163. DMA1->IFCR |= DMA_IFCR_CTCIF2;
  164. /* Disable DMA channels for I2C RX */
  165. DMA1_Channel2->CCR &= ~DMA_CCR_EN;
  166. Flag.I2C_RX_End = 1;
  167. }
  168. if (LL_DMA_IsActiveFlag_TE2(DMA1) != 0) {
  169. DMA1->IFCR |= DMA_IFCR_CTEIF2;
  170. DMA1_Channel2->CCR &= ~DMA_CCR_EN;
  171. Flag.I2C_RX_End = 1;
  172. Flag.I2C_RX_Err = 1;
  173. }
  174. /* USER CODE END DMA1_Channel2_3_IRQn 0 */
  175. /* USER CODE BEGIN DMA1_Channel2_3_IRQn 1 */
  176. if ((DMA1->ISR & DMA_ISR_TCIF3) != 0) {
  177. /* reset IRQ flag */
  178. DMA1->IFCR |= DMA_IFCR_CTCIF3;
  179. /* Disable DMA channels for I2C TX */
  180. DMA1_Channel3->CCR &= ~DMA_CCR_EN;
  181. Flag.I2C_TX_End = 1;
  182. }
  183. if ((DMA1->ISR & DMA_ISR_TEIF3) != 0) {
  184. DMA1->IFCR |= DMA_IFCR_CTEIF3;
  185. DMA1_Channel3->CCR &= ~DMA_CCR_EN;
  186. Flag.I2C_TX_End = 1;
  187. Flag.I2C_TX_Err = 1;
  188. }
  189. /* USER CODE END DMA1_Channel2_3_IRQn 1 */
  190. }
  191. /**
  192. * @brief This function handles TIM14 global interrupt.
  193. */
  194. void TIM14_IRQHandler(void)
  195. {
  196. /* USER CODE BEGIN TIM14_IRQn 0 */
  197. if ((TIM14->SR & TIM_SR_UIF) != 0) {
  198. /* Update interrupt flag */
  199. TIM14->SR |= TIM_SR_UIF;
  200. }
  201. /* USER CODE END TIM14_IRQn 0 */
  202. /* USER CODE BEGIN TIM14_IRQn 1 */
  203. if ((TIM14->SR & TIM_SR_CC1IF) != 0) {
  204. /* Capture/Compare Interrupt */
  205. TIM14->SR |= TIM_SR_CC1IF;
  206. /* disable unneeded channel */
  207. if (Flag.Blink_1 != 0) {
  208. TUBE_A_OFF;
  209. }
  210. if (Flag.Blink_2 != 0) {
  211. TUBE_B_OFF;
  212. }
  213. if (Flag.Blink_3 != 0) {
  214. TUBE_C_OFF;
  215. }
  216. if (Flag.Blink_4 != 0) {
  217. TUBE_D_OFF;
  218. }
  219. if (Flag.Blink_5 != 0) {
  220. TUBE_E_OFF;
  221. }
  222. }
  223. /* USER CODE END TIM14_IRQn 1 */
  224. }
  225. /**
  226. * @brief This function handles TIM16 global interrupt.
  227. */
  228. void TIM16_IRQHandler(void)
  229. {
  230. /* USER CODE BEGIN TIM16_IRQn 0 */
  231. if ((TIM16->SR & TIM_SR_UIF) != 0) {
  232. /* Update interrupt flag */
  233. TIM16->SR |= TIM_SR_UIF;
  234. }
  235. /* USER CODE END TIM16_IRQn 0 */
  236. /* USER CODE BEGIN TIM16_IRQn 1 */
  237. /* USER CODE END TIM16_IRQn 1 */
  238. }
  239. /**
  240. * @brief This function handles TIM17 global interrupt.
  241. */
  242. void TIM17_IRQHandler(void)
  243. {
  244. /* USER CODE BEGIN TIM17_IRQn 0 */
  245. if ((TIM17->SR & TIM_SR_UIF) != 0) {
  246. /* Update interrupt flag */
  247. TIM17->SR |= TIM_SR_UIF;
  248. }
  249. /* USER CODE END TIM17_IRQn 0 */
  250. /* USER CODE BEGIN TIM17_IRQn 1 */
  251. /* USER CODE END TIM17_IRQn 1 */
  252. }
  253. /**
  254. * @brief This function handles SPI1 global interrupt.
  255. */
  256. void SPI1_IRQHandler(void)
  257. {
  258. /* USER CODE BEGIN SPI1_IRQn 0 */
  259. /* USER CODE END SPI1_IRQn 0 */
  260. /* USER CODE BEGIN SPI1_IRQn 1 */
  261. /* USER CODE END SPI1_IRQn 1 */
  262. }
  263. /**
  264. * @brief This function handles USART1 global interrupt / USART1 wake-up interrupt through EXTI line 25.
  265. */
  266. void USART1_IRQHandler(void)
  267. {
  268. /* USER CODE BEGIN USART1_IRQn 0 */
  269. /* USER CODE END USART1_IRQn 0 */
  270. /* USER CODE BEGIN USART1_IRQn 1 */
  271. /* USER CODE END USART1_IRQn 1 */
  272. }
  273. /* USER CODE BEGIN 1 */
  274. /* USER CODE END 1 */
  275. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/