stm32g0xx_it.c 6.8 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274
  1. /* USER CODE BEGIN Header */
  2. /**
  3. ******************************************************************************
  4. * @file stm32g0xx_it.c
  5. * @brief Interrupt Service Routines.
  6. ******************************************************************************
  7. * @attention
  8. *
  9. * <h2><center>&copy; Copyright (c) 2021 STMicroelectronics.
  10. * All rights reserved.</center></h2>
  11. *
  12. * This software component is licensed by ST under BSD 3-Clause license,
  13. * the "License"; You may not use this file except in compliance with the
  14. * License. You may obtain a copy of the License at:
  15. * opensource.org/licenses/BSD-3-Clause
  16. *
  17. ******************************************************************************
  18. */
  19. /* USER CODE END Header */
  20. /* Includes ------------------------------------------------------------------*/
  21. #include "main.h"
  22. #include "stm32g0xx_it.h"
  23. /* Private includes ----------------------------------------------------------*/
  24. /* USER CODE BEGIN Includes */
  25. /* USER CODE END Includes */
  26. /* Private typedef -----------------------------------------------------------*/
  27. /* USER CODE BEGIN TD */
  28. /* USER CODE END TD */
  29. /* Private define ------------------------------------------------------------*/
  30. /* USER CODE BEGIN PD */
  31. /* USER CODE END PD */
  32. /* Private macro -------------------------------------------------------------*/
  33. /* USER CODE BEGIN PM */
  34. /* USER CODE END PM */
  35. /* Private variables ---------------------------------------------------------*/
  36. /* USER CODE BEGIN PV */
  37. /* USER CODE END PV */
  38. /* Private function prototypes -----------------------------------------------*/
  39. /* USER CODE BEGIN PFP */
  40. /* USER CODE END PFP */
  41. /* Private user code ---------------------------------------------------------*/
  42. /* USER CODE BEGIN 0 */
  43. /* USER CODE END 0 */
  44. /* External variables --------------------------------------------------------*/
  45. /* USER CODE BEGIN EV */
  46. /* USER CODE END EV */
  47. /******************************************************************************/
  48. /* Cortex-M0+ Processor Interruption and Exception Handlers */
  49. /******************************************************************************/
  50. /**
  51. * @brief This function handles Non maskable interrupt.
  52. */
  53. void NMI_Handler(void)
  54. {
  55. /* USER CODE BEGIN NonMaskableInt_IRQn 0 */
  56. /* USER CODE END NonMaskableInt_IRQn 0 */
  57. /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
  58. while (1)
  59. {
  60. }
  61. /* USER CODE END NonMaskableInt_IRQn 1 */
  62. }
  63. /**
  64. * @brief This function handles Hard fault interrupt.
  65. */
  66. void HardFault_Handler(void)
  67. {
  68. /* USER CODE BEGIN HardFault_IRQn 0 */
  69. /* USER CODE END HardFault_IRQn 0 */
  70. while (1)
  71. {
  72. /* USER CODE BEGIN W1_HardFault_IRQn 0 */
  73. /* USER CODE END W1_HardFault_IRQn 0 */
  74. }
  75. }
  76. /**
  77. * @brief This function handles System service call via SWI instruction.
  78. */
  79. void SVC_Handler(void)
  80. {
  81. /* USER CODE BEGIN SVC_IRQn 0 */
  82. /* USER CODE END SVC_IRQn 0 */
  83. /* USER CODE BEGIN SVC_IRQn 1 */
  84. /* USER CODE END SVC_IRQn 1 */
  85. }
  86. /**
  87. * @brief This function handles Pendable request for system service.
  88. */
  89. void PendSV_Handler(void)
  90. {
  91. /* USER CODE BEGIN PendSV_IRQn 0 */
  92. /* USER CODE END PendSV_IRQn 0 */
  93. /* USER CODE BEGIN PendSV_IRQn 1 */
  94. /* USER CODE END PendSV_IRQn 1 */
  95. }
  96. /**
  97. * @brief This function handles System tick timer.
  98. */
  99. void SysTick_Handler(void)
  100. {
  101. /* USER CODE BEGIN SysTick_IRQn 0 */
  102. /* USER CODE END SysTick_IRQn 0 */
  103. /* USER CODE BEGIN SysTick_IRQn 1 */
  104. /* USER CODE END SysTick_IRQn 1 */
  105. }
  106. /******************************************************************************/
  107. /* STM32G0xx Peripheral Interrupt Handlers */
  108. /* Add here the Interrupt Handlers for the used peripherals. */
  109. /* For the available peripheral interrupt handler names, */
  110. /* please refer to the startup file (startup_stm32g0xx.s). */
  111. /******************************************************************************/
  112. /**
  113. * @brief This function handles RCC global interrupt.
  114. */
  115. void RCC_IRQHandler(void)
  116. {
  117. /* USER CODE BEGIN RCC_IRQn 0 */
  118. /* USER CODE END RCC_IRQn 0 */
  119. /* USER CODE BEGIN RCC_IRQn 1 */
  120. /* USER CODE END RCC_IRQn 1 */
  121. }
  122. /**
  123. * @brief This function handles EXTI line 4 to 15 interrupts.
  124. */
  125. void EXTI4_15_IRQHandler(void)
  126. {
  127. /* USER CODE BEGIN EXTI4_15_IRQn 0 */
  128. //if ((EXTI->RPR1 & 1<<8) != 0)
  129. /* USER CODE END EXTI4_15_IRQn 0 */
  130. if (LL_EXTI_IsActiveRisingFlag_0_31(LL_EXTI_LINE_8) != RESET)
  131. {
  132. LL_EXTI_ClearRisingFlag_0_31(LL_EXTI_LINE_8);
  133. /* USER CODE BEGIN LL_EXTI_LINE_8_RISING */
  134. //EXTI->RPR1 = 1<<8;
  135. /* USER CODE END LL_EXTI_LINE_8_RISING */
  136. }
  137. /* USER CODE BEGIN EXTI4_15_IRQn 1 */
  138. /* USER CODE END EXTI4_15_IRQn 1 */
  139. }
  140. /**
  141. * @brief This function handles DMA1 channel 1 interrupt.
  142. */
  143. void DMA1_Channel1_IRQHandler(void)
  144. {
  145. /* USER CODE BEGIN DMA1_Channel1_IRQn 0 */
  146. if (LL_DMA_IsActiveFlag_TC1(DMA1) != 0) {
  147. /* Stop SPI-DMA transfer */
  148. // LL_DMA_DisableChannel(DMA1, LL_DMA_CHANNEL_1);
  149. LL_SPI_DisableDMAReq_TX(SPI1);
  150. // LL_SPI_Disable(SPI1);
  151. }
  152. /* USER CODE END DMA1_Channel1_IRQn 0 */
  153. /* USER CODE BEGIN DMA1_Channel1_IRQn 1 */
  154. /* USER CODE END DMA1_Channel1_IRQn 1 */
  155. }
  156. /**
  157. * @brief This function handles DMA1 channel 2 and channel 3 interrupts.
  158. */
  159. void DMA1_Channel2_3_IRQHandler(void)
  160. {
  161. /* USER CODE BEGIN DMA1_Channel2_3_IRQn 0 */
  162. /* USER CODE END DMA1_Channel2_3_IRQn 0 */
  163. /* USER CODE BEGIN DMA1_Channel2_3_IRQn 1 */
  164. /* USER CODE END DMA1_Channel2_3_IRQn 1 */
  165. }
  166. /**
  167. * @brief This function handles TIM14 global interrupt.
  168. */
  169. void TIM14_IRQHandler(void)
  170. {
  171. /* USER CODE BEGIN TIM14_IRQn 0 */
  172. /* USER CODE END TIM14_IRQn 0 */
  173. /* USER CODE BEGIN TIM14_IRQn 1 */
  174. /* USER CODE END TIM14_IRQn 1 */
  175. }
  176. /**
  177. * @brief This function handles TIM16 global interrupt.
  178. */
  179. void TIM16_IRQHandler(void)
  180. {
  181. /* USER CODE BEGIN TIM16_IRQn 0 */
  182. /* USER CODE END TIM16_IRQn 0 */
  183. /* USER CODE BEGIN TIM16_IRQn 1 */
  184. /* USER CODE END TIM16_IRQn 1 */
  185. }
  186. /**
  187. * @brief This function handles TIM17 global interrupt.
  188. */
  189. void TIM17_IRQHandler(void)
  190. {
  191. /* USER CODE BEGIN TIM17_IRQn 0 */
  192. /* USER CODE END TIM17_IRQn 0 */
  193. /* USER CODE BEGIN TIM17_IRQn 1 */
  194. /* USER CODE END TIM17_IRQn 1 */
  195. }
  196. /**
  197. * @brief This function handles SPI1 global interrupt.
  198. */
  199. void SPI1_IRQHandler(void)
  200. {
  201. /* USER CODE BEGIN SPI1_IRQn 0 */
  202. /*while ((SPI1->SR & SPI_SR_FTLVL) != 0);
  203. while ((SPI1->SR & SPI_SR_BSY) != 0);
  204. LATCH_UP; */
  205. /* Check RXNE flag value in ISR register */
  206. if (LL_SPI_IsActiveFlag_TXE(SPI1))
  207. {
  208. /* Call function Slave Reception Callback */
  209. SPI1_Tx_Callback();
  210. }
  211. /* USER CODE END SPI1_IRQn 0 */
  212. /* USER CODE BEGIN SPI1_IRQn 1 */
  213. /* USER CODE END SPI1_IRQn 1 */
  214. }
  215. /* USER CODE BEGIN 1 */
  216. /* USER CODE END 1 */
  217. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/