/* USER CODE BEGIN Header */
/**
  ******************************************************************************
  * @file    stm32g0xx_it.c
  * @brief   Interrupt Service Routines.
  ******************************************************************************
  * @attention
  *
  * <h2><center>&copy; Copyright (c) 2021 STMicroelectronics.
  * All rights reserved.</center></h2>
  *
  * This software component is licensed by ST under BSD 3-Clause license,
  * the "License"; You may not use this file except in compliance with the
  * License. You may obtain a copy of the License at:
  *                        opensource.org/licenses/BSD-3-Clause
  *
  ******************************************************************************
  */
/* USER CODE END Header */

/* Includes ------------------------------------------------------------------*/
#include "main.h"
#include "stm32g0xx_it.h"
/* Private includes ----------------------------------------------------------*/
/* USER CODE BEGIN Includes */
/* USER CODE END Includes */

/* Private typedef -----------------------------------------------------------*/
/* USER CODE BEGIN TD */

/* USER CODE END TD */

/* Private define ------------------------------------------------------------*/
/* USER CODE BEGIN PD */

/* USER CODE END PD */

/* Private macro -------------------------------------------------------------*/
/* USER CODE BEGIN PM */

/* USER CODE END PM */

/* Private variables ---------------------------------------------------------*/
/* USER CODE BEGIN PV */

/* USER CODE END PV */

/* Private function prototypes -----------------------------------------------*/
/* USER CODE BEGIN PFP */

/* USER CODE END PFP */

/* Private user code ---------------------------------------------------------*/
/* USER CODE BEGIN 0 */

/* USER CODE END 0 */

/* External variables --------------------------------------------------------*/

/* USER CODE BEGIN EV */

/* USER CODE END EV */

/******************************************************************************/
/*           Cortex-M0+ Processor Interruption and Exception Handlers          */
/******************************************************************************/
/**
  * @brief This function handles Non maskable interrupt.
  */
void NMI_Handler(void)
{
  /* USER CODE BEGIN NonMaskableInt_IRQn 0 */

  /* USER CODE END NonMaskableInt_IRQn 0 */
  /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
  while (1)
  {
  }
  /* USER CODE END NonMaskableInt_IRQn 1 */
}

/**
  * @brief This function handles Hard fault interrupt.
  */
void HardFault_Handler(void)
{
  /* USER CODE BEGIN HardFault_IRQn 0 */

  /* USER CODE END HardFault_IRQn 0 */
  while (1)
  {
    /* USER CODE BEGIN W1_HardFault_IRQn 0 */
    /* USER CODE END W1_HardFault_IRQn 0 */
  }
}

/**
  * @brief This function handles System service call via SWI instruction.
  */
void SVC_Handler(void)
{
  /* USER CODE BEGIN SVC_IRQn 0 */

  /* USER CODE END SVC_IRQn 0 */
  /* USER CODE BEGIN SVC_IRQn 1 */

  /* USER CODE END SVC_IRQn 1 */
}

/**
  * @brief This function handles Pendable request for system service.
  */
void PendSV_Handler(void)
{
  /* USER CODE BEGIN PendSV_IRQn 0 */

  /* USER CODE END PendSV_IRQn 0 */
  /* USER CODE BEGIN PendSV_IRQn 1 */

  /* USER CODE END PendSV_IRQn 1 */
}

#ifdef DONT_USE_SHED
/**
  * @brief This function handles System tick timer.
  */
void SysTick_Handler(void)
{
  /* USER CODE BEGIN SysTick_IRQn 0 */

  /* USER CODE END SysTick_IRQn 0 */

  /* USER CODE BEGIN SysTick_IRQn 1 */

  /* USER CODE END SysTick_IRQn 1 */
}
#endif /* DONT_USE_SHED */

/******************************************************************************/
/* STM32G0xx Peripheral Interrupt Handlers                                    */
/* Add here the Interrupt Handlers for the used peripherals.                  */
/* For the available peripheral interrupt handler names,                      */
/* please refer to the startup file (startup_stm32g0xx.s).                    */
/******************************************************************************/

/**
  * @brief This function handles EXTI line 4 to 15 interrupts.
  */
void __attribute__((optimize("O0"))) EXTI4_15_IRQHandler(void)
{
  /* USER CODE BEGIN EXTI4_15_IRQn 0 */
  if ((EXTI->FPR1 & EXTI_IMR1_IM14) != 0)
  {
  /* USER CODE END EXTI4_15_IRQn 0 */
    /* USER CODE BEGIN LL_EXTI_LINE_14_FALING */
    EXTI->FPR1 = EXTI_IMR1_IM14;
    Flag.RTC_IRQ = 1;

    ES_PlaceEvent(evNewSecond);

    /* USER CODE END LL_EXTI_LINE_14_RISING */
  }
  /* USER CODE BEGIN EXTI4_15_IRQn 1 */

  /* USER CODE END EXTI4_15_IRQn 1 */
}

/**
  * @brief This function handles DMA1 channel 1 interrupt.
  */
void DMA1_Channel1_IRQHandler(void)
{
  /* USER CODE BEGIN DMA1_Channel1_IRQn 0 */
  if (LL_DMA_IsActiveFlag_TC1(DMA1) != 0) {
    DMA1->IFCR |= DMA_IFCR_CTCIF1; // reset IRQ flag

    Flag.SPI_TX_End = 1;

    /* Stop SPI-DMA transfer */
    DMA1_Channel1->CCR &= ~DMA_CCR_EN;

    /* Wait for end SPI transmit */
    LATCH_DOWN;
    while ((SPI1->SR & SPI_SR_FTLVL) != 0) {};
    while ((SPI1->SR & SPI_SR_BSY) != 0) {};
    LATCH_UP;
  }
  /* USER CODE END DMA1_Channel1_IRQn 0 */

  /* USER CODE BEGIN DMA1_Channel1_IRQn 1 */

  /* USER CODE END DMA1_Channel1_IRQn 1 */
}

/**
  * @brief This function handles DMA1 channel 2 and channel 3 interrupts.
  */
void DMA1_Channel2_3_IRQHandler(void)
{
  /* USER CODE BEGIN DMA1_Channel2_3_IRQn 0 */
  if (LL_DMA_IsActiveFlag_TC2(DMA1) != 0) {
    /* reset IRQ flag */
    DMA1->IFCR |= DMA_IFCR_CTCIF2;
    /* Disable DMA channels for I2C RX */
    DMA1_Channel2->CCR &= ~DMA_CCR_EN;
    Flag.I2C_RX_End = 1;
  }
  if (LL_DMA_IsActiveFlag_TE2(DMA1) != 0) {
    DMA1->IFCR |= DMA_IFCR_CTEIF2;
    DMA1_Channel2->CCR &= ~DMA_CCR_EN;
    Flag.I2C_RX_End = 1;
    Flag.I2C_RX_Err = 1;
  }
  /* USER CODE END DMA1_Channel2_3_IRQn 0 */

  /* USER CODE BEGIN DMA1_Channel2_3_IRQn 1 */
  if ((DMA1->ISR & DMA_ISR_TCIF3) != 0) {
    /* reset IRQ flag */
    DMA1->IFCR |= DMA_IFCR_CTCIF3;
    /* Disable DMA channels for I2C TX */
    DMA1_Channel3->CCR &= ~DMA_CCR_EN;
    Flag.I2C_TX_End = 1;
  }
  if ((DMA1->ISR & DMA_ISR_TEIF3) != 0) {
    DMA1->IFCR |= DMA_IFCR_CTEIF3;
    DMA1_Channel3->CCR &= ~DMA_CCR_EN;
    Flag.I2C_TX_End = 1;
    Flag.I2C_TX_Err = 1;
  }
  /* USER CODE END DMA1_Channel2_3_IRQn 1 */
}

/**
  * @brief This function handles TIM14 global interrupt.
  */
void TIM14_IRQHandler(void)
{
  /* USER CODE BEGIN TIM14_IRQn 0 */
  if ((TIM14->SR & TIM_SR_UIF) != 0) {
    /* Update interrupt flag */
    TIM14->SR |= TIM_SR_UIF;
  }
  /* USER CODE END TIM14_IRQn 0 */
  /* USER CODE BEGIN TIM14_IRQn 1 */
  if ((TIM14->SR & TIM_SR_CC1IF) != 0) {
    /* Capture/Compare Interrupt */
    TIM14->SR |= TIM_SR_CC1IF;

    /* disable unneeded channel */
    if (Flag.Blink_1 != 0) {
      TUBE_A_OFF;
    }
    if (Flag.Blink_2 != 0) {
      TUBE_B_OFF;
    }
    if (Flag.Blink_3 != 0) {
      TUBE_C_OFF;
    }
    if (Flag.Blink_4 != 0) {
      TUBE_D_OFF;
    }
    if (Flag.Blink_5 != 0) {
      TUBE_E_OFF;
    }
  }
  /* USER CODE END TIM14_IRQn 1 */
}

/**
  * @brief This function handles TIM16 global interrupt.
  */
void TIM16_IRQHandler(void)
{
  /* USER CODE BEGIN TIM16_IRQn 0 */
  if ((TIM16->SR & TIM_SR_UIF) != 0) {
    /* Update interrupt flag */
    TIM16->SR |= TIM_SR_UIF;
  }
  /* USER CODE END TIM16_IRQn 0 */
  /* USER CODE BEGIN TIM16_IRQn 1 */

  /* USER CODE END TIM16_IRQn 1 */
}

/**
  * @brief This function handles TIM17 global interrupt.
  */
void TIM17_IRQHandler(void)
{
  /* USER CODE BEGIN TIM17_IRQn 0 */
  if ((TIM17->SR & TIM_SR_UIF) != 0) {
    /* Update interrupt flag */
    TIM17->SR |= TIM_SR_UIF;
  }
  /* USER CODE END TIM17_IRQn 0 */
  /* USER CODE BEGIN TIM17_IRQn 1 */

  /* USER CODE END TIM17_IRQn 1 */
}

/**
  * @brief This function handles SPI1 global interrupt.
  */
void SPI1_IRQHandler(void)
{
  /* USER CODE BEGIN SPI1_IRQn 0 */

  /* USER CODE END SPI1_IRQn 0 */
  /* USER CODE BEGIN SPI1_IRQn 1 */

  /* USER CODE END SPI1_IRQn 1 */
}

/**
  * @brief This function handles USART1 global interrupt / USART1 wake-up interrupt through EXTI line 25.
  */
void USART1_IRQHandler(void)
{
  /* USER CODE BEGIN USART1_IRQn 0 */

  /* USER CODE END USART1_IRQn 0 */
  /* USER CODE BEGIN USART1_IRQn 1 */

  /* USER CODE END USART1_IRQn 1 */
}

/* USER CODE BEGIN 1 */

/* USER CODE END 1 */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/