I2C should work...

Src/main.c

@@ -253,38 +253,49 @@ static void RTC_Init(void) {
 
   /* Wait for I2C */
   while ( I2C1->ISR & I2C_ISR_BUSY ) {};
+  I2C2->CR1 &= ~I2C_CR1_PE;
 
   /* Fill buffer with register address and register value */
   i2cBufTX[0] = DS3231_CONTROL_ADDR;
-  i2cBufTX[1] = DS3231_CONV;
+  i2cBufTX[1] = 0x0; // set 1 Hz output squware
+  i2cBufTX[2] = 0x0; // disable 32 kHz output
+
+  LL_I2C_SetSlaveAddr(I2C1, I2C_ADDR_RTC);
+  LL_I2C_SetTransferRequest(I2C1, LL_I2C_REQUEST_WRITE);
+  LL_I2C_SetTransferSize(I2C1, 3); // controll addr + 2 bytes of data
+  LL_I2C_EnableDMAReq_TX(I2C1);
+  I2C2->CR1 |= I2C_CR1_PE;
+  LL_I2C_GenerateStartCondition(I2C1);
 
   /* Set AUTOEND mode, the device address and number bytes to send. */
 //  I2C1->CR2 &= ~( I2C_CR2_SADD | I2C_CR2_NBYTES | AUTOEND );
-  I2C1->CR2 = ( I2C_CR2_AUTOEND | I2C_ADDR_RTC << I2C_CR2_SADD_Pos | 2 << I2C_CR2_NBYTES_Pos );
+///  I2C1->CR2 = ( I2C_CR2_AUTOEND | I2C_ADDR_RTC << I2C_CR2_SADD_Pos | 2 << I2C_CR2_NBYTES_Pos );
   /* Enable I2C DMA requests. */
-  I2C1->CR1 |= ( I2C_CR1_TXDMAEN );
+///  I2C1->CR1 |= ( I2C_CR1_TXDMAEN );
   /* Send a start signal. */
-  I2C1->CR2 |= ( I2C_CR2_START );
+///  I2C1->CR2 |= ( I2C_CR2_START );
   /* (DMA is now running.) */
 }
 
 static void RTC_ReadAll(void) {
+/*
   while ( I2C1->ISR & I2C_ISR_BUSY ) {};
 
   LL_I2C_SetSlaveAddr(I2C1, I2C_ADDR_RTC);
   LL_I2C_SetTransferRequest(I2C1, LL_I2C_REQUEST_WRITE);
   LL_I2C_SetTransferSize(I2C1, 1);
-  i2cBufTX[0] = DS3231_CALENDAR_ADDR;
+  i2cBufTX[0] = DS3231_TIME_CAL_ADDR;
   LL_I2C_EnableDMAReq_TX(I2C1);
   LL_I2C_GenerateStartCondition(I2C1);
-
+*/
   while ( I2C1->ISR & I2C_ISR_BUSY ) {};
 
   Flag.I2C_RX_End = 0;
   Flag.I2C_TX_End = 0;
-
+  /* Reading all from address 00h */
+  LL_I2C_SetSlaveAddr(I2C1, I2C_ADDR_RTC);
   LL_I2C_SetTransferRequest(I2C1, LL_I2C_REQUEST_READ);
-  LL_I2C_SetTransferSize(I2C1, 7); // Clock + Calendar = 7 bytes
+  LL_I2C_SetTransferSize(I2C1, 0x12); // Clock + Calendar = 7 bytes
   LL_I2C_EnableDMAReq_RX(I2C1);
   LL_I2C_GenerateStartCondition(I2C1);
 }
@@ -404,6 +415,10 @@ static void MX_I2C1_Init(void)
 
   LL_DMA_SetMemorySize(DMA1, LL_DMA_CHANNEL_3, LL_DMA_MDATAALIGN_BYTE);
 
+  /* I2C1 interrupt Init */
+  NVIC_SetPriority(I2C1_IRQn, 0);
+  NVIC_EnableIRQ(I2C1_IRQn);
+
   /* USER CODE BEGIN I2C1_Init 1 */
   /* Enable DMA transfer complete/error interrupts */
   LL_DMA_EnableIT_TC(DMA1, LL_DMA_CHANNEL_2);
@@ -428,6 +443,7 @@ static void MX_I2C1_Init(void)
   LL_I2C_DisableGeneralCall(I2C1);
   LL_I2C_EnableClockStretching(I2C1);
   /* USER CODE BEGIN I2C1_Init 2 */
+  LL_I2C_EnableIT_NACK(I2C1);
 
   /* USER CODE END I2C1_Init 2 */
 

Src/stm32g0xx_it.c

@@ -255,13 +255,31 @@ void TIM16_IRQHandler(void)
 void TIM17_IRQHandler(void)
 {
   /* USER CODE BEGIN TIM17_IRQn 0 */
-
+  /* check for NACK ??? */
+  if ( (I2C2->ISR & I2C_ISR_NACF) != 0 ) {
+    I2C->ICR |= I2C_ICR_NACKCF;
+    IN15_Percent;
+  }
   /* USER CODE END TIM17_IRQn 0 */
   /* USER CODE BEGIN TIM17_IRQn 1 */
 
   /* USER CODE END TIM17_IRQn 1 */
 }
 
+/**
+  * @brief This function handles I2C1 event global interrupt / I2C1 wake-up interrupt through EXTI line 23.
+  */
+void I2C1_IRQHandler(void)
+{
+  /* USER CODE BEGIN I2C1_IRQn 0 */
+
+  /* USER CODE END I2C1_IRQn 0 */
+
+  /* USER CODE BEGIN I2C1_IRQn 1 */
+
+  /* USER CODE END I2C1_IRQn 1 */
+}
+
 /**
   * @brief This function handles SPI1 global interrupt.
   */