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@@ -228,8 +228,8 @@ void SystemClock_Config(void)
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}
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- RCC->PLLCFGR &= ~(RCC_PLLCFGR_PLLSRC | RCC_PLLCFGR_PLLM | RCC_PLLCFGR_PLLN | RCC_PLLCFGR_PLLR);
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- RCC->PLLCFGR |= (RCC_PLLCFGR_PLLSRC_HSI | (9 << RCC_PLLCFGR_PLLN_Pos) | RCC_PLLCFGR_PLLR_2 | RCC_PLLCFGR_PLLR_0);
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+
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+ RCC->PLLCFGR = (RCC_PLLCFGR_PLLSRC_HSI | RCC_PLLCFGR_PLLM_0 | (9 << RCC_PLLCFGR_PLLN_Pos) | RCC_PLLCFGR_PLLR_1);
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RCC->PLLCFGR |= RCC_PLLCFGR_PLLREN;
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RCC->CR |= RCC_CR_PLLON;
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while((RCC->CR & RCC_CR_PLLRDY) == 0)
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@@ -267,14 +267,14 @@ void SystemClock_Config(void)
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static void GPIO_Init(void)
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{
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-
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- EXTI->EMR1 &= ~(EXTI_IMR1_IM14);
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- EXTI->EMR1 |= EXTI_IMR1_IM14;
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+
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+ EXTI->IMR1 |= EXTI_IMR1_IM14;
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+
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+
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- EXTI->FTSR1 &= ~(EXTI_IMR1_IM14);
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- EXTI->FTSR1 |= EXTI_IMR1_IM14;
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-
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- EXTI->FTSR1 |= EXTI_IMR1_IM14;
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+ EXTI->FTSR1 = EXTI_FTSR1_FT14;
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+
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+ EXTI->EXTICR[3] = EXTI_EXTICR4_EXTI14_1;
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NVIC_SetPriority(EXTI4_15_IRQn, 0);
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@@ -405,7 +405,7 @@ static void SPI1_Init(void)
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Enable DMA transfer complete/error interrupts */
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- DMA1_Channel1->CCR = (DMA_CCR_PL_1 | DMA_CCR_MINC | DMA_CCR_CIRC | DMA_CCR_TEIE | DMA_CCR_TCIE);
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+ DMA1_Channel1->CCR = (DMA_CCR_PL_1 | DMA_CCR_MINC | DMA_CCR_CIRC | DMA_CCR_TEIE | DMA_CCR_DIR | DMA_CCR_TCIE);
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DMAMUX1_Channel1->CCR = 0x11;
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