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@@ -222,7 +222,7 @@ void HSV2LED(const int hue, const uint8_t sat, const uint8_t val) {
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void SystemClock_Config(void)
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{
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/* HSI configuration and activation */
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- RCC->CR |= RCC_CR_HSIKERON; // Enable HSI even in stop mode
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+ RCC->CR |= RCC_CR_HSION; // Enable HSI
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while((RCC->CR & RCC_CR_HSIRDY) == 0)
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{
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}
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@@ -368,13 +368,13 @@ static void I2C1_Init(void)
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transfer error interrupt enable, transfer complete interrupt enable */
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DMA1_Channel2->CCR = (DMA_CCR_PL_0 | DMA_CCR_MINC | DMA_CCR_TEIE | DMA_CCR_TCIE);
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/* Route DMA channel 2 to I2C1 RX */
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- DMAMUX1_Channel2->CCR = 10;
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+ DMAMUX1_Channel1->CCR = 10;
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/* I2C1_TX Init: Priority medium, Memory increment, read from memory,
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transfer error interrupt enable, transfer complete interrupt enable */
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DMA1_Channel3->CCR = (DMA_CCR_PL_0 | DMA_CCR_MINC| DMA_CCR_DIR | DMA_CCR_TEIE | DMA_CCR_TCIE);
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/* Route DMA channel 3 to I2C1 TX */
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- DMAMUX1_Channel3->CCR = 11;
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+ DMAMUX1_Channel2->CCR = 11;
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/** I2C Initialization: I2C_Fast */
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I2C1->TIMINGR = 0x0010061A;
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@@ -407,15 +407,15 @@ static void SPI1_Init(void)
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Enable DMA transfer complete/error interrupts */
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DMA1_Channel1->CCR = (DMA_CCR_PL_1 | DMA_CCR_MINC | DMA_CCR_CIRC | DMA_CCR_TEIE | DMA_CCR_DIR | DMA_CCR_TCIE);
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/* Route DMA channel 1 to SPI1 TX */
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- DMAMUX1_Channel1->CCR = 0x11;
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+ DMAMUX1_Channel0->CCR = 0x11;
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/* SPI1 interrupt Init */
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NVIC_SetPriority(SPI1_IRQn, 0);
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NVIC_EnableIRQ(SPI1_IRQn);
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/* SPI1 parameter configuration: master mode, data 8 bit, divider = 16, TX DMA */
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- SPI1->CR1 = (SPI_CR1_MSTR | SPI_CR1_BR_1 | SPI_CR1_BR_0);
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- SPI1->CR2 = (SPI_CR2_DS_2 | SPI_CR2_DS_1 | SPI_CR2_DS_0 | SPI_CR2_TXDMAEN);
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+ SPI1->CR1 = (SPI_CR1_MSTR | SPI_CR1_BR_1 | SPI_CR1_BR_0 | SPI_CR1_SSM | SPI_CR1_SSI);
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+ SPI1->CR2 = (SPI_CR2_DS_2 | SPI_CR2_DS_1 | SPI_CR2_DS_0 | SPI_CR2_TXDMAEN | SPI_CR2_FRXTH);
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}
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/**
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