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|
- <?xml version="1.0" encoding="utf-8" standalone="no"?>
- <device schemaVersion="1.1"
- xmlns:xs="http://www.w3.org/2001/XMLSchema-instance"
- xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd">
- <name>STM32F030</name>
- <version>1.0</version>
- <description>STM32F030</description>
- <!--Bus Interface Properties-->
- <!--Cortex-M0 is byte addressable-->
- <addressUnitBits>8</addressUnitBits>
- <!--the maximum data bit width accessible within a single transfer-->
- <width>32</width>
- <!--Register Default Properties-->
- <size>0x20</size>
- <resetValue>0x0</resetValue>
- <resetMask>0xFFFFFFFF</resetMask>
- <peripherals>
- <peripheral>
- <name>CRC</name>
- <description>cyclic redundancy check calculation
- unit</description>
- <groupName>CRC</groupName>
- <baseAddress>0x40023000</baseAddress>
- <addressBlock>
- <offset>0x0</offset>
- <size>0x400</size>
- <usage>registers</usage>
- </addressBlock>
- <registers>
- <register>
- <name>DR</name>
- <displayName>DR</displayName>
- <description>Data register</description>
- <addressOffset>0x0</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0xFFFFFFFF</resetValue>
- <fields>
- <field>
- <name>DR</name>
- <description>Data register bits</description>
- <bitOffset>0</bitOffset>
- <bitWidth>32</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>IDR</name>
- <displayName>IDR</displayName>
- <description>Independent data register</description>
- <addressOffset>0x4</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>IDR</name>
- <description>General-purpose 8-bit data register
- bits</description>
- <bitOffset>0</bitOffset>
- <bitWidth>8</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>CR</name>
- <displayName>CR</displayName>
- <description>Control register</description>
- <addressOffset>0x8</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>RESET</name>
- <description>reset bit</description>
- <bitOffset>0</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>REV_IN</name>
- <description>Reverse input data</description>
- <bitOffset>5</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>REV_OUT</name>
- <description>Reverse output data</description>
- <bitOffset>7</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>INIT</name>
- <displayName>INIT</displayName>
- <description>Initial CRC value</description>
- <addressOffset>0xC</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0xFFFFFFFF</resetValue>
- <fields>
- <field>
- <name>INIT</name>
- <description>Programmable initial CRC
- value</description>
- <bitOffset>0</bitOffset>
- <bitWidth>32</bitWidth>
- </field>
- </fields>
- </register>
- </registers>
- </peripheral>
- <peripheral>
- <name>GPIOF</name>
- <description>General-purpose I/Os</description>
- <groupName>GPIO</groupName>
- <baseAddress>0x48001400</baseAddress>
- <addressBlock>
- <offset>0x0</offset>
- <size>0x400</size>
- <usage>registers</usage>
- </addressBlock>
- <registers>
- <register>
- <name>MODER</name>
- <displayName>MODER</displayName>
- <description>GPIO port mode register</description>
- <addressOffset>0x0</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>MODER15</name>
- <description>Port x configuration bits (y =
- 0..15)</description>
- <bitOffset>30</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>MODER14</name>
- <description>Port x configuration bits (y =
- 0..15)</description>
- <bitOffset>28</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>MODER13</name>
- <description>Port x configuration bits (y =
- 0..15)</description>
- <bitOffset>26</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>MODER12</name>
- <description>Port x configuration bits (y =
- 0..15)</description>
- <bitOffset>24</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>MODER11</name>
- <description>Port x configuration bits (y =
- 0..15)</description>
- <bitOffset>22</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>MODER10</name>
- <description>Port x configuration bits (y =
- 0..15)</description>
- <bitOffset>20</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>MODER9</name>
- <description>Port x configuration bits (y =
- 0..15)</description>
- <bitOffset>18</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>MODER8</name>
- <description>Port x configuration bits (y =
- 0..15)</description>
- <bitOffset>16</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>MODER7</name>
- <description>Port x configuration bits (y =
- 0..15)</description>
- <bitOffset>14</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>MODER6</name>
- <description>Port x configuration bits (y =
- 0..15)</description>
- <bitOffset>12</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>MODER5</name>
- <description>Port x configuration bits (y =
- 0..15)</description>
- <bitOffset>10</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>MODER4</name>
- <description>Port x configuration bits (y =
- 0..15)</description>
- <bitOffset>8</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>MODER3</name>
- <description>Port x configuration bits (y =
- 0..15)</description>
- <bitOffset>6</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>MODER2</name>
- <description>Port x configuration bits (y =
- 0..15)</description>
- <bitOffset>4</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>MODER1</name>
- <description>Port x configuration bits (y =
- 0..15)</description>
- <bitOffset>2</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>MODER0</name>
- <description>Port x configuration bits (y =
- 0..15)</description>
- <bitOffset>0</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>OTYPER</name>
- <displayName>OTYPER</displayName>
- <description>GPIO port output type register</description>
- <addressOffset>0x4</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>OT15</name>
- <description>Port x configuration bit
- 15</description>
- <bitOffset>15</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>OT14</name>
- <description>Port x configuration bit
- 14</description>
- <bitOffset>14</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>OT13</name>
- <description>Port x configuration bit
- 13</description>
- <bitOffset>13</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>OT12</name>
- <description>Port x configuration bit
- 12</description>
- <bitOffset>12</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>OT11</name>
- <description>Port x configuration bit
- 11</description>
- <bitOffset>11</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>OT10</name>
- <description>Port x configuration bit
- 10</description>
- <bitOffset>10</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>OT9</name>
- <description>Port x configuration bit 9</description>
- <bitOffset>9</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>OT8</name>
- <description>Port x configuration bit 8</description>
- <bitOffset>8</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>OT7</name>
- <description>Port x configuration bit 7</description>
- <bitOffset>7</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>OT6</name>
- <description>Port x configuration bit 6</description>
- <bitOffset>6</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>OT5</name>
- <description>Port x configuration bit 5</description>
- <bitOffset>5</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>OT4</name>
- <description>Port x configuration bit 4</description>
- <bitOffset>4</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>OT3</name>
- <description>Port x configuration bit 3</description>
- <bitOffset>3</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>OT2</name>
- <description>Port x configuration bit 2</description>
- <bitOffset>2</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>OT1</name>
- <description>Port x configuration bit 1</description>
- <bitOffset>1</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>OT0</name>
- <description>Port x configuration bit 0</description>
- <bitOffset>0</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>OSPEEDR</name>
- <displayName>OSPEEDR</displayName>
- <description>GPIO port output speed
- register</description>
- <addressOffset>0x8</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>OSPEEDR15</name>
- <description>Port x configuration bits (y =
- 0..15)</description>
- <bitOffset>30</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>OSPEEDR14</name>
- <description>Port x configuration bits (y =
- 0..15)</description>
- <bitOffset>28</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>OSPEEDR13</name>
- <description>Port x configuration bits (y =
- 0..15)</description>
- <bitOffset>26</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>OSPEEDR12</name>
- <description>Port x configuration bits (y =
- 0..15)</description>
- <bitOffset>24</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>OSPEEDR11</name>
- <description>Port x configuration bits (y =
- 0..15)</description>
- <bitOffset>22</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>OSPEEDR10</name>
- <description>Port x configuration bits (y =
- 0..15)</description>
- <bitOffset>20</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>OSPEEDR9</name>
- <description>Port x configuration bits (y =
- 0..15)</description>
- <bitOffset>18</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>OSPEEDR8</name>
- <description>Port x configuration bits (y =
- 0..15)</description>
- <bitOffset>16</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>OSPEEDR7</name>
- <description>Port x configuration bits (y =
- 0..15)</description>
- <bitOffset>14</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>OSPEEDR6</name>
- <description>Port x configuration bits (y =
- 0..15)</description>
- <bitOffset>12</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>OSPEEDR5</name>
- <description>Port x configuration bits (y =
- 0..15)</description>
- <bitOffset>10</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>OSPEEDR4</name>
- <description>Port x configuration bits (y =
- 0..15)</description>
- <bitOffset>8</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>OSPEEDR3</name>
- <description>Port x configuration bits (y =
- 0..15)</description>
- <bitOffset>6</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>OSPEEDR2</name>
- <description>Port x configuration bits (y =
- 0..15)</description>
- <bitOffset>4</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>OSPEEDR1</name>
- <description>Port x configuration bits (y =
- 0..15)</description>
- <bitOffset>2</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>OSPEEDR0</name>
- <description>Port x configuration bits (y =
- 0..15)</description>
- <bitOffset>0</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>PUPDR</name>
- <displayName>PUPDR</displayName>
- <description>GPIO port pull-up/pull-down
- register</description>
- <addressOffset>0xC</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>PUPDR15</name>
- <description>Port x configuration bits (y =
- 0..15)</description>
- <bitOffset>30</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>PUPDR14</name>
- <description>Port x configuration bits (y =
- 0..15)</description>
- <bitOffset>28</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>PUPDR13</name>
- <description>Port x configuration bits (y =
- 0..15)</description>
- <bitOffset>26</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>PUPDR12</name>
- <description>Port x configuration bits (y =
- 0..15)</description>
- <bitOffset>24</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>PUPDR11</name>
- <description>Port x configuration bits (y =
- 0..15)</description>
- <bitOffset>22</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>PUPDR10</name>
- <description>Port x configuration bits (y =
- 0..15)</description>
- <bitOffset>20</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>PUPDR9</name>
- <description>Port x configuration bits (y =
- 0..15)</description>
- <bitOffset>18</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>PUPDR8</name>
- <description>Port x configuration bits (y =
- 0..15)</description>
- <bitOffset>16</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>PUPDR7</name>
- <description>Port x configuration bits (y =
- 0..15)</description>
- <bitOffset>14</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>PUPDR6</name>
- <description>Port x configuration bits (y =
- 0..15)</description>
- <bitOffset>12</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>PUPDR5</name>
- <description>Port x configuration bits (y =
- 0..15)</description>
- <bitOffset>10</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>PUPDR4</name>
- <description>Port x configuration bits (y =
- 0..15)</description>
- <bitOffset>8</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>PUPDR3</name>
- <description>Port x configuration bits (y =
- 0..15)</description>
- <bitOffset>6</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>PUPDR2</name>
- <description>Port x configuration bits (y =
- 0..15)</description>
- <bitOffset>4</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>PUPDR1</name>
- <description>Port x configuration bits (y =
- 0..15)</description>
- <bitOffset>2</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>PUPDR0</name>
- <description>Port x configuration bits (y =
- 0..15)</description>
- <bitOffset>0</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>IDR</name>
- <displayName>IDR</displayName>
- <description>GPIO port input data register</description>
- <addressOffset>0x10</addressOffset>
- <size>0x20</size>
- <access>read-only</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>IDR15</name>
- <description>Port input data (y =
- 0..15)</description>
- <bitOffset>15</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>IDR14</name>
- <description>Port input data (y =
- 0..15)</description>
- <bitOffset>14</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>IDR13</name>
- <description>Port input data (y =
- 0..15)</description>
- <bitOffset>13</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>IDR12</name>
- <description>Port input data (y =
- 0..15)</description>
- <bitOffset>12</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>IDR11</name>
- <description>Port input data (y =
- 0..15)</description>
- <bitOffset>11</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>IDR10</name>
- <description>Port input data (y =
- 0..15)</description>
- <bitOffset>10</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>IDR9</name>
- <description>Port input data (y =
- 0..15)</description>
- <bitOffset>9</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>IDR8</name>
- <description>Port input data (y =
- 0..15)</description>
- <bitOffset>8</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>IDR7</name>
- <description>Port input data (y =
- 0..15)</description>
- <bitOffset>7</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>IDR6</name>
- <description>Port input data (y =
- 0..15)</description>
- <bitOffset>6</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>IDR5</name>
- <description>Port input data (y =
- 0..15)</description>
- <bitOffset>5</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>IDR4</name>
- <description>Port input data (y =
- 0..15)</description>
- <bitOffset>4</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>IDR3</name>
- <description>Port input data (y =
- 0..15)</description>
- <bitOffset>3</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>IDR2</name>
- <description>Port input data (y =
- 0..15)</description>
- <bitOffset>2</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>IDR1</name>
- <description>Port input data (y =
- 0..15)</description>
- <bitOffset>1</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>IDR0</name>
- <description>Port input data (y =
- 0..15)</description>
- <bitOffset>0</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>ODR</name>
- <displayName>ODR</displayName>
- <description>GPIO port output data register</description>
- <addressOffset>0x14</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>ODR15</name>
- <description>Port output data (y =
- 0..15)</description>
- <bitOffset>15</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>ODR14</name>
- <description>Port output data (y =
- 0..15)</description>
- <bitOffset>14</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>ODR13</name>
- <description>Port output data (y =
- 0..15)</description>
- <bitOffset>13</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>ODR12</name>
- <description>Port output data (y =
- 0..15)</description>
- <bitOffset>12</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>ODR11</name>
- <description>Port output data (y =
- 0..15)</description>
- <bitOffset>11</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>ODR10</name>
- <description>Port output data (y =
- 0..15)</description>
- <bitOffset>10</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>ODR9</name>
- <description>Port output data (y =
- 0..15)</description>
- <bitOffset>9</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>ODR8</name>
- <description>Port output data (y =
- 0..15)</description>
- <bitOffset>8</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>ODR7</name>
- <description>Port output data (y =
- 0..15)</description>
- <bitOffset>7</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>ODR6</name>
- <description>Port output data (y =
- 0..15)</description>
- <bitOffset>6</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>ODR5</name>
- <description>Port output data (y =
- 0..15)</description>
- <bitOffset>5</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>ODR4</name>
- <description>Port output data (y =
- 0..15)</description>
- <bitOffset>4</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>ODR3</name>
- <description>Port output data (y =
- 0..15)</description>
- <bitOffset>3</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>ODR2</name>
- <description>Port output data (y =
- 0..15)</description>
- <bitOffset>2</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>ODR1</name>
- <description>Port output data (y =
- 0..15)</description>
- <bitOffset>1</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>ODR0</name>
- <description>Port output data (y =
- 0..15)</description>
- <bitOffset>0</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>BSRR</name>
- <displayName>BSRR</displayName>
- <description>GPIO port bit set/reset
- register</description>
- <addressOffset>0x18</addressOffset>
- <size>0x20</size>
- <access>write-only</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>BR15</name>
- <description>Port x reset bit y (y =
- 0..15)</description>
- <bitOffset>31</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>BR14</name>
- <description>Port x reset bit y (y =
- 0..15)</description>
- <bitOffset>30</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>BR13</name>
- <description>Port x reset bit y (y =
- 0..15)</description>
- <bitOffset>29</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>BR12</name>
- <description>Port x reset bit y (y =
- 0..15)</description>
- <bitOffset>28</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>BR11</name>
- <description>Port x reset bit y (y =
- 0..15)</description>
- <bitOffset>27</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>BR10</name>
- <description>Port x reset bit y (y =
- 0..15)</description>
- <bitOffset>26</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>BR9</name>
- <description>Port x reset bit y (y =
- 0..15)</description>
- <bitOffset>25</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>BR8</name>
- <description>Port x reset bit y (y =
- 0..15)</description>
- <bitOffset>24</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>BR7</name>
- <description>Port x reset bit y (y =
- 0..15)</description>
- <bitOffset>23</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>BR6</name>
- <description>Port x reset bit y (y =
- 0..15)</description>
- <bitOffset>22</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>BR5</name>
- <description>Port x reset bit y (y =
- 0..15)</description>
- <bitOffset>21</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>BR4</name>
- <description>Port x reset bit y (y =
- 0..15)</description>
- <bitOffset>20</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>BR3</name>
- <description>Port x reset bit y (y =
- 0..15)</description>
- <bitOffset>19</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>BR2</name>
- <description>Port x reset bit y (y =
- 0..15)</description>
- <bitOffset>18</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>BR1</name>
- <description>Port x reset bit y (y =
- 0..15)</description>
- <bitOffset>17</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>BR0</name>
- <description>Port x set bit y (y=
- 0..15)</description>
- <bitOffset>16</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>BS15</name>
- <description>Port x set bit y (y=
- 0..15)</description>
- <bitOffset>15</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>BS14</name>
- <description>Port x set bit y (y=
- 0..15)</description>
- <bitOffset>14</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>BS13</name>
- <description>Port x set bit y (y=
- 0..15)</description>
- <bitOffset>13</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>BS12</name>
- <description>Port x set bit y (y=
- 0..15)</description>
- <bitOffset>12</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>BS11</name>
- <description>Port x set bit y (y=
- 0..15)</description>
- <bitOffset>11</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>BS10</name>
- <description>Port x set bit y (y=
- 0..15)</description>
- <bitOffset>10</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>BS9</name>
- <description>Port x set bit y (y=
- 0..15)</description>
- <bitOffset>9</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>BS8</name>
- <description>Port x set bit y (y=
- 0..15)</description>
- <bitOffset>8</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>BS7</name>
- <description>Port x set bit y (y=
- 0..15)</description>
- <bitOffset>7</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>BS6</name>
- <description>Port x set bit y (y=
- 0..15)</description>
- <bitOffset>6</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>BS5</name>
- <description>Port x set bit y (y=
- 0..15)</description>
- <bitOffset>5</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>BS4</name>
- <description>Port x set bit y (y=
- 0..15)</description>
- <bitOffset>4</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>BS3</name>
- <description>Port x set bit y (y=
- 0..15)</description>
- <bitOffset>3</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>BS2</name>
- <description>Port x set bit y (y=
- 0..15)</description>
- <bitOffset>2</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>BS1</name>
- <description>Port x set bit y (y=
- 0..15)</description>
- <bitOffset>1</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>BS0</name>
- <description>Port x set bit y (y=
- 0..15)</description>
- <bitOffset>0</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>LCKR</name>
- <displayName>LCKR</displayName>
- <description>GPIO port configuration lock
- register</description>
- <addressOffset>0x1C</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>LCKK</name>
- <description>Port x lock bit y</description>
- <bitOffset>16</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>LCK15</name>
- <description>Port x lock bit y (y=
- 0..15)</description>
- <bitOffset>15</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>LCK14</name>
- <description>Port x lock bit y (y=
- 0..15)</description>
- <bitOffset>14</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>LCK13</name>
- <description>Port x lock bit y (y=
- 0..15)</description>
- <bitOffset>13</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>LCK12</name>
- <description>Port x lock bit y (y=
- 0..15)</description>
- <bitOffset>12</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>LCK11</name>
- <description>Port x lock bit y (y=
- 0..15)</description>
- <bitOffset>11</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>LCK10</name>
- <description>Port x lock bit y (y=
- 0..15)</description>
- <bitOffset>10</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>LCK9</name>
- <description>Port x lock bit y (y=
- 0..15)</description>
- <bitOffset>9</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>LCK8</name>
- <description>Port x lock bit y (y=
- 0..15)</description>
- <bitOffset>8</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>LCK7</name>
- <description>Port x lock bit y (y=
- 0..15)</description>
- <bitOffset>7</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>LCK6</name>
- <description>Port x lock bit y (y=
- 0..15)</description>
- <bitOffset>6</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>LCK5</name>
- <description>Port x lock bit y (y=
- 0..15)</description>
- <bitOffset>5</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>LCK4</name>
- <description>Port x lock bit y (y=
- 0..15)</description>
- <bitOffset>4</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>LCK3</name>
- <description>Port x lock bit y (y=
- 0..15)</description>
- <bitOffset>3</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>LCK2</name>
- <description>Port x lock bit y (y=
- 0..15)</description>
- <bitOffset>2</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>LCK1</name>
- <description>Port x lock bit y (y=
- 0..15)</description>
- <bitOffset>1</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>LCK0</name>
- <description>Port x lock bit y (y=
- 0..15)</description>
- <bitOffset>0</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>AFRL</name>
- <displayName>AFRL</displayName>
- <description>GPIO alternate function low
- register</description>
- <addressOffset>0x20</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>AFRL7</name>
- <description>Alternate function selection for port x
- bit y (y = 0..7)</description>
- <bitOffset>28</bitOffset>
- <bitWidth>4</bitWidth>
- </field>
- <field>
- <name>AFRL6</name>
- <description>Alternate function selection for port x
- bit y (y = 0..7)</description>
- <bitOffset>24</bitOffset>
- <bitWidth>4</bitWidth>
- </field>
- <field>
- <name>AFRL5</name>
- <description>Alternate function selection for port x
- bit y (y = 0..7)</description>
- <bitOffset>20</bitOffset>
- <bitWidth>4</bitWidth>
- </field>
- <field>
- <name>AFRL4</name>
- <description>Alternate function selection for port x
- bit y (y = 0..7)</description>
- <bitOffset>16</bitOffset>
- <bitWidth>4</bitWidth>
- </field>
- <field>
- <name>AFRL3</name>
- <description>Alternate function selection for port x
- bit y (y = 0..7)</description>
- <bitOffset>12</bitOffset>
- <bitWidth>4</bitWidth>
- </field>
- <field>
- <name>AFRL2</name>
- <description>Alternate function selection for port x
- bit y (y = 0..7)</description>
- <bitOffset>8</bitOffset>
- <bitWidth>4</bitWidth>
- </field>
- <field>
- <name>AFRL1</name>
- <description>Alternate function selection for port x
- bit y (y = 0..7)</description>
- <bitOffset>4</bitOffset>
- <bitWidth>4</bitWidth>
- </field>
- <field>
- <name>AFRL0</name>
- <description>Alternate function selection for port x
- bit y (y = 0..7)</description>
- <bitOffset>0</bitOffset>
- <bitWidth>4</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>AFRH</name>
- <displayName>AFRH</displayName>
- <description>GPIO alternate function high
- register</description>
- <addressOffset>0x24</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>AFRH15</name>
- <description>Alternate function selection for port x
- bit y (y = 8..15)</description>
- <bitOffset>28</bitOffset>
- <bitWidth>4</bitWidth>
- </field>
- <field>
- <name>AFRH14</name>
- <description>Alternate function selection for port x
- bit y (y = 8..15)</description>
- <bitOffset>24</bitOffset>
- <bitWidth>4</bitWidth>
- </field>
- <field>
- <name>AFRH13</name>
- <description>Alternate function selection for port x
- bit y (y = 8..15)</description>
- <bitOffset>20</bitOffset>
- <bitWidth>4</bitWidth>
- </field>
- <field>
- <name>AFRH12</name>
- <description>Alternate function selection for port x
- bit y (y = 8..15)</description>
- <bitOffset>16</bitOffset>
- <bitWidth>4</bitWidth>
- </field>
- <field>
- <name>AFRH11</name>
- <description>Alternate function selection for port x
- bit y (y = 8..15)</description>
- <bitOffset>12</bitOffset>
- <bitWidth>4</bitWidth>
- </field>
- <field>
- <name>AFRH10</name>
- <description>Alternate function selection for port x
- bit y (y = 8..15)</description>
- <bitOffset>8</bitOffset>
- <bitWidth>4</bitWidth>
- </field>
- <field>
- <name>AFRH9</name>
- <description>Alternate function selection for port x
- bit y (y = 8..15)</description>
- <bitOffset>4</bitOffset>
- <bitWidth>4</bitWidth>
- </field>
- <field>
- <name>AFRH8</name>
- <description>Alternate function selection for port x
- bit y (y = 8..15)</description>
- <bitOffset>0</bitOffset>
- <bitWidth>4</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>BRR</name>
- <displayName>BRR</displayName>
- <description>Port bit reset register</description>
- <addressOffset>0x28</addressOffset>
- <size>0x20</size>
- <access>write-only</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>BR0</name>
- <description>Port x Reset bit y</description>
- <bitOffset>0</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>BR1</name>
- <description>Port x Reset bit y</description>
- <bitOffset>1</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>BR2</name>
- <description>Port x Reset bit y</description>
- <bitOffset>2</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>BR3</name>
- <description>Port x Reset bit y</description>
- <bitOffset>3</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>BR4</name>
- <description>Port x Reset bit y</description>
- <bitOffset>4</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>BR5</name>
- <description>Port x Reset bit y</description>
- <bitOffset>5</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>BR6</name>
- <description>Port x Reset bit y</description>
- <bitOffset>6</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>BR7</name>
- <description>Port x Reset bit y</description>
- <bitOffset>7</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>BR8</name>
- <description>Port x Reset bit y</description>
- <bitOffset>8</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>BR9</name>
- <description>Port x Reset bit y</description>
- <bitOffset>9</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>BR10</name>
- <description>Port x Reset bit y</description>
- <bitOffset>10</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>BR11</name>
- <description>Port x Reset bit y</description>
- <bitOffset>11</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>BR12</name>
- <description>Port x Reset bit y</description>
- <bitOffset>12</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>BR13</name>
- <description>Port x Reset bit y</description>
- <bitOffset>13</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>BR14</name>
- <description>Port x Reset bit y</description>
- <bitOffset>14</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>BR15</name>
- <description>Port x Reset bit y</description>
- <bitOffset>15</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- </fields>
- </register>
- </registers>
- </peripheral>
- <peripheral derivedFrom="GPIOF">
- <name>GPIOD</name>
- <baseAddress>0x48000C00</baseAddress>
- </peripheral>
- <peripheral derivedFrom="GPIOF">
- <name>GPIOC</name>
- <baseAddress>0x48000800</baseAddress>
- </peripheral>
- <peripheral derivedFrom="GPIOF">
- <name>GPIOB</name>
- <baseAddress>0x48000400</baseAddress>
- </peripheral>
- <peripheral>
- <name>GPIOA</name>
- <description>General-purpose I/Os</description>
- <groupName>GPIO</groupName>
- <baseAddress>0x48000000</baseAddress>
- <addressBlock>
- <offset>0x0</offset>
- <size>0x400</size>
- <usage>registers</usage>
- </addressBlock>
- <registers>
- <register>
- <name>MODER</name>
- <displayName>MODER</displayName>
- <description>GPIO port mode register</description>
- <addressOffset>0x0</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x28000000</resetValue>
- <fields>
- <field>
- <name>MODER15</name>
- <description>Port x configuration bits (y =
- 0..15)</description>
- <bitOffset>30</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>MODER14</name>
- <description>Port x configuration bits (y =
- 0..15)</description>
- <bitOffset>28</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>MODER13</name>
- <description>Port x configuration bits (y =
- 0..15)</description>
- <bitOffset>26</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>MODER12</name>
- <description>Port x configuration bits (y =
- 0..15)</description>
- <bitOffset>24</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>MODER11</name>
- <description>Port x configuration bits (y =
- 0..15)</description>
- <bitOffset>22</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>MODER10</name>
- <description>Port x configuration bits (y =
- 0..15)</description>
- <bitOffset>20</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>MODER9</name>
- <description>Port x configuration bits (y =
- 0..15)</description>
- <bitOffset>18</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>MODER8</name>
- <description>Port x configuration bits (y =
- 0..15)</description>
- <bitOffset>16</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>MODER7</name>
- <description>Port x configuration bits (y =
- 0..15)</description>
- <bitOffset>14</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>MODER6</name>
- <description>Port x configuration bits (y =
- 0..15)</description>
- <bitOffset>12</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>MODER5</name>
- <description>Port x configuration bits (y =
- 0..15)</description>
- <bitOffset>10</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>MODER4</name>
- <description>Port x configuration bits (y =
- 0..15)</description>
- <bitOffset>8</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>MODER3</name>
- <description>Port x configuration bits (y =
- 0..15)</description>
- <bitOffset>6</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>MODER2</name>
- <description>Port x configuration bits (y =
- 0..15)</description>
- <bitOffset>4</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>MODER1</name>
- <description>Port x configuration bits (y =
- 0..15)</description>
- <bitOffset>2</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>MODER0</name>
- <description>Port x configuration bits (y =
- 0..15)</description>
- <bitOffset>0</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>OTYPER</name>
- <displayName>OTYPER</displayName>
- <description>GPIO port output type register</description>
- <addressOffset>0x4</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>OT15</name>
- <description>Port x configuration bits (y =
- 0..15)</description>
- <bitOffset>15</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>OT14</name>
- <description>Port x configuration bits (y =
- 0..15)</description>
- <bitOffset>14</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>OT13</name>
- <description>Port x configuration bits (y =
- 0..15)</description>
- <bitOffset>13</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>OT12</name>
- <description>Port x configuration bits (y =
- 0..15)</description>
- <bitOffset>12</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>OT11</name>
- <description>Port x configuration bits (y =
- 0..15)</description>
- <bitOffset>11</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>OT10</name>
- <description>Port x configuration bits (y =
- 0..15)</description>
- <bitOffset>10</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>OT9</name>
- <description>Port x configuration bits (y =
- 0..15)</description>
- <bitOffset>9</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>OT8</name>
- <description>Port x configuration bits (y =
- 0..15)</description>
- <bitOffset>8</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>OT7</name>
- <description>Port x configuration bits (y =
- 0..15)</description>
- <bitOffset>7</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>OT6</name>
- <description>Port x configuration bits (y =
- 0..15)</description>
- <bitOffset>6</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>OT5</name>
- <description>Port x configuration bits (y =
- 0..15)</description>
- <bitOffset>5</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>OT4</name>
- <description>Port x configuration bits (y =
- 0..15)</description>
- <bitOffset>4</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>OT3</name>
- <description>Port x configuration bits (y =
- 0..15)</description>
- <bitOffset>3</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>OT2</name>
- <description>Port x configuration bits (y =
- 0..15)</description>
- <bitOffset>2</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>OT1</name>
- <description>Port x configuration bits (y =
- 0..15)</description>
- <bitOffset>1</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>OT0</name>
- <description>Port x configuration bits (y =
- 0..15)</description>
- <bitOffset>0</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>OSPEEDR</name>
- <displayName>OSPEEDR</displayName>
- <description>GPIO port output speed
- register</description>
- <addressOffset>0x8</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>OSPEEDR15</name>
- <description>Port x configuration bits (y =
- 0..15)</description>
- <bitOffset>30</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>OSPEEDR14</name>
- <description>Port x configuration bits (y =
- 0..15)</description>
- <bitOffset>28</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>OSPEEDR13</name>
- <description>Port x configuration bits (y =
- 0..15)</description>
- <bitOffset>26</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>OSPEEDR12</name>
- <description>Port x configuration bits (y =
- 0..15)</description>
- <bitOffset>24</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>OSPEEDR11</name>
- <description>Port x configuration bits (y =
- 0..15)</description>
- <bitOffset>22</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>OSPEEDR10</name>
- <description>Port x configuration bits (y =
- 0..15)</description>
- <bitOffset>20</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>OSPEEDR9</name>
- <description>Port x configuration bits (y =
- 0..15)</description>
- <bitOffset>18</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>OSPEEDR8</name>
- <description>Port x configuration bits (y =
- 0..15)</description>
- <bitOffset>16</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>OSPEEDR7</name>
- <description>Port x configuration bits (y =
- 0..15)</description>
- <bitOffset>14</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>OSPEEDR6</name>
- <description>Port x configuration bits (y =
- 0..15)</description>
- <bitOffset>12</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>OSPEEDR5</name>
- <description>Port x configuration bits (y =
- 0..15)</description>
- <bitOffset>10</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>OSPEEDR4</name>
- <description>Port x configuration bits (y =
- 0..15)</description>
- <bitOffset>8</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>OSPEEDR3</name>
- <description>Port x configuration bits (y =
- 0..15)</description>
- <bitOffset>6</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>OSPEEDR2</name>
- <description>Port x configuration bits (y =
- 0..15)</description>
- <bitOffset>4</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>OSPEEDR1</name>
- <description>Port x configuration bits (y =
- 0..15)</description>
- <bitOffset>2</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>OSPEEDR0</name>
- <description>Port x configuration bits (y =
- 0..15)</description>
- <bitOffset>0</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>PUPDR</name>
- <displayName>PUPDR</displayName>
- <description>GPIO port pull-up/pull-down
- register</description>
- <addressOffset>0xC</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x24000000</resetValue>
- <fields>
- <field>
- <name>PUPDR15</name>
- <description>Port x configuration bits (y =
- 0..15)</description>
- <bitOffset>30</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>PUPDR14</name>
- <description>Port x configuration bits (y =
- 0..15)</description>
- <bitOffset>28</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>PUPDR13</name>
- <description>Port x configuration bits (y =
- 0..15)</description>
- <bitOffset>26</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>PUPDR12</name>
- <description>Port x configuration bits (y =
- 0..15)</description>
- <bitOffset>24</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>PUPDR11</name>
- <description>Port x configuration bits (y =
- 0..15)</description>
- <bitOffset>22</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>PUPDR10</name>
- <description>Port x configuration bits (y =
- 0..15)</description>
- <bitOffset>20</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>PUPDR9</name>
- <description>Port x configuration bits (y =
- 0..15)</description>
- <bitOffset>18</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>PUPDR8</name>
- <description>Port x configuration bits (y =
- 0..15)</description>
- <bitOffset>16</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>PUPDR7</name>
- <description>Port x configuration bits (y =
- 0..15)</description>
- <bitOffset>14</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>PUPDR6</name>
- <description>Port x configuration bits (y =
- 0..15)</description>
- <bitOffset>12</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>PUPDR5</name>
- <description>Port x configuration bits (y =
- 0..15)</description>
- <bitOffset>10</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>PUPDR4</name>
- <description>Port x configuration bits (y =
- 0..15)</description>
- <bitOffset>8</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>PUPDR3</name>
- <description>Port x configuration bits (y =
- 0..15)</description>
- <bitOffset>6</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>PUPDR2</name>
- <description>Port x configuration bits (y =
- 0..15)</description>
- <bitOffset>4</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>PUPDR1</name>
- <description>Port x configuration bits (y =
- 0..15)</description>
- <bitOffset>2</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>PUPDR0</name>
- <description>Port x configuration bits (y =
- 0..15)</description>
- <bitOffset>0</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>IDR</name>
- <displayName>IDR</displayName>
- <description>GPIO port input data register</description>
- <addressOffset>0x10</addressOffset>
- <size>0x20</size>
- <access>read-only</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>IDR15</name>
- <description>Port input data (y =
- 0..15)</description>
- <bitOffset>15</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>IDR14</name>
- <description>Port input data (y =
- 0..15)</description>
- <bitOffset>14</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>IDR13</name>
- <description>Port input data (y =
- 0..15)</description>
- <bitOffset>13</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>IDR12</name>
- <description>Port input data (y =
- 0..15)</description>
- <bitOffset>12</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>IDR11</name>
- <description>Port input data (y =
- 0..15)</description>
- <bitOffset>11</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>IDR10</name>
- <description>Port input data (y =
- 0..15)</description>
- <bitOffset>10</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>IDR9</name>
- <description>Port input data (y =
- 0..15)</description>
- <bitOffset>9</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>IDR8</name>
- <description>Port input data (y =
- 0..15)</description>
- <bitOffset>8</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>IDR7</name>
- <description>Port input data (y =
- 0..15)</description>
- <bitOffset>7</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>IDR6</name>
- <description>Port input data (y =
- 0..15)</description>
- <bitOffset>6</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>IDR5</name>
- <description>Port input data (y =
- 0..15)</description>
- <bitOffset>5</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>IDR4</name>
- <description>Port input data (y =
- 0..15)</description>
- <bitOffset>4</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>IDR3</name>
- <description>Port input data (y =
- 0..15)</description>
- <bitOffset>3</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>IDR2</name>
- <description>Port input data (y =
- 0..15)</description>
- <bitOffset>2</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>IDR1</name>
- <description>Port input data (y =
- 0..15)</description>
- <bitOffset>1</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>IDR0</name>
- <description>Port input data (y =
- 0..15)</description>
- <bitOffset>0</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>ODR</name>
- <displayName>ODR</displayName>
- <description>GPIO port output data register</description>
- <addressOffset>0x14</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>ODR15</name>
- <description>Port output data (y =
- 0..15)</description>
- <bitOffset>15</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>ODR14</name>
- <description>Port output data (y =
- 0..15)</description>
- <bitOffset>14</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>ODR13</name>
- <description>Port output data (y =
- 0..15)</description>
- <bitOffset>13</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>ODR12</name>
- <description>Port output data (y =
- 0..15)</description>
- <bitOffset>12</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>ODR11</name>
- <description>Port output data (y =
- 0..15)</description>
- <bitOffset>11</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>ODR10</name>
- <description>Port output data (y =
- 0..15)</description>
- <bitOffset>10</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>ODR9</name>
- <description>Port output data (y =
- 0..15)</description>
- <bitOffset>9</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>ODR8</name>
- <description>Port output data (y =
- 0..15)</description>
- <bitOffset>8</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>ODR7</name>
- <description>Port output data (y =
- 0..15)</description>
- <bitOffset>7</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>ODR6</name>
- <description>Port output data (y =
- 0..15)</description>
- <bitOffset>6</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>ODR5</name>
- <description>Port output data (y =
- 0..15)</description>
- <bitOffset>5</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>ODR4</name>
- <description>Port output data (y =
- 0..15)</description>
- <bitOffset>4</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>ODR3</name>
- <description>Port output data (y =
- 0..15)</description>
- <bitOffset>3</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>ODR2</name>
- <description>Port output data (y =
- 0..15)</description>
- <bitOffset>2</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>ODR1</name>
- <description>Port output data (y =
- 0..15)</description>
- <bitOffset>1</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>ODR0</name>
- <description>Port output data (y =
- 0..15)</description>
- <bitOffset>0</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>BSRR</name>
- <displayName>BSRR</displayName>
- <description>GPIO port bit set/reset
- register</description>
- <addressOffset>0x18</addressOffset>
- <size>0x20</size>
- <access>write-only</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>BR15</name>
- <description>Port x reset bit y (y =
- 0..15)</description>
- <bitOffset>31</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>BR14</name>
- <description>Port x reset bit y (y =
- 0..15)</description>
- <bitOffset>30</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>BR13</name>
- <description>Port x reset bit y (y =
- 0..15)</description>
- <bitOffset>29</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>BR12</name>
- <description>Port x reset bit y (y =
- 0..15)</description>
- <bitOffset>28</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>BR11</name>
- <description>Port x reset bit y (y =
- 0..15)</description>
- <bitOffset>27</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>BR10</name>
- <description>Port x reset bit y (y =
- 0..15)</description>
- <bitOffset>26</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>BR9</name>
- <description>Port x reset bit y (y =
- 0..15)</description>
- <bitOffset>25</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>BR8</name>
- <description>Port x reset bit y (y =
- 0..15)</description>
- <bitOffset>24</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>BR7</name>
- <description>Port x reset bit y (y =
- 0..15)</description>
- <bitOffset>23</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>BR6</name>
- <description>Port x reset bit y (y =
- 0..15)</description>
- <bitOffset>22</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>BR5</name>
- <description>Port x reset bit y (y =
- 0..15)</description>
- <bitOffset>21</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>BR4</name>
- <description>Port x reset bit y (y =
- 0..15)</description>
- <bitOffset>20</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>BR3</name>
- <description>Port x reset bit y (y =
- 0..15)</description>
- <bitOffset>19</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>BR2</name>
- <description>Port x reset bit y (y =
- 0..15)</description>
- <bitOffset>18</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>BR1</name>
- <description>Port x reset bit y (y =
- 0..15)</description>
- <bitOffset>17</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>BR0</name>
- <description>Port x set bit y (y=
- 0..15)</description>
- <bitOffset>16</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>BS15</name>
- <description>Port x set bit y (y=
- 0..15)</description>
- <bitOffset>15</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>BS14</name>
- <description>Port x set bit y (y=
- 0..15)</description>
- <bitOffset>14</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>BS13</name>
- <description>Port x set bit y (y=
- 0..15)</description>
- <bitOffset>13</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>BS12</name>
- <description>Port x set bit y (y=
- 0..15)</description>
- <bitOffset>12</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>BS11</name>
- <description>Port x set bit y (y=
- 0..15)</description>
- <bitOffset>11</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>BS10</name>
- <description>Port x set bit y (y=
- 0..15)</description>
- <bitOffset>10</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>BS9</name>
- <description>Port x set bit y (y=
- 0..15)</description>
- <bitOffset>9</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>BS8</name>
- <description>Port x set bit y (y=
- 0..15)</description>
- <bitOffset>8</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>BS7</name>
- <description>Port x set bit y (y=
- 0..15)</description>
- <bitOffset>7</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>BS6</name>
- <description>Port x set bit y (y=
- 0..15)</description>
- <bitOffset>6</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>BS5</name>
- <description>Port x set bit y (y=
- 0..15)</description>
- <bitOffset>5</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>BS4</name>
- <description>Port x set bit y (y=
- 0..15)</description>
- <bitOffset>4</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>BS3</name>
- <description>Port x set bit y (y=
- 0..15)</description>
- <bitOffset>3</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>BS2</name>
- <description>Port x set bit y (y=
- 0..15)</description>
- <bitOffset>2</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>BS1</name>
- <description>Port x set bit y (y=
- 0..15)</description>
- <bitOffset>1</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>BS0</name>
- <description>Port x set bit y (y=
- 0..15)</description>
- <bitOffset>0</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>LCKR</name>
- <displayName>LCKR</displayName>
- <description>GPIO port configuration lock
- register</description>
- <addressOffset>0x1C</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>LCKK</name>
- <description>Port x lock bit y (y=
- 0..15)</description>
- <bitOffset>16</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>LCK15</name>
- <description>Port x lock bit y (y=
- 0..15)</description>
- <bitOffset>15</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>LCK14</name>
- <description>Port x lock bit y (y=
- 0..15)</description>
- <bitOffset>14</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>LCK13</name>
- <description>Port x lock bit y (y=
- 0..15)</description>
- <bitOffset>13</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>LCK12</name>
- <description>Port x lock bit y (y=
- 0..15)</description>
- <bitOffset>12</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>LCK11</name>
- <description>Port x lock bit y (y=
- 0..15)</description>
- <bitOffset>11</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>LCK10</name>
- <description>Port x lock bit y (y=
- 0..15)</description>
- <bitOffset>10</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>LCK9</name>
- <description>Port x lock bit y (y=
- 0..15)</description>
- <bitOffset>9</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>LCK8</name>
- <description>Port x lock bit y (y=
- 0..15)</description>
- <bitOffset>8</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>LCK7</name>
- <description>Port x lock bit y (y=
- 0..15)</description>
- <bitOffset>7</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>LCK6</name>
- <description>Port x lock bit y (y=
- 0..15)</description>
- <bitOffset>6</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>LCK5</name>
- <description>Port x lock bit y (y=
- 0..15)</description>
- <bitOffset>5</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>LCK4</name>
- <description>Port x lock bit y (y=
- 0..15)</description>
- <bitOffset>4</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>LCK3</name>
- <description>Port x lock bit y (y=
- 0..15)</description>
- <bitOffset>3</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>LCK2</name>
- <description>Port x lock bit y (y=
- 0..15)</description>
- <bitOffset>2</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>LCK1</name>
- <description>Port x lock bit y (y=
- 0..15)</description>
- <bitOffset>1</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>LCK0</name>
- <description>Port x lock bit y (y=
- 0..15)</description>
- <bitOffset>0</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>AFRL</name>
- <displayName>AFRL</displayName>
- <description>GPIO alternate function low
- register</description>
- <addressOffset>0x20</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>AFRL7</name>
- <description>Alternate function selection for port x
- bit y (y = 0..7)</description>
- <bitOffset>28</bitOffset>
- <bitWidth>4</bitWidth>
- </field>
- <field>
- <name>AFRL6</name>
- <description>Alternate function selection for port x
- bit y (y = 0..7)</description>
- <bitOffset>24</bitOffset>
- <bitWidth>4</bitWidth>
- </field>
- <field>
- <name>AFRL5</name>
- <description>Alternate function selection for port x
- bit y (y = 0..7)</description>
- <bitOffset>20</bitOffset>
- <bitWidth>4</bitWidth>
- </field>
- <field>
- <name>AFRL4</name>
- <description>Alternate function selection for port x
- bit y (y = 0..7)</description>
- <bitOffset>16</bitOffset>
- <bitWidth>4</bitWidth>
- </field>
- <field>
- <name>AFRL3</name>
- <description>Alternate function selection for port x
- bit y (y = 0..7)</description>
- <bitOffset>12</bitOffset>
- <bitWidth>4</bitWidth>
- </field>
- <field>
- <name>AFRL2</name>
- <description>Alternate function selection for port x
- bit y (y = 0..7)</description>
- <bitOffset>8</bitOffset>
- <bitWidth>4</bitWidth>
- </field>
- <field>
- <name>AFRL1</name>
- <description>Alternate function selection for port x
- bit y (y = 0..7)</description>
- <bitOffset>4</bitOffset>
- <bitWidth>4</bitWidth>
- </field>
- <field>
- <name>AFRL0</name>
- <description>Alternate function selection for port x
- bit y (y = 0..7)</description>
- <bitOffset>0</bitOffset>
- <bitWidth>4</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>AFRH</name>
- <displayName>AFRH</displayName>
- <description>GPIO alternate function high
- register</description>
- <addressOffset>0x24</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>AFRH15</name>
- <description>Alternate function selection for port x
- bit y (y = 8..15)</description>
- <bitOffset>28</bitOffset>
- <bitWidth>4</bitWidth>
- </field>
- <field>
- <name>AFRH14</name>
- <description>Alternate function selection for port x
- bit y (y = 8..15)</description>
- <bitOffset>24</bitOffset>
- <bitWidth>4</bitWidth>
- </field>
- <field>
- <name>AFRH13</name>
- <description>Alternate function selection for port x
- bit y (y = 8..15)</description>
- <bitOffset>20</bitOffset>
- <bitWidth>4</bitWidth>
- </field>
- <field>
- <name>AFRH12</name>
- <description>Alternate function selection for port x
- bit y (y = 8..15)</description>
- <bitOffset>16</bitOffset>
- <bitWidth>4</bitWidth>
- </field>
- <field>
- <name>AFRH11</name>
- <description>Alternate function selection for port x
- bit y (y = 8..15)</description>
- <bitOffset>12</bitOffset>
- <bitWidth>4</bitWidth>
- </field>
- <field>
- <name>AFRH10</name>
- <description>Alternate function selection for port x
- bit y (y = 8..15)</description>
- <bitOffset>8</bitOffset>
- <bitWidth>4</bitWidth>
- </field>
- <field>
- <name>AFRH9</name>
- <description>Alternate function selection for port x
- bit y (y = 8..15)</description>
- <bitOffset>4</bitOffset>
- <bitWidth>4</bitWidth>
- </field>
- <field>
- <name>AFRH8</name>
- <description>Alternate function selection for port x
- bit y (y = 8..15)</description>
- <bitOffset>0</bitOffset>
- <bitWidth>4</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>BRR</name>
- <displayName>BRR</displayName>
- <description>Port bit reset register</description>
- <addressOffset>0x28</addressOffset>
- <size>0x20</size>
- <access>write-only</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>BR0</name>
- <description>Port x Reset bit y</description>
- <bitOffset>0</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>BR1</name>
- <description>Port x Reset bit y</description>
- <bitOffset>1</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>BR2</name>
- <description>Port x Reset bit y</description>
- <bitOffset>2</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>BR3</name>
- <description>Port x Reset bit y</description>
- <bitOffset>3</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>BR4</name>
- <description>Port x Reset bit y</description>
- <bitOffset>4</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>BR5</name>
- <description>Port x Reset bit y</description>
- <bitOffset>5</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>BR6</name>
- <description>Port x Reset bit y</description>
- <bitOffset>6</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>BR7</name>
- <description>Port x Reset bit y</description>
- <bitOffset>7</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>BR8</name>
- <description>Port x Reset bit y</description>
- <bitOffset>8</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>BR9</name>
- <description>Port x Reset bit y</description>
- <bitOffset>9</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>BR10</name>
- <description>Port x Reset bit y</description>
- <bitOffset>10</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>BR11</name>
- <description>Port x Reset bit y</description>
- <bitOffset>11</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>BR12</name>
- <description>Port x Reset bit y</description>
- <bitOffset>12</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>BR13</name>
- <description>Port x Reset bit y</description>
- <bitOffset>13</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>BR14</name>
- <description>Port x Reset bit y</description>
- <bitOffset>14</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>BR15</name>
- <description>Port x Reset bit y</description>
- <bitOffset>15</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- </fields>
- </register>
- </registers>
- </peripheral>
- <peripheral>
- <name>SPI1</name>
- <description>Serial peripheral interface</description>
- <groupName>SPI</groupName>
- <baseAddress>0x40013000</baseAddress>
- <addressBlock>
- <offset>0x0</offset>
- <size>0x400</size>
- <usage>registers</usage>
- </addressBlock>
- <interrupt>
- <name>SPI1</name>
- <description>SPI1_global_interrupt</description>
- <value>25</value>
- </interrupt>
- <registers>
- <register>
- <name>CR1</name>
- <displayName>CR1</displayName>
- <description>control register 1</description>
- <addressOffset>0x0</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x0000</resetValue>
- <fields>
- <field>
- <name>BIDIMODE</name>
- <description>Bidirectional data mode
- enable</description>
- <bitOffset>15</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>BIDIOE</name>
- <description>Output enable in bidirectional
- mode</description>
- <bitOffset>14</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CRCEN</name>
- <description>Hardware CRC calculation
- enable</description>
- <bitOffset>13</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CRCNEXT</name>
- <description>CRC transfer next</description>
- <bitOffset>12</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>DFF</name>
- <description>Data frame format</description>
- <bitOffset>11</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>RXONLY</name>
- <description>Receive only</description>
- <bitOffset>10</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>SSM</name>
- <description>Software slave management</description>
- <bitOffset>9</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>SSI</name>
- <description>Internal slave select</description>
- <bitOffset>8</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>LSBFIRST</name>
- <description>Frame format</description>
- <bitOffset>7</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>SPE</name>
- <description>SPI enable</description>
- <bitOffset>6</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>BR</name>
- <description>Baud rate control</description>
- <bitOffset>3</bitOffset>
- <bitWidth>3</bitWidth>
- </field>
- <field>
- <name>MSTR</name>
- <description>Master selection</description>
- <bitOffset>2</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CPOL</name>
- <description>Clock polarity</description>
- <bitOffset>1</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CPHA</name>
- <description>Clock phase</description>
- <bitOffset>0</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>CR2</name>
- <displayName>CR2</displayName>
- <description>control register 2</description>
- <addressOffset>0x4</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x0000</resetValue>
- <fields>
- <field>
- <name>RXDMAEN</name>
- <description>Rx buffer DMA enable</description>
- <bitOffset>0</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>TXDMAEN</name>
- <description>Tx buffer DMA enable</description>
- <bitOffset>1</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>SSOE</name>
- <description>SS output enable</description>
- <bitOffset>2</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>NSSP</name>
- <description>NSS pulse management</description>
- <bitOffset>3</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>FRF</name>
- <description>Frame format</description>
- <bitOffset>4</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>ERRIE</name>
- <description>Error interrupt enable</description>
- <bitOffset>5</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>RXNEIE</name>
- <description>RX buffer not empty interrupt
- enable</description>
- <bitOffset>6</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>TXEIE</name>
- <description>Tx buffer empty interrupt
- enable</description>
- <bitOffset>7</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>DS</name>
- <description>Data size</description>
- <bitOffset>8</bitOffset>
- <bitWidth>4</bitWidth>
- </field>
- <field>
- <name>FRXTH</name>
- <description>FIFO reception threshold</description>
- <bitOffset>12</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>LDMA_RX</name>
- <description>Last DMA transfer for
- reception</description>
- <bitOffset>13</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>LDMA_TX</name>
- <description>Last DMA transfer for
- transmission</description>
- <bitOffset>14</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>SR</name>
- <displayName>SR</displayName>
- <description>status register</description>
- <addressOffset>0x8</addressOffset>
- <size>0x20</size>
- <resetValue>0x0002</resetValue>
- <fields>
- <field>
- <name>RXNE</name>
- <description>Receive buffer not empty</description>
- <bitOffset>0</bitOffset>
- <bitWidth>1</bitWidth>
- <access>read-only</access>
- </field>
- <field>
- <name>TXE</name>
- <description>Transmit buffer empty</description>
- <bitOffset>1</bitOffset>
- <bitWidth>1</bitWidth>
- <access>read-only</access>
- </field>
- <field>
- <name>CHSIDE</name>
- <description>Channel side</description>
- <bitOffset>2</bitOffset>
- <bitWidth>1</bitWidth>
- <access>read-only</access>
- </field>
- <field>
- <name>UDR</name>
- <description>Underrun flag</description>
- <bitOffset>3</bitOffset>
- <bitWidth>1</bitWidth>
- <access>read-only</access>
- </field>
- <field>
- <name>CRCERR</name>
- <description>CRC error flag</description>
- <bitOffset>4</bitOffset>
- <bitWidth>1</bitWidth>
- <access>read-write</access>
- </field>
- <field>
- <name>MODF</name>
- <description>Mode fault</description>
- <bitOffset>5</bitOffset>
- <bitWidth>1</bitWidth>
- <access>read-only</access>
- </field>
- <field>
- <name>OVR</name>
- <description>Overrun flag</description>
- <bitOffset>6</bitOffset>
- <bitWidth>1</bitWidth>
- <access>read-only</access>
- </field>
- <field>
- <name>BSY</name>
- <description>Busy flag</description>
- <bitOffset>7</bitOffset>
- <bitWidth>1</bitWidth>
- <access>read-only</access>
- </field>
- <field>
- <name>TIFRFE</name>
- <description>TI frame format error</description>
- <bitOffset>8</bitOffset>
- <bitWidth>1</bitWidth>
- <access>read-only</access>
- </field>
- <field>
- <name>FRLVL</name>
- <description>FIFO reception level</description>
- <bitOffset>9</bitOffset>
- <bitWidth>2</bitWidth>
- <access>read-only</access>
- </field>
- <field>
- <name>FTLVL</name>
- <description>FIFO transmission level</description>
- <bitOffset>11</bitOffset>
- <bitWidth>2</bitWidth>
- <access>read-only</access>
- </field>
- </fields>
- </register>
- <register>
- <name>DR</name>
- <displayName>DR</displayName>
- <description>data register</description>
- <addressOffset>0xC</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x0000</resetValue>
- <fields>
- <field>
- <name>DR</name>
- <description>Data register</description>
- <bitOffset>0</bitOffset>
- <bitWidth>16</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>CRCPR</name>
- <displayName>CRCPR</displayName>
- <description>CRC polynomial register</description>
- <addressOffset>0x10</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x0007</resetValue>
- <fields>
- <field>
- <name>CRCPOLY</name>
- <description>CRC polynomial register</description>
- <bitOffset>0</bitOffset>
- <bitWidth>16</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>RXCRCR</name>
- <displayName>RXCRCR</displayName>
- <description>RX CRC register</description>
- <addressOffset>0x14</addressOffset>
- <size>0x20</size>
- <access>read-only</access>
- <resetValue>0x0000</resetValue>
- <fields>
- <field>
- <name>RxCRC</name>
- <description>Rx CRC register</description>
- <bitOffset>0</bitOffset>
- <bitWidth>16</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>TXCRCR</name>
- <displayName>TXCRCR</displayName>
- <description>TX CRC register</description>
- <addressOffset>0x18</addressOffset>
- <size>0x20</size>
- <access>read-only</access>
- <resetValue>0x0000</resetValue>
- <fields>
- <field>
- <name>TxCRC</name>
- <description>Tx CRC register</description>
- <bitOffset>0</bitOffset>
- <bitWidth>16</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>I2SCFGR</name>
- <displayName>I2SCFGR</displayName>
- <description>I2S configuration register</description>
- <addressOffset>0x1C</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x0000</resetValue>
- <fields>
- <field>
- <name>I2SMOD</name>
- <description>I2S mode selection</description>
- <bitOffset>11</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>I2SE</name>
- <description>I2S Enable</description>
- <bitOffset>10</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>I2SCFG</name>
- <description>I2S configuration mode</description>
- <bitOffset>8</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>PCMSYNC</name>
- <description>PCM frame synchronization</description>
- <bitOffset>7</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>I2SSTD</name>
- <description>I2S standard selection</description>
- <bitOffset>4</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>CKPOL</name>
- <description>Steady state clock
- polarity</description>
- <bitOffset>3</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>DATLEN</name>
- <description>Data length to be
- transferred</description>
- <bitOffset>1</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>CHLEN</name>
- <description>Channel length (number of bits per audio
- channel)</description>
- <bitOffset>0</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>I2SPR</name>
- <displayName>I2SPR</displayName>
- <description>I2S prescaler register</description>
- <addressOffset>0x20</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000010</resetValue>
- <fields>
- <field>
- <name>MCKOE</name>
- <description>Master clock output enable</description>
- <bitOffset>9</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>ODD</name>
- <description>Odd factor for the
- prescaler</description>
- <bitOffset>8</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>I2SDIV</name>
- <description>I2S Linear prescaler</description>
- <bitOffset>0</bitOffset>
- <bitWidth>8</bitWidth>
- </field>
- </fields>
- </register>
- </registers>
- </peripheral>
- <peripheral derivedFrom="SPI1">
- <name>SPI2</name>
- <baseAddress>0x40003800</baseAddress>
- <interrupt>
- <name>SPI2</name>
- <description>SPI2 global interrupt</description>
- <value>26</value>
- </interrupt>
- </peripheral>
- <peripheral>
- <name>PWR</name>
- <description>Power control</description>
- <groupName>PWR</groupName>
- <baseAddress>0x40007000</baseAddress>
- <addressBlock>
- <offset>0x0</offset>
- <size>0x400</size>
- <usage>registers</usage>
- </addressBlock>
- <interrupt>
- <name>TIM6_DAC</name>
- <description>TIM6 global interrupt and DAC underrun
- interrupt</description>
- <value>17</value>
- </interrupt>
- <registers>
- <register>
- <name>CR</name>
- <displayName>CR</displayName>
- <description>power control register</description>
- <addressOffset>0x0</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>FPDS</name>
- <description>Flash power down in Stop
- mode</description>
- <bitOffset>9</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>DBP</name>
- <description>Disable backup domain write
- protection</description>
- <bitOffset>8</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>PLS</name>
- <description>PVD level selection</description>
- <bitOffset>5</bitOffset>
- <bitWidth>3</bitWidth>
- </field>
- <field>
- <name>PVDE</name>
- <description>Power voltage detector
- enable</description>
- <bitOffset>4</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CSBF</name>
- <description>Clear standby flag</description>
- <bitOffset>3</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CWUF</name>
- <description>Clear wakeup flag</description>
- <bitOffset>2</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>PDDS</name>
- <description>Power down deepsleep</description>
- <bitOffset>1</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>LPDS</name>
- <description>Low-power deep sleep</description>
- <bitOffset>0</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>CSR</name>
- <displayName>CSR</displayName>
- <description>power control/status register</description>
- <addressOffset>0x4</addressOffset>
- <size>0x20</size>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>BRE</name>
- <description>Backup regulator enable</description>
- <bitOffset>9</bitOffset>
- <bitWidth>1</bitWidth>
- <access>read-write</access>
- </field>
- <field>
- <name>EWUP</name>
- <description>Enable WKUP pin</description>
- <bitOffset>8</bitOffset>
- <bitWidth>1</bitWidth>
- <access>read-write</access>
- </field>
- <field>
- <name>BRR</name>
- <description>Backup regulator ready</description>
- <bitOffset>3</bitOffset>
- <bitWidth>1</bitWidth>
- <access>read-only</access>
- </field>
- <field>
- <name>PVDO</name>
- <description>PVD output</description>
- <bitOffset>2</bitOffset>
- <bitWidth>1</bitWidth>
- <access>read-only</access>
- </field>
- <field>
- <name>SBF</name>
- <description>Standby flag</description>
- <bitOffset>1</bitOffset>
- <bitWidth>1</bitWidth>
- <access>read-only</access>
- </field>
- <field>
- <name>WUF</name>
- <description>Wakeup flag</description>
- <bitOffset>0</bitOffset>
- <bitWidth>1</bitWidth>
- <access>read-only</access>
- </field>
- </fields>
- </register>
- </registers>
- </peripheral>
- <peripheral>
- <name>I2C1</name>
- <description>Inter-integrated circuit</description>
- <groupName>I2C</groupName>
- <baseAddress>0x40005400</baseAddress>
- <addressBlock>
- <offset>0x0</offset>
- <size>0x400</size>
- <usage>registers</usage>
- </addressBlock>
- <registers>
- <register>
- <name>CR1</name>
- <displayName>CR1</displayName>
- <description>Control register 1</description>
- <addressOffset>0x0</addressOffset>
- <size>0x20</size>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>PE</name>
- <description>Peripheral enable</description>
- <bitOffset>0</bitOffset>
- <bitWidth>1</bitWidth>
- <access>read-write</access>
- </field>
- <field>
- <name>TXIE</name>
- <description>TX Interrupt enable</description>
- <bitOffset>1</bitOffset>
- <bitWidth>1</bitWidth>
- <access>read-write</access>
- </field>
- <field>
- <name>RXIE</name>
- <description>RX Interrupt enable</description>
- <bitOffset>2</bitOffset>
- <bitWidth>1</bitWidth>
- <access>read-write</access>
- </field>
- <field>
- <name>ADDRIE</name>
- <description>Address match interrupt enable (slave
- only)</description>
- <bitOffset>3</bitOffset>
- <bitWidth>1</bitWidth>
- <access>read-write</access>
- </field>
- <field>
- <name>NACKIE</name>
- <description>Not acknowledge received interrupt
- enable</description>
- <bitOffset>4</bitOffset>
- <bitWidth>1</bitWidth>
- <access>read-write</access>
- </field>
- <field>
- <name>STOPIE</name>
- <description>STOP detection Interrupt
- enable</description>
- <bitOffset>5</bitOffset>
- <bitWidth>1</bitWidth>
- <access>read-write</access>
- </field>
- <field>
- <name>TCIE</name>
- <description>Transfer Complete interrupt
- enable</description>
- <bitOffset>6</bitOffset>
- <bitWidth>1</bitWidth>
- <access>read-write</access>
- </field>
- <field>
- <name>ERRIE</name>
- <description>Error interrupts enable</description>
- <bitOffset>7</bitOffset>
- <bitWidth>1</bitWidth>
- <access>read-write</access>
- </field>
- <field>
- <name>DNF</name>
- <description>Digital noise filter</description>
- <bitOffset>8</bitOffset>
- <bitWidth>4</bitWidth>
- <access>read-write</access>
- </field>
- <field>
- <name>ANFOFF</name>
- <description>Analog noise filter OFF</description>
- <bitOffset>12</bitOffset>
- <bitWidth>1</bitWidth>
- <access>read-write</access>
- </field>
- <field>
- <name>SWRST</name>
- <description>Software reset</description>
- <bitOffset>13</bitOffset>
- <bitWidth>1</bitWidth>
- <access>write-only</access>
- </field>
- <field>
- <name>TXDMAEN</name>
- <description>DMA transmission requests
- enable</description>
- <bitOffset>14</bitOffset>
- <bitWidth>1</bitWidth>
- <access>read-write</access>
- </field>
- <field>
- <name>RXDMAEN</name>
- <description>DMA reception requests
- enable</description>
- <bitOffset>15</bitOffset>
- <bitWidth>1</bitWidth>
- <access>read-write</access>
- </field>
- <field>
- <name>SBC</name>
- <description>Slave byte control</description>
- <bitOffset>16</bitOffset>
- <bitWidth>1</bitWidth>
- <access>read-write</access>
- </field>
- <field>
- <name>NOSTRETCH</name>
- <description>Clock stretching disable</description>
- <bitOffset>17</bitOffset>
- <bitWidth>1</bitWidth>
- <access>read-write</access>
- </field>
- <field>
- <name>WUPEN</name>
- <description>Wakeup from STOP enable</description>
- <bitOffset>18</bitOffset>
- <bitWidth>1</bitWidth>
- <access>read-write</access>
- </field>
- <field>
- <name>GCEN</name>
- <description>General call enable</description>
- <bitOffset>19</bitOffset>
- <bitWidth>1</bitWidth>
- <access>read-write</access>
- </field>
- <field>
- <name>SMBHEN</name>
- <description>SMBus Host address enable</description>
- <bitOffset>20</bitOffset>
- <bitWidth>1</bitWidth>
- <access>read-write</access>
- </field>
- <field>
- <name>SMBDEN</name>
- <description>SMBus Device Default address
- enable</description>
- <bitOffset>21</bitOffset>
- <bitWidth>1</bitWidth>
- <access>read-write</access>
- </field>
- <field>
- <name>ALERTEN</name>
- <description>SMBUS alert enable</description>
- <bitOffset>22</bitOffset>
- <bitWidth>1</bitWidth>
- <access>read-write</access>
- </field>
- <field>
- <name>PECEN</name>
- <description>PEC enable</description>
- <bitOffset>23</bitOffset>
- <bitWidth>1</bitWidth>
- <access>read-write</access>
- </field>
- </fields>
- </register>
- <register>
- <name>CR2</name>
- <displayName>CR2</displayName>
- <description>Control register 2</description>
- <addressOffset>0x4</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>PECBYTE</name>
- <description>Packet error checking byte</description>
- <bitOffset>26</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>AUTOEND</name>
- <description>Automatic end mode (master
- mode)</description>
- <bitOffset>25</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>RELOAD</name>
- <description>NBYTES reload mode</description>
- <bitOffset>24</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>NBYTES</name>
- <description>Number of bytes</description>
- <bitOffset>16</bitOffset>
- <bitWidth>8</bitWidth>
- </field>
- <field>
- <name>NACK</name>
- <description>NACK generation (slave
- mode)</description>
- <bitOffset>15</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>STOP</name>
- <description>Stop generation (master
- mode)</description>
- <bitOffset>14</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>START</name>
- <description>Start generation</description>
- <bitOffset>13</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>HEAD10R</name>
- <description>10-bit address header only read
- direction (master receiver mode)</description>
- <bitOffset>12</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>ADD10</name>
- <description>10-bit addressing mode (master
- mode)</description>
- <bitOffset>11</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>RD_WRN</name>
- <description>Transfer direction (master
- mode)</description>
- <bitOffset>10</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>SADD8</name>
- <description>Slave address bit 9:8 (master
- mode)</description>
- <bitOffset>8</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>SADD1</name>
- <description>Slave address bit 7:1 (master
- mode)</description>
- <bitOffset>1</bitOffset>
- <bitWidth>7</bitWidth>
- </field>
- <field>
- <name>SADD0</name>
- <description>Slave address bit 0 (master
- mode)</description>
- <bitOffset>0</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>OAR1</name>
- <displayName>OAR1</displayName>
- <description>Own address register 1</description>
- <addressOffset>0x8</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>OA1_0</name>
- <description>Interface address</description>
- <bitOffset>0</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>OA1_1</name>
- <description>Interface address</description>
- <bitOffset>1</bitOffset>
- <bitWidth>7</bitWidth>
- </field>
- <field>
- <name>OA1_8</name>
- <description>Interface address</description>
- <bitOffset>8</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>OA1MODE</name>
- <description>Own Address 1 10-bit mode</description>
- <bitOffset>10</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>OA1EN</name>
- <description>Own Address 1 enable</description>
- <bitOffset>15</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>OAR2</name>
- <displayName>OAR2</displayName>
- <description>Own address register 2</description>
- <addressOffset>0xC</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>OA2</name>
- <description>Interface address</description>
- <bitOffset>1</bitOffset>
- <bitWidth>7</bitWidth>
- </field>
- <field>
- <name>OA2MSK</name>
- <description>Own Address 2 masks</description>
- <bitOffset>8</bitOffset>
- <bitWidth>3</bitWidth>
- </field>
- <field>
- <name>OA2EN</name>
- <description>Own Address 2 enable</description>
- <bitOffset>15</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>TIMINGR</name>
- <displayName>TIMINGR</displayName>
- <description>Timing register</description>
- <addressOffset>0x10</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>SCLL</name>
- <description>SCL low period (master
- mode)</description>
- <bitOffset>0</bitOffset>
- <bitWidth>8</bitWidth>
- </field>
- <field>
- <name>SCLH</name>
- <description>SCL high period (master
- mode)</description>
- <bitOffset>8</bitOffset>
- <bitWidth>8</bitWidth>
- </field>
- <field>
- <name>SDADEL</name>
- <description>Data hold time</description>
- <bitOffset>16</bitOffset>
- <bitWidth>4</bitWidth>
- </field>
- <field>
- <name>SCLDEL</name>
- <description>Data setup time</description>
- <bitOffset>20</bitOffset>
- <bitWidth>4</bitWidth>
- </field>
- <field>
- <name>PRESC</name>
- <description>Timing prescaler</description>
- <bitOffset>28</bitOffset>
- <bitWidth>4</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>TIMEOUTR</name>
- <displayName>TIMEOUTR</displayName>
- <description>Status register 1</description>
- <addressOffset>0x14</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>TIMEOUTA</name>
- <description>Bus timeout A</description>
- <bitOffset>0</bitOffset>
- <bitWidth>12</bitWidth>
- </field>
- <field>
- <name>TIDLE</name>
- <description>Idle clock timeout
- detection</description>
- <bitOffset>12</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>TIMOUTEN</name>
- <description>Clock timeout enable</description>
- <bitOffset>15</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>TIMEOUTB</name>
- <description>Bus timeout B</description>
- <bitOffset>16</bitOffset>
- <bitWidth>12</bitWidth>
- </field>
- <field>
- <name>TEXTEN</name>
- <description>Extended clock timeout
- enable</description>
- <bitOffset>31</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>ISR</name>
- <displayName>ISR</displayName>
- <description>Interrupt and Status register</description>
- <addressOffset>0x18</addressOffset>
- <size>0x20</size>
- <resetValue>0x00000001</resetValue>
- <fields>
- <field>
- <name>ADDCODE</name>
- <description>Address match code (Slave
- mode)</description>
- <bitOffset>17</bitOffset>
- <bitWidth>7</bitWidth>
- <access>read-only</access>
- </field>
- <field>
- <name>DIR</name>
- <description>Transfer direction (Slave
- mode)</description>
- <bitOffset>16</bitOffset>
- <bitWidth>1</bitWidth>
- <access>read-only</access>
- </field>
- <field>
- <name>BUSY</name>
- <description>Bus busy</description>
- <bitOffset>15</bitOffset>
- <bitWidth>1</bitWidth>
- <access>read-only</access>
- </field>
- <field>
- <name>ALERT</name>
- <description>SMBus alert</description>
- <bitOffset>13</bitOffset>
- <bitWidth>1</bitWidth>
- <access>read-only</access>
- </field>
- <field>
- <name>TIMEOUT</name>
- <description>Timeout or t_low detection
- flag</description>
- <bitOffset>12</bitOffset>
- <bitWidth>1</bitWidth>
- <access>read-only</access>
- </field>
- <field>
- <name>PECERR</name>
- <description>PEC Error in reception</description>
- <bitOffset>11</bitOffset>
- <bitWidth>1</bitWidth>
- <access>read-only</access>
- </field>
- <field>
- <name>OVR</name>
- <description>Overrun/Underrun (slave
- mode)</description>
- <bitOffset>10</bitOffset>
- <bitWidth>1</bitWidth>
- <access>read-only</access>
- </field>
- <field>
- <name>ARLO</name>
- <description>Arbitration lost</description>
- <bitOffset>9</bitOffset>
- <bitWidth>1</bitWidth>
- <access>read-only</access>
- </field>
- <field>
- <name>BERR</name>
- <description>Bus error</description>
- <bitOffset>8</bitOffset>
- <bitWidth>1</bitWidth>
- <access>read-only</access>
- </field>
- <field>
- <name>TCR</name>
- <description>Transfer Complete Reload</description>
- <bitOffset>7</bitOffset>
- <bitWidth>1</bitWidth>
- <access>read-only</access>
- </field>
- <field>
- <name>TC</name>
- <description>Transfer Complete (master
- mode)</description>
- <bitOffset>6</bitOffset>
- <bitWidth>1</bitWidth>
- <access>read-only</access>
- </field>
- <field>
- <name>STOPF</name>
- <description>Stop detection flag</description>
- <bitOffset>5</bitOffset>
- <bitWidth>1</bitWidth>
- <access>read-only</access>
- </field>
- <field>
- <name>NACKF</name>
- <description>Not acknowledge received
- flag</description>
- <bitOffset>4</bitOffset>
- <bitWidth>1</bitWidth>
- <access>read-only</access>
- </field>
- <field>
- <name>ADDR</name>
- <description>Address matched (slave
- mode)</description>
- <bitOffset>3</bitOffset>
- <bitWidth>1</bitWidth>
- <access>read-only</access>
- </field>
- <field>
- <name>RXNE</name>
- <description>Receive data register not empty
- (receivers)</description>
- <bitOffset>2</bitOffset>
- <bitWidth>1</bitWidth>
- <access>read-only</access>
- </field>
- <field>
- <name>TXIS</name>
- <description>Transmit interrupt status
- (transmitters)</description>
- <bitOffset>1</bitOffset>
- <bitWidth>1</bitWidth>
- <access>read-write</access>
- </field>
- <field>
- <name>TXE</name>
- <description>Transmit data register empty
- (transmitters)</description>
- <bitOffset>0</bitOffset>
- <bitWidth>1</bitWidth>
- <access>read-write</access>
- </field>
- </fields>
- </register>
- <register>
- <name>ICR</name>
- <displayName>ICR</displayName>
- <description>Interrupt clear register</description>
- <addressOffset>0x1C</addressOffset>
- <size>0x20</size>
- <access>write-only</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>ALERTCF</name>
- <description>Alert flag clear</description>
- <bitOffset>13</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>TIMOUTCF</name>
- <description>Timeout detection flag
- clear</description>
- <bitOffset>12</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>PECCF</name>
- <description>PEC Error flag clear</description>
- <bitOffset>11</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>OVRCF</name>
- <description>Overrun/Underrun flag
- clear</description>
- <bitOffset>10</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>ARLOCF</name>
- <description>Arbitration lost flag
- clear</description>
- <bitOffset>9</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>BERRCF</name>
- <description>Bus error flag clear</description>
- <bitOffset>8</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>STOPCF</name>
- <description>Stop detection flag clear</description>
- <bitOffset>5</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>NACKCF</name>
- <description>Not Acknowledge flag clear</description>
- <bitOffset>4</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>ADDRCF</name>
- <description>Address Matched flag clear</description>
- <bitOffset>3</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>PECR</name>
- <displayName>PECR</displayName>
- <description>PEC register</description>
- <addressOffset>0x20</addressOffset>
- <size>0x20</size>
- <access>read-only</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>PEC</name>
- <description>Packet error checking
- register</description>
- <bitOffset>0</bitOffset>
- <bitWidth>8</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>RXDR</name>
- <displayName>RXDR</displayName>
- <description>Receive data register</description>
- <addressOffset>0x24</addressOffset>
- <size>0x20</size>
- <access>read-only</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>RXDATA</name>
- <description>8-bit receive data</description>
- <bitOffset>0</bitOffset>
- <bitWidth>8</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>TXDR</name>
- <displayName>TXDR</displayName>
- <description>Transmit data register</description>
- <addressOffset>0x28</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>TXDATA</name>
- <description>8-bit transmit data</description>
- <bitOffset>0</bitOffset>
- <bitWidth>8</bitWidth>
- </field>
- </fields>
- </register>
- </registers>
- </peripheral>
- <peripheral derivedFrom="I2C1">
- <name>I2C2</name>
- <baseAddress>0x40005800</baseAddress>
- <interrupt>
- <name>I2C1</name>
- <description>I2C1 global interrupt</description>
- <value>23</value>
- </interrupt>
- </peripheral>
- <peripheral>
- <name>IWDG</name>
- <description>Independent watchdog</description>
- <groupName>IWDG</groupName>
- <baseAddress>0x40003000</baseAddress>
- <addressBlock>
- <offset>0x0</offset>
- <size>0x400</size>
- <usage>registers</usage>
- </addressBlock>
- <interrupt>
- <name>I2C2</name>
- <description>I2C2 global interrupt</description>
- <value>24</value>
- </interrupt>
- <registers>
- <register>
- <name>KR</name>
- <displayName>KR</displayName>
- <description>Key register</description>
- <addressOffset>0x0</addressOffset>
- <size>0x20</size>
- <access>write-only</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>KEY</name>
- <description>Key value</description>
- <bitOffset>0</bitOffset>
- <bitWidth>16</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>PR</name>
- <displayName>PR</displayName>
- <description>Prescaler register</description>
- <addressOffset>0x4</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>PR</name>
- <description>Prescaler divider</description>
- <bitOffset>0</bitOffset>
- <bitWidth>3</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>RLR</name>
- <displayName>RLR</displayName>
- <description>Reload register</description>
- <addressOffset>0x8</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000FFF</resetValue>
- <fields>
- <field>
- <name>RL</name>
- <description>Watchdog counter reload
- value</description>
- <bitOffset>0</bitOffset>
- <bitWidth>12</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>SR</name>
- <displayName>SR</displayName>
- <description>Status register</description>
- <addressOffset>0xC</addressOffset>
- <size>0x20</size>
- <access>read-only</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>PVU</name>
- <description>Watchdog prescaler value
- update</description>
- <bitOffset>0</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>RVU</name>
- <description>Watchdog counter reload value
- update</description>
- <bitOffset>1</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>WVU</name>
- <description>Watchdog counter window value
- update</description>
- <bitOffset>2</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>WINR</name>
- <displayName>WINR</displayName>
- <description>Window register</description>
- <addressOffset>0x10</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000FFF</resetValue>
- <fields>
- <field>
- <name>WIN</name>
- <description>Watchdog counter window
- value</description>
- <bitOffset>0</bitOffset>
- <bitWidth>12</bitWidth>
- </field>
- </fields>
- </register>
- </registers>
- </peripheral>
- <peripheral>
- <name>WWDG</name>
- <description>Window watchdog</description>
- <groupName>WWDG</groupName>
- <baseAddress>0x40002C00</baseAddress>
- <addressBlock>
- <offset>0x0</offset>
- <size>0x400</size>
- <usage>registers</usage>
- </addressBlock>
- <registers>
- <register>
- <name>CR</name>
- <displayName>CR</displayName>
- <description>Control register</description>
- <addressOffset>0x0</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x0000007F</resetValue>
- <fields>
- <field>
- <name>WDGA</name>
- <description>Activation bit</description>
- <bitOffset>7</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>T</name>
- <description>7-bit counter</description>
- <bitOffset>0</bitOffset>
- <bitWidth>7</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>CFR</name>
- <displayName>CFR</displayName>
- <description>Configuration register</description>
- <addressOffset>0x4</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x0000007F</resetValue>
- <fields>
- <field>
- <name>EWI</name>
- <description>Early wakeup interrupt</description>
- <bitOffset>9</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>WDGTB</name>
- <description>Timer base</description>
- <bitOffset>7</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>W</name>
- <description>7-bit window value</description>
- <bitOffset>0</bitOffset>
- <bitWidth>7</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>SR</name>
- <displayName>SR</displayName>
- <description>Status register</description>
- <addressOffset>0x8</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>EWIF</name>
- <description>Early wakeup interrupt
- flag</description>
- <bitOffset>0</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- </fields>
- </register>
- </registers>
- </peripheral>
- <peripheral>
- <name>TIM1</name>
- <description>Advanced-timers</description>
- <groupName>TIM</groupName>
- <baseAddress>0x40012C00</baseAddress>
- <addressBlock>
- <offset>0x0</offset>
- <size>0x400</size>
- <usage>registers</usage>
- </addressBlock>
- <interrupt>
- <name>WWDG</name>
- <description>Window Watchdog interrupt</description>
- <value>0</value>
- </interrupt>
- <registers>
- <register>
- <name>CR1</name>
- <displayName>CR1</displayName>
- <description>control register 1</description>
- <addressOffset>0x0</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x0000</resetValue>
- <fields>
- <field>
- <name>CKD</name>
- <description>Clock division</description>
- <bitOffset>8</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>ARPE</name>
- <description>Auto-reload preload enable</description>
- <bitOffset>7</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CMS</name>
- <description>Center-aligned mode
- selection</description>
- <bitOffset>5</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>DIR</name>
- <description>Direction</description>
- <bitOffset>4</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>OPM</name>
- <description>One-pulse mode</description>
- <bitOffset>3</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>URS</name>
- <description>Update request source</description>
- <bitOffset>2</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>UDIS</name>
- <description>Update disable</description>
- <bitOffset>1</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CEN</name>
- <description>Counter enable</description>
- <bitOffset>0</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>CR2</name>
- <displayName>CR2</displayName>
- <description>control register 2</description>
- <addressOffset>0x4</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x0000</resetValue>
- <fields>
- <field>
- <name>OIS4</name>
- <description>Output Idle state 4</description>
- <bitOffset>14</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>OIS3N</name>
- <description>Output Idle state 3</description>
- <bitOffset>13</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>OIS3</name>
- <description>Output Idle state 3</description>
- <bitOffset>12</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>OIS2N</name>
- <description>Output Idle state 2</description>
- <bitOffset>11</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>OIS2</name>
- <description>Output Idle state 2</description>
- <bitOffset>10</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>OIS1N</name>
- <description>Output Idle state 1</description>
- <bitOffset>9</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>OIS1</name>
- <description>Output Idle state 1</description>
- <bitOffset>8</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>TI1S</name>
- <description>TI1 selection</description>
- <bitOffset>7</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>MMS</name>
- <description>Master mode selection</description>
- <bitOffset>4</bitOffset>
- <bitWidth>3</bitWidth>
- </field>
- <field>
- <name>CCDS</name>
- <description>Capture/compare DMA
- selection</description>
- <bitOffset>3</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CCUS</name>
- <description>Capture/compare control update
- selection</description>
- <bitOffset>2</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CCPC</name>
- <description>Capture/compare preloaded
- control</description>
- <bitOffset>0</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>SMCR</name>
- <displayName>SMCR</displayName>
- <description>slave mode control register</description>
- <addressOffset>0x8</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x0000</resetValue>
- <fields>
- <field>
- <name>ETP</name>
- <description>External trigger polarity</description>
- <bitOffset>15</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>ECE</name>
- <description>External clock enable</description>
- <bitOffset>14</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>ETPS</name>
- <description>External trigger prescaler</description>
- <bitOffset>12</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>ETF</name>
- <description>External trigger filter</description>
- <bitOffset>8</bitOffset>
- <bitWidth>4</bitWidth>
- </field>
- <field>
- <name>MSM</name>
- <description>Master/Slave mode</description>
- <bitOffset>7</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>TS</name>
- <description>Trigger selection</description>
- <bitOffset>4</bitOffset>
- <bitWidth>3</bitWidth>
- </field>
- <field>
- <name>SMS</name>
- <description>Slave mode selection</description>
- <bitOffset>0</bitOffset>
- <bitWidth>3</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>DIER</name>
- <displayName>DIER</displayName>
- <description>DMA/Interrupt enable register</description>
- <addressOffset>0xC</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x0000</resetValue>
- <fields>
- <field>
- <name>TDE</name>
- <description>Trigger DMA request enable</description>
- <bitOffset>14</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>COMDE</name>
- <description>Reserved</description>
- <bitOffset>13</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CC4DE</name>
- <description>Capture/Compare 4 DMA request
- enable</description>
- <bitOffset>12</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CC3DE</name>
- <description>Capture/Compare 3 DMA request
- enable</description>
- <bitOffset>11</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CC2DE</name>
- <description>Capture/Compare 2 DMA request
- enable</description>
- <bitOffset>10</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CC1DE</name>
- <description>Capture/Compare 1 DMA request
- enable</description>
- <bitOffset>9</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>UDE</name>
- <description>Update DMA request enable</description>
- <bitOffset>8</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>BIE</name>
- <description>Break interrupt enable</description>
- <bitOffset>7</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>TIE</name>
- <description>Trigger interrupt enable</description>
- <bitOffset>6</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>COMIE</name>
- <description>COM interrupt enable</description>
- <bitOffset>5</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CC4IE</name>
- <description>Capture/Compare 4 interrupt
- enable</description>
- <bitOffset>4</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CC3IE</name>
- <description>Capture/Compare 3 interrupt
- enable</description>
- <bitOffset>3</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CC2IE</name>
- <description>Capture/Compare 2 interrupt
- enable</description>
- <bitOffset>2</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CC1IE</name>
- <description>Capture/Compare 1 interrupt
- enable</description>
- <bitOffset>1</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>UIE</name>
- <description>Update interrupt enable</description>
- <bitOffset>0</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>SR</name>
- <displayName>SR</displayName>
- <description>status register</description>
- <addressOffset>0x10</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x0000</resetValue>
- <fields>
- <field>
- <name>CC4OF</name>
- <description>Capture/Compare 4 overcapture
- flag</description>
- <bitOffset>12</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CC3OF</name>
- <description>Capture/Compare 3 overcapture
- flag</description>
- <bitOffset>11</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CC2OF</name>
- <description>Capture/compare 2 overcapture
- flag</description>
- <bitOffset>10</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CC1OF</name>
- <description>Capture/Compare 1 overcapture
- flag</description>
- <bitOffset>9</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>BIF</name>
- <description>Break interrupt flag</description>
- <bitOffset>7</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>TIF</name>
- <description>Trigger interrupt flag</description>
- <bitOffset>6</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>COMIF</name>
- <description>COM interrupt flag</description>
- <bitOffset>5</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CC4IF</name>
- <description>Capture/Compare 4 interrupt
- flag</description>
- <bitOffset>4</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CC3IF</name>
- <description>Capture/Compare 3 interrupt
- flag</description>
- <bitOffset>3</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CC2IF</name>
- <description>Capture/Compare 2 interrupt
- flag</description>
- <bitOffset>2</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CC1IF</name>
- <description>Capture/compare 1 interrupt
- flag</description>
- <bitOffset>1</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>UIF</name>
- <description>Update interrupt flag</description>
- <bitOffset>0</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>EGR</name>
- <displayName>EGR</displayName>
- <description>event generation register</description>
- <addressOffset>0x14</addressOffset>
- <size>0x20</size>
- <access>write-only</access>
- <resetValue>0x0000</resetValue>
- <fields>
- <field>
- <name>BG</name>
- <description>Break generation</description>
- <bitOffset>7</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>TG</name>
- <description>Trigger generation</description>
- <bitOffset>6</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>COMG</name>
- <description>Capture/Compare control update
- generation</description>
- <bitOffset>5</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CC4G</name>
- <description>Capture/compare 4
- generation</description>
- <bitOffset>4</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CC3G</name>
- <description>Capture/compare 3
- generation</description>
- <bitOffset>3</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CC2G</name>
- <description>Capture/compare 2
- generation</description>
- <bitOffset>2</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CC1G</name>
- <description>Capture/compare 1
- generation</description>
- <bitOffset>1</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>UG</name>
- <description>Update generation</description>
- <bitOffset>0</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>CCMR1_Output</name>
- <displayName>CCMR1_Output</displayName>
- <description>capture/compare mode register (output
- mode)</description>
- <addressOffset>0x18</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>OC2CE</name>
- <description>Output Compare 2 clear
- enable</description>
- <bitOffset>15</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>OC2M</name>
- <description>Output Compare 2 mode</description>
- <bitOffset>12</bitOffset>
- <bitWidth>3</bitWidth>
- </field>
- <field>
- <name>OC2PE</name>
- <description>Output Compare 2 preload
- enable</description>
- <bitOffset>11</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>OC2FE</name>
- <description>Output Compare 2 fast
- enable</description>
- <bitOffset>10</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CC2S</name>
- <description>Capture/Compare 2
- selection</description>
- <bitOffset>8</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>OC1CE</name>
- <description>Output Compare 1 clear
- enable</description>
- <bitOffset>7</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>OC1M</name>
- <description>Output Compare 1 mode</description>
- <bitOffset>4</bitOffset>
- <bitWidth>3</bitWidth>
- </field>
- <field>
- <name>OC1PE</name>
- <description>Output Compare 1 preload
- enable</description>
- <bitOffset>3</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>OC1FE</name>
- <description>Output Compare 1 fast
- enable</description>
- <bitOffset>2</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CC1S</name>
- <description>Capture/Compare 1
- selection</description>
- <bitOffset>0</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>CCMR1_Input</name>
- <displayName>CCMR1_Input</displayName>
- <description>capture/compare mode register 1 (input
- mode)</description>
- <alternateRegister>CCMR1_Output</alternateRegister>
- <addressOffset>0x18</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>IC2F</name>
- <description>Input capture 2 filter</description>
- <bitOffset>12</bitOffset>
- <bitWidth>4</bitWidth>
- </field>
- <field>
- <name>IC2PCS</name>
- <description>Input capture 2 prescaler</description>
- <bitOffset>10</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>CC2S</name>
- <description>Capture/Compare 2
- selection</description>
- <bitOffset>8</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>IC1F</name>
- <description>Input capture 1 filter</description>
- <bitOffset>4</bitOffset>
- <bitWidth>4</bitWidth>
- </field>
- <field>
- <name>IC1PCS</name>
- <description>Input capture 1 prescaler</description>
- <bitOffset>2</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>CC1S</name>
- <description>Capture/Compare 1
- selection</description>
- <bitOffset>0</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>CCMR2_Output</name>
- <displayName>CCMR2_Output</displayName>
- <description>capture/compare mode register (output
- mode)</description>
- <addressOffset>0x1C</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>OC4CE</name>
- <description>Output compare 4 clear
- enable</description>
- <bitOffset>15</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>OC4M</name>
- <description>Output compare 4 mode</description>
- <bitOffset>12</bitOffset>
- <bitWidth>3</bitWidth>
- </field>
- <field>
- <name>OC4PE</name>
- <description>Output compare 4 preload
- enable</description>
- <bitOffset>11</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>OC4FE</name>
- <description>Output compare 4 fast
- enable</description>
- <bitOffset>10</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CC4S</name>
- <description>Capture/Compare 4
- selection</description>
- <bitOffset>8</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>OC3CE</name>
- <description>Output compare 3 clear
- enable</description>
- <bitOffset>7</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>OC3M</name>
- <description>Output compare 3 mode</description>
- <bitOffset>4</bitOffset>
- <bitWidth>3</bitWidth>
- </field>
- <field>
- <name>OC3PE</name>
- <description>Output compare 3 preload
- enable</description>
- <bitOffset>3</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>OC3FE</name>
- <description>Output compare 3 fast
- enable</description>
- <bitOffset>2</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CC3S</name>
- <description>Capture/Compare 3
- selection</description>
- <bitOffset>0</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>CCMR2_Input</name>
- <displayName>CCMR2_Input</displayName>
- <description>capture/compare mode register 2 (input
- mode)</description>
- <alternateRegister>CCMR2_Output</alternateRegister>
- <addressOffset>0x1C</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>IC4F</name>
- <description>Input capture 4 filter</description>
- <bitOffset>12</bitOffset>
- <bitWidth>4</bitWidth>
- </field>
- <field>
- <name>IC4PSC</name>
- <description>Input capture 4 prescaler</description>
- <bitOffset>10</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>CC4S</name>
- <description>Capture/Compare 4
- selection</description>
- <bitOffset>8</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>IC3F</name>
- <description>Input capture 3 filter</description>
- <bitOffset>4</bitOffset>
- <bitWidth>4</bitWidth>
- </field>
- <field>
- <name>IC3PSC</name>
- <description>Input capture 3 prescaler</description>
- <bitOffset>2</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>CC3S</name>
- <description>Capture/compare 3
- selection</description>
- <bitOffset>0</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>CCER</name>
- <displayName>CCER</displayName>
- <description>capture/compare enable
- register</description>
- <addressOffset>0x20</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x0000</resetValue>
- <fields>
- <field>
- <name>CC4P</name>
- <description>Capture/Compare 3 output
- Polarity</description>
- <bitOffset>13</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CC4E</name>
- <description>Capture/Compare 4 output
- enable</description>
- <bitOffset>12</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CC3NP</name>
- <description>Capture/Compare 3 output
- Polarity</description>
- <bitOffset>11</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CC3NE</name>
- <description>Capture/Compare 3 complementary output
- enable</description>
- <bitOffset>10</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CC3P</name>
- <description>Capture/Compare 3 output
- Polarity</description>
- <bitOffset>9</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CC3E</name>
- <description>Capture/Compare 3 output
- enable</description>
- <bitOffset>8</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CC2NP</name>
- <description>Capture/Compare 2 output
- Polarity</description>
- <bitOffset>7</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CC2NE</name>
- <description>Capture/Compare 2 complementary output
- enable</description>
- <bitOffset>6</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CC2P</name>
- <description>Capture/Compare 2 output
- Polarity</description>
- <bitOffset>5</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CC2E</name>
- <description>Capture/Compare 2 output
- enable</description>
- <bitOffset>4</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CC1NP</name>
- <description>Capture/Compare 1 output
- Polarity</description>
- <bitOffset>3</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CC1NE</name>
- <description>Capture/Compare 1 complementary output
- enable</description>
- <bitOffset>2</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CC1P</name>
- <description>Capture/Compare 1 output
- Polarity</description>
- <bitOffset>1</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CC1E</name>
- <description>Capture/Compare 1 output
- enable</description>
- <bitOffset>0</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>CNT</name>
- <displayName>CNT</displayName>
- <description>counter</description>
- <addressOffset>0x24</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>CNT</name>
- <description>counter value</description>
- <bitOffset>0</bitOffset>
- <bitWidth>16</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>PSC</name>
- <displayName>PSC</displayName>
- <description>prescaler</description>
- <addressOffset>0x28</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x0000</resetValue>
- <fields>
- <field>
- <name>PSC</name>
- <description>Prescaler value</description>
- <bitOffset>0</bitOffset>
- <bitWidth>16</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>ARR</name>
- <displayName>ARR</displayName>
- <description>auto-reload register</description>
- <addressOffset>0x2C</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>ARR</name>
- <description>Auto-reload value</description>
- <bitOffset>0</bitOffset>
- <bitWidth>16</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>RCR</name>
- <displayName>RCR</displayName>
- <description>repetition counter register</description>
- <addressOffset>0x30</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x0000</resetValue>
- <fields>
- <field>
- <name>REP</name>
- <description>Repetition counter value</description>
- <bitOffset>0</bitOffset>
- <bitWidth>8</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>CCR1</name>
- <displayName>CCR1</displayName>
- <description>capture/compare register 1</description>
- <addressOffset>0x34</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>CCR1</name>
- <description>Capture/Compare 1 value</description>
- <bitOffset>0</bitOffset>
- <bitWidth>16</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>CCR2</name>
- <displayName>CCR2</displayName>
- <description>capture/compare register 2</description>
- <addressOffset>0x38</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>CCR2</name>
- <description>Capture/Compare 2 value</description>
- <bitOffset>0</bitOffset>
- <bitWidth>16</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>CCR3</name>
- <displayName>CCR3</displayName>
- <description>capture/compare register 3</description>
- <addressOffset>0x3C</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>CCR3</name>
- <description>Capture/Compare 3 value</description>
- <bitOffset>0</bitOffset>
- <bitWidth>16</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>CCR4</name>
- <displayName>CCR4</displayName>
- <description>capture/compare register 4</description>
- <addressOffset>0x40</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>CCR4</name>
- <description>Capture/Compare 3 value</description>
- <bitOffset>0</bitOffset>
- <bitWidth>16</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>BDTR</name>
- <displayName>BDTR</displayName>
- <description>break and dead-time register</description>
- <addressOffset>0x44</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x0000</resetValue>
- <fields>
- <field>
- <name>MOE</name>
- <description>Main output enable</description>
- <bitOffset>15</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>AOE</name>
- <description>Automatic output enable</description>
- <bitOffset>14</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>BKP</name>
- <description>Break polarity</description>
- <bitOffset>13</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>BKE</name>
- <description>Break enable</description>
- <bitOffset>12</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>OSSR</name>
- <description>Off-state selection for Run
- mode</description>
- <bitOffset>11</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>OSSI</name>
- <description>Off-state selection for Idle
- mode</description>
- <bitOffset>10</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>LOCK</name>
- <description>Lock configuration</description>
- <bitOffset>8</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>DTG</name>
- <description>Dead-time generator setup</description>
- <bitOffset>0</bitOffset>
- <bitWidth>8</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>DCR</name>
- <displayName>DCR</displayName>
- <description>DMA control register</description>
- <addressOffset>0x48</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x0000</resetValue>
- <fields>
- <field>
- <name>DBL</name>
- <description>DMA burst length</description>
- <bitOffset>8</bitOffset>
- <bitWidth>5</bitWidth>
- </field>
- <field>
- <name>DBA</name>
- <description>DMA base address</description>
- <bitOffset>0</bitOffset>
- <bitWidth>5</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>DMAR</name>
- <displayName>DMAR</displayName>
- <description>DMA address for full transfer</description>
- <addressOffset>0x4C</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x0000</resetValue>
- <fields>
- <field>
- <name>DMAB</name>
- <description>DMA register for burst
- accesses</description>
- <bitOffset>0</bitOffset>
- <bitWidth>16</bitWidth>
- </field>
- </fields>
- </register>
- </registers>
- </peripheral>
- <peripheral>
- <name>TIM3</name>
- <description>General-purpose-timers</description>
- <groupName>TIM</groupName>
- <baseAddress>0x40000400</baseAddress>
- <addressBlock>
- <offset>0x0</offset>
- <size>0x400</size>
- <usage>registers</usage>
- </addressBlock>
- <interrupt>
- <name>TIM1_BRK_UP_TRG_COM</name>
- <description>TIM1 break, update, trigger and commutation
- interrupt</description>
- <value>13</value>
- </interrupt>
- <interrupt>
- <name>TIM1_CC</name>
- <description>TIM1 Capture Compare interrupt</description>
- <value>14</value>
- </interrupt>
- <registers>
- <register>
- <name>CR1</name>
- <displayName>CR1</displayName>
- <description>control register 1</description>
- <addressOffset>0x0</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x0000</resetValue>
- <fields>
- <field>
- <name>CKD</name>
- <description>Clock division</description>
- <bitOffset>8</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>ARPE</name>
- <description>Auto-reload preload enable</description>
- <bitOffset>7</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CMS</name>
- <description>Center-aligned mode
- selection</description>
- <bitOffset>5</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>DIR</name>
- <description>Direction</description>
- <bitOffset>4</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>OPM</name>
- <description>One-pulse mode</description>
- <bitOffset>3</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>URS</name>
- <description>Update request source</description>
- <bitOffset>2</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>UDIS</name>
- <description>Update disable</description>
- <bitOffset>1</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CEN</name>
- <description>Counter enable</description>
- <bitOffset>0</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>CR2</name>
- <displayName>CR2</displayName>
- <description>control register 2</description>
- <addressOffset>0x4</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x0000</resetValue>
- <fields>
- <field>
- <name>TI1S</name>
- <description>TI1 selection</description>
- <bitOffset>7</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>MMS</name>
- <description>Master mode selection</description>
- <bitOffset>4</bitOffset>
- <bitWidth>3</bitWidth>
- </field>
- <field>
- <name>CCDS</name>
- <description>Capture/compare DMA
- selection</description>
- <bitOffset>3</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>SMCR</name>
- <displayName>SMCR</displayName>
- <description>slave mode control register</description>
- <addressOffset>0x8</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x0000</resetValue>
- <fields>
- <field>
- <name>ETP</name>
- <description>External trigger polarity</description>
- <bitOffset>15</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>ECE</name>
- <description>External clock enable</description>
- <bitOffset>14</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>ETPS</name>
- <description>External trigger prescaler</description>
- <bitOffset>12</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>ETF</name>
- <description>External trigger filter</description>
- <bitOffset>8</bitOffset>
- <bitWidth>4</bitWidth>
- </field>
- <field>
- <name>MSM</name>
- <description>Master/Slave mode</description>
- <bitOffset>7</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>TS</name>
- <description>Trigger selection</description>
- <bitOffset>4</bitOffset>
- <bitWidth>3</bitWidth>
- </field>
- <field>
- <name>SMS</name>
- <description>Slave mode selection</description>
- <bitOffset>0</bitOffset>
- <bitWidth>3</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>DIER</name>
- <displayName>DIER</displayName>
- <description>DMA/Interrupt enable register</description>
- <addressOffset>0xC</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x0000</resetValue>
- <fields>
- <field>
- <name>TDE</name>
- <description>Trigger DMA request enable</description>
- <bitOffset>14</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>COMDE</name>
- <description>Reserved</description>
- <bitOffset>13</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CC4DE</name>
- <description>Capture/Compare 4 DMA request
- enable</description>
- <bitOffset>12</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CC3DE</name>
- <description>Capture/Compare 3 DMA request
- enable</description>
- <bitOffset>11</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CC2DE</name>
- <description>Capture/Compare 2 DMA request
- enable</description>
- <bitOffset>10</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CC1DE</name>
- <description>Capture/Compare 1 DMA request
- enable</description>
- <bitOffset>9</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>UDE</name>
- <description>Update DMA request enable</description>
- <bitOffset>8</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>TIE</name>
- <description>Trigger interrupt enable</description>
- <bitOffset>6</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CC4IE</name>
- <description>Capture/Compare 4 interrupt
- enable</description>
- <bitOffset>4</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CC3IE</name>
- <description>Capture/Compare 3 interrupt
- enable</description>
- <bitOffset>3</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CC2IE</name>
- <description>Capture/Compare 2 interrupt
- enable</description>
- <bitOffset>2</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CC1IE</name>
- <description>Capture/Compare 1 interrupt
- enable</description>
- <bitOffset>1</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>UIE</name>
- <description>Update interrupt enable</description>
- <bitOffset>0</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>SR</name>
- <displayName>SR</displayName>
- <description>status register</description>
- <addressOffset>0x10</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x0000</resetValue>
- <fields>
- <field>
- <name>CC4OF</name>
- <description>Capture/Compare 4 overcapture
- flag</description>
- <bitOffset>12</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CC3OF</name>
- <description>Capture/Compare 3 overcapture
- flag</description>
- <bitOffset>11</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CC2OF</name>
- <description>Capture/compare 2 overcapture
- flag</description>
- <bitOffset>10</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CC1OF</name>
- <description>Capture/Compare 1 overcapture
- flag</description>
- <bitOffset>9</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>TIF</name>
- <description>Trigger interrupt flag</description>
- <bitOffset>6</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CC4IF</name>
- <description>Capture/Compare 4 interrupt
- flag</description>
- <bitOffset>4</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CC3IF</name>
- <description>Capture/Compare 3 interrupt
- flag</description>
- <bitOffset>3</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CC2IF</name>
- <description>Capture/Compare 2 interrupt
- flag</description>
- <bitOffset>2</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CC1IF</name>
- <description>Capture/compare 1 interrupt
- flag</description>
- <bitOffset>1</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>UIF</name>
- <description>Update interrupt flag</description>
- <bitOffset>0</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>EGR</name>
- <displayName>EGR</displayName>
- <description>event generation register</description>
- <addressOffset>0x14</addressOffset>
- <size>0x20</size>
- <access>write-only</access>
- <resetValue>0x0000</resetValue>
- <fields>
- <field>
- <name>TG</name>
- <description>Trigger generation</description>
- <bitOffset>6</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CC4G</name>
- <description>Capture/compare 4
- generation</description>
- <bitOffset>4</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CC3G</name>
- <description>Capture/compare 3
- generation</description>
- <bitOffset>3</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CC2G</name>
- <description>Capture/compare 2
- generation</description>
- <bitOffset>2</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CC1G</name>
- <description>Capture/compare 1
- generation</description>
- <bitOffset>1</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>UG</name>
- <description>Update generation</description>
- <bitOffset>0</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>CCMR1_Output</name>
- <displayName>CCMR1_Output</displayName>
- <description>capture/compare mode register 1 (output
- mode)</description>
- <addressOffset>0x18</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>OC2CE</name>
- <description>Output compare 2 clear
- enable</description>
- <bitOffset>15</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>OC2M</name>
- <description>Output compare 2 mode</description>
- <bitOffset>12</bitOffset>
- <bitWidth>3</bitWidth>
- </field>
- <field>
- <name>OC2PE</name>
- <description>Output compare 2 preload
- enable</description>
- <bitOffset>11</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>OC2FE</name>
- <description>Output compare 2 fast
- enable</description>
- <bitOffset>10</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CC2S</name>
- <description>Capture/Compare 2
- selection</description>
- <bitOffset>8</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>OC1CE</name>
- <description>Output compare 1 clear
- enable</description>
- <bitOffset>7</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>OC1M</name>
- <description>Output compare 1 mode</description>
- <bitOffset>4</bitOffset>
- <bitWidth>3</bitWidth>
- </field>
- <field>
- <name>OC1PE</name>
- <description>Output compare 1 preload
- enable</description>
- <bitOffset>3</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>OC1FE</name>
- <description>Output compare 1 fast
- enable</description>
- <bitOffset>2</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CC1S</name>
- <description>Capture/Compare 1
- selection</description>
- <bitOffset>0</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>CCMR1_Input</name>
- <displayName>CCMR1_Input</displayName>
- <description>capture/compare mode register 1 (input
- mode)</description>
- <alternateRegister>CCMR1_Output</alternateRegister>
- <addressOffset>0x18</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>IC2F</name>
- <description>Input capture 2 filter</description>
- <bitOffset>12</bitOffset>
- <bitWidth>4</bitWidth>
- </field>
- <field>
- <name>IC2PSC</name>
- <description>Input capture 2 prescaler</description>
- <bitOffset>10</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>CC2S</name>
- <description>Capture/compare 2
- selection</description>
- <bitOffset>8</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>IC1F</name>
- <description>Input capture 1 filter</description>
- <bitOffset>4</bitOffset>
- <bitWidth>4</bitWidth>
- </field>
- <field>
- <name>IC1PSC</name>
- <description>Input capture 1 prescaler</description>
- <bitOffset>2</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>CC1S</name>
- <description>Capture/Compare 1
- selection</description>
- <bitOffset>0</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>CCMR2_Output</name>
- <displayName>CCMR2_Output</displayName>
- <description>capture/compare mode register 2 (output
- mode)</description>
- <addressOffset>0x1C</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>OC4CE</name>
- <description>Output compare 4 clear
- enable</description>
- <bitOffset>15</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>OC4M</name>
- <description>Output compare 4 mode</description>
- <bitOffset>12</bitOffset>
- <bitWidth>3</bitWidth>
- </field>
- <field>
- <name>OC4PE</name>
- <description>Output compare 4 preload
- enable</description>
- <bitOffset>11</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>OC4FE</name>
- <description>Output compare 4 fast
- enable</description>
- <bitOffset>10</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CC4S</name>
- <description>Capture/Compare 4
- selection</description>
- <bitOffset>8</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>OC3CE</name>
- <description>Output compare 3 clear
- enable</description>
- <bitOffset>7</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>OC3M</name>
- <description>Output compare 3 mode</description>
- <bitOffset>4</bitOffset>
- <bitWidth>3</bitWidth>
- </field>
- <field>
- <name>OC3PE</name>
- <description>Output compare 3 preload
- enable</description>
- <bitOffset>3</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>OC3FE</name>
- <description>Output compare 3 fast
- enable</description>
- <bitOffset>2</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CC3S</name>
- <description>Capture/Compare 3
- selection</description>
- <bitOffset>0</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>CCMR2_Input</name>
- <displayName>CCMR2_Input</displayName>
- <description>capture/compare mode register 2 (input
- mode)</description>
- <alternateRegister>CCMR2_Output</alternateRegister>
- <addressOffset>0x1C</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>IC4F</name>
- <description>Input capture 4 filter</description>
- <bitOffset>12</bitOffset>
- <bitWidth>4</bitWidth>
- </field>
- <field>
- <name>IC4PSC</name>
- <description>Input capture 4 prescaler</description>
- <bitOffset>10</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>CC4S</name>
- <description>Capture/Compare 4
- selection</description>
- <bitOffset>8</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>IC3F</name>
- <description>Input capture 3 filter</description>
- <bitOffset>4</bitOffset>
- <bitWidth>4</bitWidth>
- </field>
- <field>
- <name>IC3PSC</name>
- <description>Input capture 3 prescaler</description>
- <bitOffset>2</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>CC3S</name>
- <description>Capture/Compare 3
- selection</description>
- <bitOffset>0</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>CCER</name>
- <displayName>CCER</displayName>
- <description>capture/compare enable
- register</description>
- <addressOffset>0x20</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x0000</resetValue>
- <fields>
- <field>
- <name>CC4NP</name>
- <description>Capture/Compare 4 output
- Polarity</description>
- <bitOffset>15</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CC4P</name>
- <description>Capture/Compare 3 output
- Polarity</description>
- <bitOffset>13</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CC4E</name>
- <description>Capture/Compare 4 output
- enable</description>
- <bitOffset>12</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CC3NP</name>
- <description>Capture/Compare 3 output
- Polarity</description>
- <bitOffset>11</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CC3P</name>
- <description>Capture/Compare 3 output
- Polarity</description>
- <bitOffset>9</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CC3E</name>
- <description>Capture/Compare 3 output
- enable</description>
- <bitOffset>8</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CC2NP</name>
- <description>Capture/Compare 2 output
- Polarity</description>
- <bitOffset>7</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CC2P</name>
- <description>Capture/Compare 2 output
- Polarity</description>
- <bitOffset>5</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CC2E</name>
- <description>Capture/Compare 2 output
- enable</description>
- <bitOffset>4</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CC1NP</name>
- <description>Capture/Compare 1 output
- Polarity</description>
- <bitOffset>3</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CC1P</name>
- <description>Capture/Compare 1 output
- Polarity</description>
- <bitOffset>1</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CC1E</name>
- <description>Capture/Compare 1 output
- enable</description>
- <bitOffset>0</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>CNT</name>
- <displayName>CNT</displayName>
- <description>counter</description>
- <addressOffset>0x24</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>CNT_H</name>
- <description>High counter value (TIM2
- only)</description>
- <bitOffset>16</bitOffset>
- <bitWidth>16</bitWidth>
- </field>
- <field>
- <name>CNT_L</name>
- <description>Low counter value</description>
- <bitOffset>0</bitOffset>
- <bitWidth>16</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>PSC</name>
- <displayName>PSC</displayName>
- <description>prescaler</description>
- <addressOffset>0x28</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x0000</resetValue>
- <fields>
- <field>
- <name>PSC</name>
- <description>Prescaler value</description>
- <bitOffset>0</bitOffset>
- <bitWidth>16</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>ARR</name>
- <displayName>ARR</displayName>
- <description>auto-reload register</description>
- <addressOffset>0x2C</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>ARR_H</name>
- <description>High Auto-reload value (TIM2
- only)</description>
- <bitOffset>16</bitOffset>
- <bitWidth>16</bitWidth>
- </field>
- <field>
- <name>ARR_L</name>
- <description>Low Auto-reload value</description>
- <bitOffset>0</bitOffset>
- <bitWidth>16</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>CCR1</name>
- <displayName>CCR1</displayName>
- <description>capture/compare register 1</description>
- <addressOffset>0x34</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>CCR1_H</name>
- <description>High Capture/Compare 1 value (TIM2
- only)</description>
- <bitOffset>16</bitOffset>
- <bitWidth>16</bitWidth>
- </field>
- <field>
- <name>CCR1_L</name>
- <description>Low Capture/Compare 1
- value</description>
- <bitOffset>0</bitOffset>
- <bitWidth>16</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>CCR2</name>
- <displayName>CCR2</displayName>
- <description>capture/compare register 2</description>
- <addressOffset>0x38</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>CCR2_H</name>
- <description>High Capture/Compare 2 value (TIM2
- only)</description>
- <bitOffset>16</bitOffset>
- <bitWidth>16</bitWidth>
- </field>
- <field>
- <name>CCR2_L</name>
- <description>Low Capture/Compare 2
- value</description>
- <bitOffset>0</bitOffset>
- <bitWidth>16</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>CCR3</name>
- <displayName>CCR3</displayName>
- <description>capture/compare register 3</description>
- <addressOffset>0x3C</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>CCR3_H</name>
- <description>High Capture/Compare value (TIM2
- only)</description>
- <bitOffset>16</bitOffset>
- <bitWidth>16</bitWidth>
- </field>
- <field>
- <name>CCR3_L</name>
- <description>Low Capture/Compare value</description>
- <bitOffset>0</bitOffset>
- <bitWidth>16</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>CCR4</name>
- <displayName>CCR4</displayName>
- <description>capture/compare register 4</description>
- <addressOffset>0x40</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>CCR4_H</name>
- <description>High Capture/Compare value (TIM2
- only)</description>
- <bitOffset>16</bitOffset>
- <bitWidth>16</bitWidth>
- </field>
- <field>
- <name>CCR4_L</name>
- <description>Low Capture/Compare value</description>
- <bitOffset>0</bitOffset>
- <bitWidth>16</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>DCR</name>
- <displayName>DCR</displayName>
- <description>DMA control register</description>
- <addressOffset>0x48</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x0000</resetValue>
- <fields>
- <field>
- <name>DBL</name>
- <description>DMA burst length</description>
- <bitOffset>8</bitOffset>
- <bitWidth>5</bitWidth>
- </field>
- <field>
- <name>DBA</name>
- <description>DMA base address</description>
- <bitOffset>0</bitOffset>
- <bitWidth>5</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>DMAR</name>
- <displayName>DMAR</displayName>
- <description>DMA address for full transfer</description>
- <addressOffset>0x4C</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x0000</resetValue>
- <fields>
- <field>
- <name>DMAR</name>
- <description>DMA register for burst
- accesses</description>
- <bitOffset>0</bitOffset>
- <bitWidth>16</bitWidth>
- </field>
- </fields>
- </register>
- </registers>
- </peripheral>
- <peripheral>
- <name>TIM14</name>
- <description>General-purpose-timers</description>
- <groupName>TIM</groupName>
- <baseAddress>0x40002000</baseAddress>
- <addressBlock>
- <offset>0x0</offset>
- <size>0x400</size>
- <usage>registers</usage>
- </addressBlock>
- <interrupt>
- <name>TIM2</name>
- <description>TIM2 global interrupt</description>
- <value>15</value>
- </interrupt>
- <registers>
- <register>
- <name>CR1</name>
- <displayName>CR1</displayName>
- <description>control register 1</description>
- <addressOffset>0x0</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x0000</resetValue>
- <fields>
- <field>
- <name>CKD</name>
- <description>Clock division</description>
- <bitOffset>8</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>ARPE</name>
- <description>Auto-reload preload enable</description>
- <bitOffset>7</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>URS</name>
- <description>Update request source</description>
- <bitOffset>2</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>UDIS</name>
- <description>Update disable</description>
- <bitOffset>1</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CEN</name>
- <description>Counter enable</description>
- <bitOffset>0</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>DIER</name>
- <displayName>DIER</displayName>
- <description>DMA/Interrupt enable register</description>
- <addressOffset>0xC</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x0000</resetValue>
- <fields>
- <field>
- <name>CC1IE</name>
- <description>Capture/Compare 1 interrupt
- enable</description>
- <bitOffset>1</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>UIE</name>
- <description>Update interrupt enable</description>
- <bitOffset>0</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>SR</name>
- <displayName>SR</displayName>
- <description>status register</description>
- <addressOffset>0x10</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x0000</resetValue>
- <fields>
- <field>
- <name>CC1OF</name>
- <description>Capture/Compare 1 overcapture
- flag</description>
- <bitOffset>9</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CC1IF</name>
- <description>Capture/compare 1 interrupt
- flag</description>
- <bitOffset>1</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>UIF</name>
- <description>Update interrupt flag</description>
- <bitOffset>0</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>EGR</name>
- <displayName>EGR</displayName>
- <description>event generation register</description>
- <addressOffset>0x14</addressOffset>
- <size>0x20</size>
- <access>write-only</access>
- <resetValue>0x0000</resetValue>
- <fields>
- <field>
- <name>CC1G</name>
- <description>Capture/compare 1
- generation</description>
- <bitOffset>1</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>UG</name>
- <description>Update generation</description>
- <bitOffset>0</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>CCMR1_Output</name>
- <displayName>CCMR1_Output</displayName>
- <description>capture/compare mode register (output
- mode)</description>
- <addressOffset>0x18</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>CC1S</name>
- <description>Capture/Compare 1
- selection</description>
- <bitOffset>0</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>OC1FE</name>
- <description>Output compare 1 fast
- enable</description>
- <bitOffset>2</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>OC1PE</name>
- <description>Output Compare 1 preload
- enable</description>
- <bitOffset>3</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>OC1M</name>
- <description>Output Compare 1 mode</description>
- <bitOffset>4</bitOffset>
- <bitWidth>3</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>CCMR1_Input</name>
- <displayName>CCMR1_Input</displayName>
- <description>capture/compare mode register (input
- mode)</description>
- <alternateRegister>CCMR1_Output</alternateRegister>
- <addressOffset>0x18</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>IC1F</name>
- <description>Input capture 1 filter</description>
- <bitOffset>4</bitOffset>
- <bitWidth>4</bitWidth>
- </field>
- <field>
- <name>IC1PSC</name>
- <description>Input capture 1 prescaler</description>
- <bitOffset>2</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>CC1S</name>
- <description>Capture/Compare 1
- selection</description>
- <bitOffset>0</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>CCER</name>
- <displayName>CCER</displayName>
- <description>capture/compare enable
- register</description>
- <addressOffset>0x20</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x0000</resetValue>
- <fields>
- <field>
- <name>CC1NP</name>
- <description>Capture/Compare 1 output
- Polarity</description>
- <bitOffset>3</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CC1P</name>
- <description>Capture/Compare 1 output
- Polarity</description>
- <bitOffset>1</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CC1E</name>
- <description>Capture/Compare 1 output
- enable</description>
- <bitOffset>0</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>CNT</name>
- <displayName>CNT</displayName>
- <description>counter</description>
- <addressOffset>0x24</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>CNT</name>
- <description>counter value</description>
- <bitOffset>0</bitOffset>
- <bitWidth>16</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>PSC</name>
- <displayName>PSC</displayName>
- <description>prescaler</description>
- <addressOffset>0x28</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x0000</resetValue>
- <fields>
- <field>
- <name>PSC</name>
- <description>Prescaler value</description>
- <bitOffset>0</bitOffset>
- <bitWidth>16</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>ARR</name>
- <displayName>ARR</displayName>
- <description>auto-reload register</description>
- <addressOffset>0x2C</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>ARR</name>
- <description>Auto-reload value</description>
- <bitOffset>0</bitOffset>
- <bitWidth>16</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>CCR1</name>
- <displayName>CCR1</displayName>
- <description>capture/compare register 1</description>
- <addressOffset>0x34</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>CCR1</name>
- <description>Capture/Compare 1 value</description>
- <bitOffset>0</bitOffset>
- <bitWidth>16</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>OR</name>
- <displayName>OR</displayName>
- <description>option register</description>
- <addressOffset>0x50</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>RMP</name>
- <description>Timer input 1 remap</description>
- <bitOffset>0</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- </fields>
- </register>
- </registers>
- </peripheral>
- <peripheral>
- <name>TIM6</name>
- <description>Basic-timers</description>
- <groupName>TIM</groupName>
- <baseAddress>0x40001000</baseAddress>
- <addressBlock>
- <offset>0x0</offset>
- <size>0x400</size>
- <usage>registers</usage>
- </addressBlock>
- <interrupt>
- <name>TIM3</name>
- <description>TIM3 global interrupt</description>
- <value>16</value>
- </interrupt>
- <registers>
- <register>
- <name>CR1</name>
- <displayName>CR1</displayName>
- <description>control register 1</description>
- <addressOffset>0x0</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x0000</resetValue>
- <fields>
- <field>
- <name>ARPE</name>
- <description>Auto-reload preload enable</description>
- <bitOffset>7</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>OPM</name>
- <description>One-pulse mode</description>
- <bitOffset>3</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>URS</name>
- <description>Update request source</description>
- <bitOffset>2</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>UDIS</name>
- <description>Update disable</description>
- <bitOffset>1</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CEN</name>
- <description>Counter enable</description>
- <bitOffset>0</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>CR2</name>
- <displayName>CR2</displayName>
- <description>control register 2</description>
- <addressOffset>0x4</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x0000</resetValue>
- <fields>
- <field>
- <name>MMS</name>
- <description>Master mode selection</description>
- <bitOffset>4</bitOffset>
- <bitWidth>3</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>DIER</name>
- <displayName>DIER</displayName>
- <description>DMA/Interrupt enable register</description>
- <addressOffset>0xC</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x0000</resetValue>
- <fields>
- <field>
- <name>UDE</name>
- <description>Update DMA request enable</description>
- <bitOffset>8</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>UIE</name>
- <description>Update interrupt enable</description>
- <bitOffset>0</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>SR</name>
- <displayName>SR</displayName>
- <description>status register</description>
- <addressOffset>0x10</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x0000</resetValue>
- <fields>
- <field>
- <name>UIF</name>
- <description>Update interrupt flag</description>
- <bitOffset>0</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>EGR</name>
- <displayName>EGR</displayName>
- <description>event generation register</description>
- <addressOffset>0x14</addressOffset>
- <size>0x20</size>
- <access>write-only</access>
- <resetValue>0x0000</resetValue>
- <fields>
- <field>
- <name>UG</name>
- <description>Update generation</description>
- <bitOffset>0</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>CNT</name>
- <displayName>CNT</displayName>
- <description>counter</description>
- <addressOffset>0x24</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>CNT</name>
- <description>Low counter value</description>
- <bitOffset>0</bitOffset>
- <bitWidth>16</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>PSC</name>
- <displayName>PSC</displayName>
- <description>prescaler</description>
- <addressOffset>0x28</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x0000</resetValue>
- <fields>
- <field>
- <name>PSC</name>
- <description>Prescaler value</description>
- <bitOffset>0</bitOffset>
- <bitWidth>16</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>ARR</name>
- <displayName>ARR</displayName>
- <description>auto-reload register</description>
- <addressOffset>0x2C</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>ARR</name>
- <description>Low Auto-reload value</description>
- <bitOffset>0</bitOffset>
- <bitWidth>16</bitWidth>
- </field>
- </fields>
- </register>
- </registers>
- </peripheral>
- <peripheral>
- <name>EXTI</name>
- <description>External interrupt/event
- controller</description>
- <groupName>EXTI</groupName>
- <baseAddress>0x40010400</baseAddress>
- <addressBlock>
- <offset>0x0</offset>
- <size>0x400</size>
- <usage>registers</usage>
- </addressBlock>
- <interrupt>
- <name>TIM14</name>
- <description>TIM14 global interrupt</description>
- <value>19</value>
- </interrupt>
- <registers>
- <register>
- <name>IMR</name>
- <displayName>IMR</displayName>
- <description>Interrupt mask register
- (EXTI_IMR)</description>
- <addressOffset>0x0</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x0F940000</resetValue>
- <fields>
- <field>
- <name>MR0</name>
- <description>Interrupt Mask on line 0</description>
- <bitOffset>0</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>MR1</name>
- <description>Interrupt Mask on line 1</description>
- <bitOffset>1</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>MR2</name>
- <description>Interrupt Mask on line 2</description>
- <bitOffset>2</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>MR3</name>
- <description>Interrupt Mask on line 3</description>
- <bitOffset>3</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>MR4</name>
- <description>Interrupt Mask on line 4</description>
- <bitOffset>4</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>MR5</name>
- <description>Interrupt Mask on line 5</description>
- <bitOffset>5</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>MR6</name>
- <description>Interrupt Mask on line 6</description>
- <bitOffset>6</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>MR7</name>
- <description>Interrupt Mask on line 7</description>
- <bitOffset>7</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>MR8</name>
- <description>Interrupt Mask on line 8</description>
- <bitOffset>8</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>MR9</name>
- <description>Interrupt Mask on line 9</description>
- <bitOffset>9</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>MR10</name>
- <description>Interrupt Mask on line 10</description>
- <bitOffset>10</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>MR11</name>
- <description>Interrupt Mask on line 11</description>
- <bitOffset>11</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>MR12</name>
- <description>Interrupt Mask on line 12</description>
- <bitOffset>12</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>MR13</name>
- <description>Interrupt Mask on line 13</description>
- <bitOffset>13</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>MR14</name>
- <description>Interrupt Mask on line 14</description>
- <bitOffset>14</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>MR15</name>
- <description>Interrupt Mask on line 15</description>
- <bitOffset>15</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>MR16</name>
- <description>Interrupt Mask on line 16</description>
- <bitOffset>16</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>MR17</name>
- <description>Interrupt Mask on line 17</description>
- <bitOffset>17</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>MR18</name>
- <description>Interrupt Mask on line 18</description>
- <bitOffset>18</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>MR19</name>
- <description>Interrupt Mask on line 19</description>
- <bitOffset>19</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>MR20</name>
- <description>Interrupt Mask on line 20</description>
- <bitOffset>20</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>MR21</name>
- <description>Interrupt Mask on line 21</description>
- <bitOffset>21</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>MR22</name>
- <description>Interrupt Mask on line 22</description>
- <bitOffset>22</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>MR23</name>
- <description>Interrupt Mask on line 23</description>
- <bitOffset>23</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>MR24</name>
- <description>Interrupt Mask on line 24</description>
- <bitOffset>24</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>MR25</name>
- <description>Interrupt Mask on line 25</description>
- <bitOffset>25</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>MR26</name>
- <description>Interrupt Mask on line 26</description>
- <bitOffset>26</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>MR27</name>
- <description>Interrupt Mask on line 27</description>
- <bitOffset>27</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>EMR</name>
- <displayName>EMR</displayName>
- <description>Event mask register (EXTI_EMR)</description>
- <addressOffset>0x4</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>MR0</name>
- <description>Event Mask on line 0</description>
- <bitOffset>0</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>MR1</name>
- <description>Event Mask on line 1</description>
- <bitOffset>1</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>MR2</name>
- <description>Event Mask on line 2</description>
- <bitOffset>2</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>MR3</name>
- <description>Event Mask on line 3</description>
- <bitOffset>3</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>MR4</name>
- <description>Event Mask on line 4</description>
- <bitOffset>4</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>MR5</name>
- <description>Event Mask on line 5</description>
- <bitOffset>5</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>MR6</name>
- <description>Event Mask on line 6</description>
- <bitOffset>6</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>MR7</name>
- <description>Event Mask on line 7</description>
- <bitOffset>7</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>MR8</name>
- <description>Event Mask on line 8</description>
- <bitOffset>8</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>MR9</name>
- <description>Event Mask on line 9</description>
- <bitOffset>9</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>MR10</name>
- <description>Event Mask on line 10</description>
- <bitOffset>10</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>MR11</name>
- <description>Event Mask on line 11</description>
- <bitOffset>11</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>MR12</name>
- <description>Event Mask on line 12</description>
- <bitOffset>12</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>MR13</name>
- <description>Event Mask on line 13</description>
- <bitOffset>13</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>MR14</name>
- <description>Event Mask on line 14</description>
- <bitOffset>14</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>MR15</name>
- <description>Event Mask on line 15</description>
- <bitOffset>15</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>MR16</name>
- <description>Event Mask on line 16</description>
- <bitOffset>16</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>MR17</name>
- <description>Event Mask on line 17</description>
- <bitOffset>17</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>MR18</name>
- <description>Event Mask on line 18</description>
- <bitOffset>18</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>MR19</name>
- <description>Event Mask on line 19</description>
- <bitOffset>19</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>MR20</name>
- <description>Event Mask on line 20</description>
- <bitOffset>20</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>MR21</name>
- <description>Event Mask on line 21</description>
- <bitOffset>21</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>MR22</name>
- <description>Event Mask on line 22</description>
- <bitOffset>22</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>MR23</name>
- <description>Event Mask on line 23</description>
- <bitOffset>23</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>MR24</name>
- <description>Event Mask on line 24</description>
- <bitOffset>24</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>MR25</name>
- <description>Event Mask on line 25</description>
- <bitOffset>25</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>MR26</name>
- <description>Event Mask on line 26</description>
- <bitOffset>26</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>MR27</name>
- <description>Event Mask on line 27</description>
- <bitOffset>27</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>RTSR</name>
- <displayName>RTSR</displayName>
- <description>Rising Trigger selection register
- (EXTI_RTSR)</description>
- <addressOffset>0x8</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>TR0</name>
- <description>Rising trigger event configuration of
- line 0</description>
- <bitOffset>0</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>TR1</name>
- <description>Rising trigger event configuration of
- line 1</description>
- <bitOffset>1</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>TR2</name>
- <description>Rising trigger event configuration of
- line 2</description>
- <bitOffset>2</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>TR3</name>
- <description>Rising trigger event configuration of
- line 3</description>
- <bitOffset>3</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>TR4</name>
- <description>Rising trigger event configuration of
- line 4</description>
- <bitOffset>4</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>TR5</name>
- <description>Rising trigger event configuration of
- line 5</description>
- <bitOffset>5</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>TR6</name>
- <description>Rising trigger event configuration of
- line 6</description>
- <bitOffset>6</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>TR7</name>
- <description>Rising trigger event configuration of
- line 7</description>
- <bitOffset>7</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>TR8</name>
- <description>Rising trigger event configuration of
- line 8</description>
- <bitOffset>8</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>TR9</name>
- <description>Rising trigger event configuration of
- line 9</description>
- <bitOffset>9</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>TR10</name>
- <description>Rising trigger event configuration of
- line 10</description>
- <bitOffset>10</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>TR11</name>
- <description>Rising trigger event configuration of
- line 11</description>
- <bitOffset>11</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>TR12</name>
- <description>Rising trigger event configuration of
- line 12</description>
- <bitOffset>12</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>TR13</name>
- <description>Rising trigger event configuration of
- line 13</description>
- <bitOffset>13</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>TR14</name>
- <description>Rising trigger event configuration of
- line 14</description>
- <bitOffset>14</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>TR15</name>
- <description>Rising trigger event configuration of
- line 15</description>
- <bitOffset>15</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>TR16</name>
- <description>Rising trigger event configuration of
- line 16</description>
- <bitOffset>16</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>TR17</name>
- <description>Rising trigger event configuration of
- line 17</description>
- <bitOffset>17</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>TR19</name>
- <description>Rising trigger event configuration of
- line 19</description>
- <bitOffset>19</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>FTSR</name>
- <displayName>FTSR</displayName>
- <description>Falling Trigger selection register
- (EXTI_FTSR)</description>
- <addressOffset>0xC</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>TR0</name>
- <description>Falling trigger event configuration of
- line 0</description>
- <bitOffset>0</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>TR1</name>
- <description>Falling trigger event configuration of
- line 1</description>
- <bitOffset>1</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>TR2</name>
- <description>Falling trigger event configuration of
- line 2</description>
- <bitOffset>2</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>TR3</name>
- <description>Falling trigger event configuration of
- line 3</description>
- <bitOffset>3</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>TR4</name>
- <description>Falling trigger event configuration of
- line 4</description>
- <bitOffset>4</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>TR5</name>
- <description>Falling trigger event configuration of
- line 5</description>
- <bitOffset>5</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>TR6</name>
- <description>Falling trigger event configuration of
- line 6</description>
- <bitOffset>6</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>TR7</name>
- <description>Falling trigger event configuration of
- line 7</description>
- <bitOffset>7</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>TR8</name>
- <description>Falling trigger event configuration of
- line 8</description>
- <bitOffset>8</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>TR9</name>
- <description>Falling trigger event configuration of
- line 9</description>
- <bitOffset>9</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>TR10</name>
- <description>Falling trigger event configuration of
- line 10</description>
- <bitOffset>10</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>TR11</name>
- <description>Falling trigger event configuration of
- line 11</description>
- <bitOffset>11</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>TR12</name>
- <description>Falling trigger event configuration of
- line 12</description>
- <bitOffset>12</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>TR13</name>
- <description>Falling trigger event configuration of
- line 13</description>
- <bitOffset>13</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>TR14</name>
- <description>Falling trigger event configuration of
- line 14</description>
- <bitOffset>14</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>TR15</name>
- <description>Falling trigger event configuration of
- line 15</description>
- <bitOffset>15</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>TR16</name>
- <description>Falling trigger event configuration of
- line 16</description>
- <bitOffset>16</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>TR17</name>
- <description>Falling trigger event configuration of
- line 17</description>
- <bitOffset>17</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>TR19</name>
- <description>Falling trigger event configuration of
- line 19</description>
- <bitOffset>19</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>SWIER</name>
- <displayName>SWIER</displayName>
- <description>Software interrupt event register
- (EXTI_SWIER)</description>
- <addressOffset>0x10</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>SWIER0</name>
- <description>Software Interrupt on line
- 0</description>
- <bitOffset>0</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>SWIER1</name>
- <description>Software Interrupt on line
- 1</description>
- <bitOffset>1</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>SWIER2</name>
- <description>Software Interrupt on line
- 2</description>
- <bitOffset>2</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>SWIER3</name>
- <description>Software Interrupt on line
- 3</description>
- <bitOffset>3</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>SWIER4</name>
- <description>Software Interrupt on line
- 4</description>
- <bitOffset>4</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>SWIER5</name>
- <description>Software Interrupt on line
- 5</description>
- <bitOffset>5</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>SWIER6</name>
- <description>Software Interrupt on line
- 6</description>
- <bitOffset>6</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>SWIER7</name>
- <description>Software Interrupt on line
- 7</description>
- <bitOffset>7</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>SWIER8</name>
- <description>Software Interrupt on line
- 8</description>
- <bitOffset>8</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>SWIER9</name>
- <description>Software Interrupt on line
- 9</description>
- <bitOffset>9</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>SWIER10</name>
- <description>Software Interrupt on line
- 10</description>
- <bitOffset>10</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>SWIER11</name>
- <description>Software Interrupt on line
- 11</description>
- <bitOffset>11</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>SWIER12</name>
- <description>Software Interrupt on line
- 12</description>
- <bitOffset>12</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>SWIER13</name>
- <description>Software Interrupt on line
- 13</description>
- <bitOffset>13</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>SWIER14</name>
- <description>Software Interrupt on line
- 14</description>
- <bitOffset>14</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>SWIER15</name>
- <description>Software Interrupt on line
- 15</description>
- <bitOffset>15</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>SWIER16</name>
- <description>Software Interrupt on line
- 16</description>
- <bitOffset>16</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>SWIER17</name>
- <description>Software Interrupt on line
- 17</description>
- <bitOffset>17</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>SWIER19</name>
- <description>Software Interrupt on line
- 19</description>
- <bitOffset>19</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>PR</name>
- <displayName>PR</displayName>
- <description>Pending register (EXTI_PR)</description>
- <addressOffset>0x14</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>PR0</name>
- <description>Pending bit 0</description>
- <bitOffset>0</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>PR1</name>
- <description>Pending bit 1</description>
- <bitOffset>1</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>PR2</name>
- <description>Pending bit 2</description>
- <bitOffset>2</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>PR3</name>
- <description>Pending bit 3</description>
- <bitOffset>3</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>PR4</name>
- <description>Pending bit 4</description>
- <bitOffset>4</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>PR5</name>
- <description>Pending bit 5</description>
- <bitOffset>5</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>PR6</name>
- <description>Pending bit 6</description>
- <bitOffset>6</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>PR7</name>
- <description>Pending bit 7</description>
- <bitOffset>7</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>PR8</name>
- <description>Pending bit 8</description>
- <bitOffset>8</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>PR9</name>
- <description>Pending bit 9</description>
- <bitOffset>9</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>PR10</name>
- <description>Pending bit 10</description>
- <bitOffset>10</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>PR11</name>
- <description>Pending bit 11</description>
- <bitOffset>11</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>PR12</name>
- <description>Pending bit 12</description>
- <bitOffset>12</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>PR13</name>
- <description>Pending bit 13</description>
- <bitOffset>13</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>PR14</name>
- <description>Pending bit 14</description>
- <bitOffset>14</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>PR15</name>
- <description>Pending bit 15</description>
- <bitOffset>15</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>PR16</name>
- <description>Pending bit 16</description>
- <bitOffset>16</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>PR17</name>
- <description>Pending bit 17</description>
- <bitOffset>17</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>PR19</name>
- <description>Pending bit 19</description>
- <bitOffset>19</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- </fields>
- </register>
- </registers>
- </peripheral>
- <peripheral>
- <name>NVIC</name>
- <description>Nested Vectored Interrupt
- Controller</description>
- <groupName>NVIC</groupName>
- <baseAddress>0xE000E100</baseAddress>
- <addressBlock>
- <offset>0x0</offset>
- <size>0x33D</size>
- <usage>registers</usage>
- </addressBlock>
- <interrupt>
- <name>TIM6_DAC</name>
- <description>TIM6 global interrupt and DAC underrun
- interrupt</description>
- <value>17</value>
- </interrupt>
- <registers>
- <register>
- <name>ISER</name>
- <displayName>ISER</displayName>
- <description>Interrupt Set Enable Register</description>
- <addressOffset>0x0</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>SETENA</name>
- <description>SETENA</description>
- <bitOffset>0</bitOffset>
- <bitWidth>32</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>ICER</name>
- <displayName>ICER</displayName>
- <description>Interrupt Clear Enable
- Register</description>
- <addressOffset>0x80</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>CLRENA</name>
- <description>CLRENA</description>
- <bitOffset>0</bitOffset>
- <bitWidth>32</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>ISPR</name>
- <displayName>ISPR</displayName>
- <description>Interrupt Set-Pending Register</description>
- <addressOffset>0x100</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>SETPEND</name>
- <description>SETPEND</description>
- <bitOffset>0</bitOffset>
- <bitWidth>32</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>ICPR</name>
- <displayName>ICPR</displayName>
- <description>Interrupt Clear-Pending
- Register</description>
- <addressOffset>0x180</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>CLRPEND</name>
- <description>CLRPEND</description>
- <bitOffset>0</bitOffset>
- <bitWidth>32</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>IPR0</name>
- <displayName>IPR0</displayName>
- <description>Interrupt Priority Register 0</description>
- <addressOffset>0x300</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>PRI_00</name>
- <description>PRI_00</description>
- <bitOffset>6</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>PRI_01</name>
- <description>PRI_01</description>
- <bitOffset>14</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>PRI_02</name>
- <description>PRI_02</description>
- <bitOffset>22</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>PRI_03</name>
- <description>PRI_03</description>
- <bitOffset>30</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>IPR1</name>
- <displayName>IPR1</displayName>
- <description>Interrupt Priority Register 1</description>
- <addressOffset>0x304</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>PRI_40</name>
- <description>PRI_40</description>
- <bitOffset>6</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>PRI_41</name>
- <description>PRI_41</description>
- <bitOffset>14</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>PRI_42</name>
- <description>PRI_42</description>
- <bitOffset>22</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>PRI_43</name>
- <description>PRI_43</description>
- <bitOffset>30</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>IPR2</name>
- <displayName>IPR2</displayName>
- <description>Interrupt Priority Register 2</description>
- <addressOffset>0x308</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>PRI_80</name>
- <description>PRI_80</description>
- <bitOffset>6</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>PRI_81</name>
- <description>PRI_81</description>
- <bitOffset>14</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>PRI_82</name>
- <description>PRI_82</description>
- <bitOffset>22</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>PRI_83</name>
- <description>PRI_83</description>
- <bitOffset>30</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>IPR3</name>
- <displayName>IPR3</displayName>
- <description>Interrupt Priority Register 3</description>
- <addressOffset>0x30C</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>PRI_120</name>
- <description>PRI_120</description>
- <bitOffset>6</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>PRI_121</name>
- <description>PRI_121</description>
- <bitOffset>14</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>PRI_122</name>
- <description>PRI_122</description>
- <bitOffset>22</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>PRI_123</name>
- <description>PRI_123</description>
- <bitOffset>30</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>IPR4</name>
- <displayName>IPR4</displayName>
- <description>Interrupt Priority Register 4</description>
- <addressOffset>0x310</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>PRI_160</name>
- <description>PRI_160</description>
- <bitOffset>6</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>PRI_161</name>
- <description>PRI_161</description>
- <bitOffset>14</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>PRI_162</name>
- <description>PRI_162</description>
- <bitOffset>22</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>PRI_163</name>
- <description>PRI_163</description>
- <bitOffset>30</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>IPR5</name>
- <displayName>IPR5</displayName>
- <description>Interrupt Priority Register 5</description>
- <addressOffset>0x314</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>PRI_200</name>
- <description>PRI_200</description>
- <bitOffset>6</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>PRI_201</name>
- <description>PRI_201</description>
- <bitOffset>14</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>PRI_202</name>
- <description>PRI_202</description>
- <bitOffset>22</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>PRI_203</name>
- <description>PRI_203</description>
- <bitOffset>30</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>IPR6</name>
- <displayName>IPR6</displayName>
- <description>Interrupt Priority Register 6</description>
- <addressOffset>0x318</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>PRI_240</name>
- <description>PRI_240</description>
- <bitOffset>6</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>PRI_241</name>
- <description>PRI_241</description>
- <bitOffset>14</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>PRI_242</name>
- <description>PRI_242</description>
- <bitOffset>22</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>PRI_243</name>
- <description>PRI_243</description>
- <bitOffset>30</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>IPR7</name>
- <displayName>IPR7</displayName>
- <description>Interrupt Priority Register 7</description>
- <addressOffset>0x31C</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>PRI_280</name>
- <description>PRI_280</description>
- <bitOffset>6</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>PRI_281</name>
- <description>PRI_281</description>
- <bitOffset>14</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>PRI_282</name>
- <description>PRI_282</description>
- <bitOffset>22</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>PRI_283</name>
- <description>PRI_283</description>
- <bitOffset>30</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- </fields>
- </register>
- </registers>
- </peripheral>
- <peripheral>
- <name>DMA</name>
- <description>DMA controller</description>
- <groupName>DMA</groupName>
- <baseAddress>0x40020000</baseAddress>
- <addressBlock>
- <offset>0x0</offset>
- <size>0x400</size>
- <usage>registers</usage>
- </addressBlock>
- <interrupt>
- <name>TIM7</name>
- <description>TIM7 global interrupt</description>
- <value>18</value>
- </interrupt>
- <registers>
- <register>
- <name>ISR</name>
- <displayName>ISR</displayName>
- <description>DMA interrupt status register
- (DMA_ISR)</description>
- <addressOffset>0x0</addressOffset>
- <size>0x20</size>
- <access>read-only</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>GIF1</name>
- <description>Channel 1 Global interrupt
- flag</description>
- <bitOffset>0</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>TCIF1</name>
- <description>Channel 1 Transfer Complete
- flag</description>
- <bitOffset>1</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>HTIF1</name>
- <description>Channel 1 Half Transfer Complete
- flag</description>
- <bitOffset>2</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>TEIF1</name>
- <description>Channel 1 Transfer Error
- flag</description>
- <bitOffset>3</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>GIF2</name>
- <description>Channel 2 Global interrupt
- flag</description>
- <bitOffset>4</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>TCIF2</name>
- <description>Channel 2 Transfer Complete
- flag</description>
- <bitOffset>5</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>HTIF2</name>
- <description>Channel 2 Half Transfer Complete
- flag</description>
- <bitOffset>6</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>TEIF2</name>
- <description>Channel 2 Transfer Error
- flag</description>
- <bitOffset>7</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>GIF3</name>
- <description>Channel 3 Global interrupt
- flag</description>
- <bitOffset>8</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>TCIF3</name>
- <description>Channel 3 Transfer Complete
- flag</description>
- <bitOffset>9</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>HTIF3</name>
- <description>Channel 3 Half Transfer Complete
- flag</description>
- <bitOffset>10</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>TEIF3</name>
- <description>Channel 3 Transfer Error
- flag</description>
- <bitOffset>11</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>GIF4</name>
- <description>Channel 4 Global interrupt
- flag</description>
- <bitOffset>12</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>TCIF4</name>
- <description>Channel 4 Transfer Complete
- flag</description>
- <bitOffset>13</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>HTIF4</name>
- <description>Channel 4 Half Transfer Complete
- flag</description>
- <bitOffset>14</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>TEIF4</name>
- <description>Channel 4 Transfer Error
- flag</description>
- <bitOffset>15</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>GIF5</name>
- <description>Channel 5 Global interrupt
- flag</description>
- <bitOffset>16</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>TCIF5</name>
- <description>Channel 5 Transfer Complete
- flag</description>
- <bitOffset>17</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>HTIF5</name>
- <description>Channel 5 Half Transfer Complete
- flag</description>
- <bitOffset>18</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>TEIF5</name>
- <description>Channel 5 Transfer Error
- flag</description>
- <bitOffset>19</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>GIF6</name>
- <description>Channel 6 Global interrupt
- flag</description>
- <bitOffset>20</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>TCIF6</name>
- <description>Channel 6 Transfer Complete
- flag</description>
- <bitOffset>21</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>HTIF6</name>
- <description>Channel 6 Half Transfer Complete
- flag</description>
- <bitOffset>22</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>TEIF6</name>
- <description>Channel 6 Transfer Error
- flag</description>
- <bitOffset>23</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>GIF7</name>
- <description>Channel 7 Global interrupt
- flag</description>
- <bitOffset>24</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>TCIF7</name>
- <description>Channel 7 Transfer Complete
- flag</description>
- <bitOffset>25</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>HTIF7</name>
- <description>Channel 7 Half Transfer Complete
- flag</description>
- <bitOffset>26</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>TEIF7</name>
- <description>Channel 7 Transfer Error
- flag</description>
- <bitOffset>27</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>IFCR</name>
- <displayName>IFCR</displayName>
- <description>DMA interrupt flag clear register
- (DMA_IFCR)</description>
- <addressOffset>0x4</addressOffset>
- <size>0x20</size>
- <access>write-only</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>CGIF1</name>
- <description>Channel 1 Global interrupt
- clear</description>
- <bitOffset>0</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CTCIF1</name>
- <description>Channel 1 Transfer Complete
- clear</description>
- <bitOffset>1</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CHTIF1</name>
- <description>Channel 1 Half Transfer
- clear</description>
- <bitOffset>2</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CTEIF1</name>
- <description>Channel 1 Transfer Error
- clear</description>
- <bitOffset>3</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CGIF2</name>
- <description>Channel 2 Global interrupt
- clear</description>
- <bitOffset>4</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CTCIF2</name>
- <description>Channel 2 Transfer Complete
- clear</description>
- <bitOffset>5</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CHTIF2</name>
- <description>Channel 2 Half Transfer
- clear</description>
- <bitOffset>6</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CTEIF2</name>
- <description>Channel 2 Transfer Error
- clear</description>
- <bitOffset>7</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CGIF3</name>
- <description>Channel 3 Global interrupt
- clear</description>
- <bitOffset>8</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CTCIF3</name>
- <description>Channel 3 Transfer Complete
- clear</description>
- <bitOffset>9</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CHTIF3</name>
- <description>Channel 3 Half Transfer
- clear</description>
- <bitOffset>10</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CTEIF3</name>
- <description>Channel 3 Transfer Error
- clear</description>
- <bitOffset>11</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CGIF4</name>
- <description>Channel 4 Global interrupt
- clear</description>
- <bitOffset>12</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CTCIF4</name>
- <description>Channel 4 Transfer Complete
- clear</description>
- <bitOffset>13</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CHTIF4</name>
- <description>Channel 4 Half Transfer
- clear</description>
- <bitOffset>14</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CTEIF4</name>
- <description>Channel 4 Transfer Error
- clear</description>
- <bitOffset>15</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CGIF5</name>
- <description>Channel 5 Global interrupt
- clear</description>
- <bitOffset>16</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CTCIF5</name>
- <description>Channel 5 Transfer Complete
- clear</description>
- <bitOffset>17</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CHTIF5</name>
- <description>Channel 5 Half Transfer
- clear</description>
- <bitOffset>18</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CTEIF5</name>
- <description>Channel 5 Transfer Error
- clear</description>
- <bitOffset>19</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CGIF6</name>
- <description>Channel 6 Global interrupt
- clear</description>
- <bitOffset>20</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CTCIF6</name>
- <description>Channel 6 Transfer Complete
- clear</description>
- <bitOffset>21</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CHTIF6</name>
- <description>Channel 6 Half Transfer
- clear</description>
- <bitOffset>22</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CTEIF6</name>
- <description>Channel 6 Transfer Error
- clear</description>
- <bitOffset>23</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CGIF7</name>
- <description>Channel 7 Global interrupt
- clear</description>
- <bitOffset>24</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CTCIF7</name>
- <description>Channel 7 Transfer Complete
- clear</description>
- <bitOffset>25</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CHTIF7</name>
- <description>Channel 7 Half Transfer
- clear</description>
- <bitOffset>26</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CTEIF7</name>
- <description>Channel 7 Transfer Error
- clear</description>
- <bitOffset>27</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>CCR1</name>
- <displayName>CCR1</displayName>
- <description>DMA channel configuration register
- (DMA_CCR)</description>
- <addressOffset>0x8</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>EN</name>
- <description>Channel enable</description>
- <bitOffset>0</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>TCIE</name>
- <description>Transfer complete interrupt
- enable</description>
- <bitOffset>1</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>HTIE</name>
- <description>Half Transfer interrupt
- enable</description>
- <bitOffset>2</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>TEIE</name>
- <description>Transfer error interrupt
- enable</description>
- <bitOffset>3</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>DIR</name>
- <description>Data transfer direction</description>
- <bitOffset>4</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CIRC</name>
- <description>Circular mode</description>
- <bitOffset>5</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>PINC</name>
- <description>Peripheral increment mode</description>
- <bitOffset>6</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>MINC</name>
- <description>Memory increment mode</description>
- <bitOffset>7</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>PSIZE</name>
- <description>Peripheral size</description>
- <bitOffset>8</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>MSIZE</name>
- <description>Memory size</description>
- <bitOffset>10</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>PL</name>
- <description>Channel Priority level</description>
- <bitOffset>12</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>MEM2MEM</name>
- <description>Memory to memory mode</description>
- <bitOffset>14</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>CNDTR1</name>
- <displayName>CNDTR1</displayName>
- <description>DMA channel 1 number of data
- register</description>
- <addressOffset>0xC</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>NDT</name>
- <description>Number of data to transfer</description>
- <bitOffset>0</bitOffset>
- <bitWidth>16</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>CPAR1</name>
- <displayName>CPAR1</displayName>
- <description>DMA channel 1 peripheral address
- register</description>
- <addressOffset>0x10</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>PA</name>
- <description>Peripheral address</description>
- <bitOffset>0</bitOffset>
- <bitWidth>32</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>CMAR1</name>
- <displayName>CMAR1</displayName>
- <description>DMA channel 1 memory address
- register</description>
- <addressOffset>0x14</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>MA</name>
- <description>Memory address</description>
- <bitOffset>0</bitOffset>
- <bitWidth>32</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>CCR2</name>
- <displayName>CCR2</displayName>
- <description>DMA channel configuration register
- (DMA_CCR)</description>
- <addressOffset>0x1C</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>EN</name>
- <description>Channel enable</description>
- <bitOffset>0</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>TCIE</name>
- <description>Transfer complete interrupt
- enable</description>
- <bitOffset>1</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>HTIE</name>
- <description>Half Transfer interrupt
- enable</description>
- <bitOffset>2</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>TEIE</name>
- <description>Transfer error interrupt
- enable</description>
- <bitOffset>3</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>DIR</name>
- <description>Data transfer direction</description>
- <bitOffset>4</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CIRC</name>
- <description>Circular mode</description>
- <bitOffset>5</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>PINC</name>
- <description>Peripheral increment mode</description>
- <bitOffset>6</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>MINC</name>
- <description>Memory increment mode</description>
- <bitOffset>7</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>PSIZE</name>
- <description>Peripheral size</description>
- <bitOffset>8</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>MSIZE</name>
- <description>Memory size</description>
- <bitOffset>10</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>PL</name>
- <description>Channel Priority level</description>
- <bitOffset>12</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>MEM2MEM</name>
- <description>Memory to memory mode</description>
- <bitOffset>14</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>CNDTR2</name>
- <displayName>CNDTR2</displayName>
- <description>DMA channel 2 number of data
- register</description>
- <addressOffset>0x20</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>NDT</name>
- <description>Number of data to transfer</description>
- <bitOffset>0</bitOffset>
- <bitWidth>16</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>CPAR2</name>
- <displayName>CPAR2</displayName>
- <description>DMA channel 2 peripheral address
- register</description>
- <addressOffset>0x24</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>PA</name>
- <description>Peripheral address</description>
- <bitOffset>0</bitOffset>
- <bitWidth>32</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>CMAR2</name>
- <displayName>CMAR2</displayName>
- <description>DMA channel 2 memory address
- register</description>
- <addressOffset>0x28</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>MA</name>
- <description>Memory address</description>
- <bitOffset>0</bitOffset>
- <bitWidth>32</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>CCR3</name>
- <displayName>CCR3</displayName>
- <description>DMA channel configuration register
- (DMA_CCR)</description>
- <addressOffset>0x30</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>EN</name>
- <description>Channel enable</description>
- <bitOffset>0</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>TCIE</name>
- <description>Transfer complete interrupt
- enable</description>
- <bitOffset>1</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>HTIE</name>
- <description>Half Transfer interrupt
- enable</description>
- <bitOffset>2</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>TEIE</name>
- <description>Transfer error interrupt
- enable</description>
- <bitOffset>3</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>DIR</name>
- <description>Data transfer direction</description>
- <bitOffset>4</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CIRC</name>
- <description>Circular mode</description>
- <bitOffset>5</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>PINC</name>
- <description>Peripheral increment mode</description>
- <bitOffset>6</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>MINC</name>
- <description>Memory increment mode</description>
- <bitOffset>7</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>PSIZE</name>
- <description>Peripheral size</description>
- <bitOffset>8</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>MSIZE</name>
- <description>Memory size</description>
- <bitOffset>10</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>PL</name>
- <description>Channel Priority level</description>
- <bitOffset>12</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>MEM2MEM</name>
- <description>Memory to memory mode</description>
- <bitOffset>14</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>CNDTR3</name>
- <displayName>CNDTR3</displayName>
- <description>DMA channel 3 number of data
- register</description>
- <addressOffset>0x34</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>NDT</name>
- <description>Number of data to transfer</description>
- <bitOffset>0</bitOffset>
- <bitWidth>16</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>CPAR3</name>
- <displayName>CPAR3</displayName>
- <description>DMA channel 3 peripheral address
- register</description>
- <addressOffset>0x38</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>PA</name>
- <description>Peripheral address</description>
- <bitOffset>0</bitOffset>
- <bitWidth>32</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>CMAR3</name>
- <displayName>CMAR3</displayName>
- <description>DMA channel 3 memory address
- register</description>
- <addressOffset>0x3C</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>MA</name>
- <description>Memory address</description>
- <bitOffset>0</bitOffset>
- <bitWidth>32</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>CCR4</name>
- <displayName>CCR4</displayName>
- <description>DMA channel configuration register
- (DMA_CCR)</description>
- <addressOffset>0x44</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>EN</name>
- <description>Channel enable</description>
- <bitOffset>0</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>TCIE</name>
- <description>Transfer complete interrupt
- enable</description>
- <bitOffset>1</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>HTIE</name>
- <description>Half Transfer interrupt
- enable</description>
- <bitOffset>2</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>TEIE</name>
- <description>Transfer error interrupt
- enable</description>
- <bitOffset>3</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>DIR</name>
- <description>Data transfer direction</description>
- <bitOffset>4</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CIRC</name>
- <description>Circular mode</description>
- <bitOffset>5</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>PINC</name>
- <description>Peripheral increment mode</description>
- <bitOffset>6</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>MINC</name>
- <description>Memory increment mode</description>
- <bitOffset>7</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>PSIZE</name>
- <description>Peripheral size</description>
- <bitOffset>8</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>MSIZE</name>
- <description>Memory size</description>
- <bitOffset>10</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>PL</name>
- <description>Channel Priority level</description>
- <bitOffset>12</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>MEM2MEM</name>
- <description>Memory to memory mode</description>
- <bitOffset>14</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>CNDTR4</name>
- <displayName>CNDTR4</displayName>
- <description>DMA channel 4 number of data
- register</description>
- <addressOffset>0x48</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>NDT</name>
- <description>Number of data to transfer</description>
- <bitOffset>0</bitOffset>
- <bitWidth>16</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>CPAR4</name>
- <displayName>CPAR4</displayName>
- <description>DMA channel 4 peripheral address
- register</description>
- <addressOffset>0x4C</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>PA</name>
- <description>Peripheral address</description>
- <bitOffset>0</bitOffset>
- <bitWidth>32</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>CMAR4</name>
- <displayName>CMAR4</displayName>
- <description>DMA channel 4 memory address
- register</description>
- <addressOffset>0x50</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>MA</name>
- <description>Memory address</description>
- <bitOffset>0</bitOffset>
- <bitWidth>32</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>CCR5</name>
- <displayName>CCR5</displayName>
- <description>DMA channel configuration register
- (DMA_CCR)</description>
- <addressOffset>0x58</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>EN</name>
- <description>Channel enable</description>
- <bitOffset>0</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>TCIE</name>
- <description>Transfer complete interrupt
- enable</description>
- <bitOffset>1</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>HTIE</name>
- <description>Half Transfer interrupt
- enable</description>
- <bitOffset>2</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>TEIE</name>
- <description>Transfer error interrupt
- enable</description>
- <bitOffset>3</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>DIR</name>
- <description>Data transfer direction</description>
- <bitOffset>4</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CIRC</name>
- <description>Circular mode</description>
- <bitOffset>5</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>PINC</name>
- <description>Peripheral increment mode</description>
- <bitOffset>6</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>MINC</name>
- <description>Memory increment mode</description>
- <bitOffset>7</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>PSIZE</name>
- <description>Peripheral size</description>
- <bitOffset>8</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>MSIZE</name>
- <description>Memory size</description>
- <bitOffset>10</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>PL</name>
- <description>Channel Priority level</description>
- <bitOffset>12</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>MEM2MEM</name>
- <description>Memory to memory mode</description>
- <bitOffset>14</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>CNDTR5</name>
- <displayName>CNDTR5</displayName>
- <description>DMA channel 5 number of data
- register</description>
- <addressOffset>0x5C</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>NDT</name>
- <description>Number of data to transfer</description>
- <bitOffset>0</bitOffset>
- <bitWidth>16</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>CPAR5</name>
- <displayName>CPAR5</displayName>
- <description>DMA channel 5 peripheral address
- register</description>
- <addressOffset>0x60</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>PA</name>
- <description>Peripheral address</description>
- <bitOffset>0</bitOffset>
- <bitWidth>32</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>CMAR5</name>
- <displayName>CMAR5</displayName>
- <description>DMA channel 5 memory address
- register</description>
- <addressOffset>0x64</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>MA</name>
- <description>Memory address</description>
- <bitOffset>0</bitOffset>
- <bitWidth>32</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>CCR6</name>
- <displayName>CCR6</displayName>
- <description>DMA channel configuration register
- (DMA_CCR)</description>
- <addressOffset>0x6C</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>EN</name>
- <description>Channel enable</description>
- <bitOffset>0</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>TCIE</name>
- <description>Transfer complete interrupt
- enable</description>
- <bitOffset>1</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>HTIE</name>
- <description>Half Transfer interrupt
- enable</description>
- <bitOffset>2</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>TEIE</name>
- <description>Transfer error interrupt
- enable</description>
- <bitOffset>3</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>DIR</name>
- <description>Data transfer direction</description>
- <bitOffset>4</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CIRC</name>
- <description>Circular mode</description>
- <bitOffset>5</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>PINC</name>
- <description>Peripheral increment mode</description>
- <bitOffset>6</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>MINC</name>
- <description>Memory increment mode</description>
- <bitOffset>7</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>PSIZE</name>
- <description>Peripheral size</description>
- <bitOffset>8</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>MSIZE</name>
- <description>Memory size</description>
- <bitOffset>10</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>PL</name>
- <description>Channel Priority level</description>
- <bitOffset>12</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>MEM2MEM</name>
- <description>Memory to memory mode</description>
- <bitOffset>14</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>CNDTR6</name>
- <displayName>CNDTR6</displayName>
- <description>DMA channel 6 number of data
- register</description>
- <addressOffset>0x70</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>NDT</name>
- <description>Number of data to transfer</description>
- <bitOffset>0</bitOffset>
- <bitWidth>16</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>CPAR6</name>
- <displayName>CPAR6</displayName>
- <description>DMA channel 6 peripheral address
- register</description>
- <addressOffset>0x74</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>PA</name>
- <description>Peripheral address</description>
- <bitOffset>0</bitOffset>
- <bitWidth>32</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>CMAR6</name>
- <displayName>CMAR6</displayName>
- <description>DMA channel 6 memory address
- register</description>
- <addressOffset>0x78</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>MA</name>
- <description>Memory address</description>
- <bitOffset>0</bitOffset>
- <bitWidth>32</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>CCR7</name>
- <displayName>CCR7</displayName>
- <description>DMA channel configuration register
- (DMA_CCR)</description>
- <addressOffset>0x80</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>EN</name>
- <description>Channel enable</description>
- <bitOffset>0</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>TCIE</name>
- <description>Transfer complete interrupt
- enable</description>
- <bitOffset>1</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>HTIE</name>
- <description>Half Transfer interrupt
- enable</description>
- <bitOffset>2</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>TEIE</name>
- <description>Transfer error interrupt
- enable</description>
- <bitOffset>3</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>DIR</name>
- <description>Data transfer direction</description>
- <bitOffset>4</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CIRC</name>
- <description>Circular mode</description>
- <bitOffset>5</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>PINC</name>
- <description>Peripheral increment mode</description>
- <bitOffset>6</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>MINC</name>
- <description>Memory increment mode</description>
- <bitOffset>7</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>PSIZE</name>
- <description>Peripheral size</description>
- <bitOffset>8</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>MSIZE</name>
- <description>Memory size</description>
- <bitOffset>10</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>PL</name>
- <description>Channel Priority level</description>
- <bitOffset>12</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>MEM2MEM</name>
- <description>Memory to memory mode</description>
- <bitOffset>14</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>CNDTR7</name>
- <displayName>CNDTR7</displayName>
- <description>DMA channel 7 number of data
- register</description>
- <addressOffset>0x84</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>NDT</name>
- <description>Number of data to transfer</description>
- <bitOffset>0</bitOffset>
- <bitWidth>16</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>CPAR7</name>
- <displayName>CPAR7</displayName>
- <description>DMA channel 7 peripheral address
- register</description>
- <addressOffset>0x88</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>PA</name>
- <description>Peripheral address</description>
- <bitOffset>0</bitOffset>
- <bitWidth>32</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>CMAR7</name>
- <displayName>CMAR7</displayName>
- <description>DMA channel 7 memory address
- register</description>
- <addressOffset>0x8C</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>MA</name>
- <description>Memory address</description>
- <bitOffset>0</bitOffset>
- <bitWidth>32</bitWidth>
- </field>
- </fields>
- </register>
- </registers>
- </peripheral>
- <peripheral>
- <name>RCC</name>
- <description>Reset and clock control</description>
- <groupName>RCC</groupName>
- <baseAddress>0x40021000</baseAddress>
- <addressBlock>
- <offset>0x0</offset>
- <size>0x400</size>
- <usage>registers</usage>
- </addressBlock>
- <interrupt>
- <name>PVD</name>
- <description>PVD and VDDIO2 supply comparator
- interrupt</description>
- <value>1</value>
- </interrupt>
- <interrupt>
- <name>EXTI0_1</name>
- <description>EXTI Line[1:0] interrupts</description>
- <value>5</value>
- </interrupt>
- <interrupt>
- <name>EXTI2_3</name>
- <description>EXTI Line[3:2] interrupts</description>
- <value>6</value>
- </interrupt>
- <interrupt>
- <name>EXTI4_15</name>
- <description>EXTI Line15 and EXTI4 interrupts</description>
- <value>7</value>
- </interrupt>
- <registers>
- <register>
- <name>CR</name>
- <displayName>CR</displayName>
- <description>Clock control register</description>
- <addressOffset>0x0</addressOffset>
- <size>0x20</size>
- <resetValue>0x00000083</resetValue>
- <fields>
- <field>
- <name>HSION</name>
- <description>Internal High Speed clock
- enable</description>
- <bitOffset>0</bitOffset>
- <bitWidth>1</bitWidth>
- <access>read-write</access>
- </field>
- <field>
- <name>HSIRDY</name>
- <description>Internal High Speed clock ready
- flag</description>
- <bitOffset>1</bitOffset>
- <bitWidth>1</bitWidth>
- <access>read-only</access>
- </field>
- <field>
- <name>HSITRIM</name>
- <description>Internal High Speed clock
- trimming</description>
- <bitOffset>3</bitOffset>
- <bitWidth>5</bitWidth>
- <access>read-write</access>
- </field>
- <field>
- <name>HSICAL</name>
- <description>Internal High Speed clock
- Calibration</description>
- <bitOffset>8</bitOffset>
- <bitWidth>8</bitWidth>
- <access>read-only</access>
- </field>
- <field>
- <name>HSEON</name>
- <description>External High Speed clock
- enable</description>
- <bitOffset>16</bitOffset>
- <bitWidth>1</bitWidth>
- <access>read-write</access>
- </field>
- <field>
- <name>HSERDY</name>
- <description>External High Speed clock ready
- flag</description>
- <bitOffset>17</bitOffset>
- <bitWidth>1</bitWidth>
- <access>read-only</access>
- </field>
- <field>
- <name>HSEBYP</name>
- <description>External High Speed clock
- Bypass</description>
- <bitOffset>18</bitOffset>
- <bitWidth>1</bitWidth>
- <access>read-write</access>
- </field>
- <field>
- <name>CSSON</name>
- <description>Clock Security System
- enable</description>
- <bitOffset>19</bitOffset>
- <bitWidth>1</bitWidth>
- <access>read-write</access>
- </field>
- <field>
- <name>PLLON</name>
- <description>PLL enable</description>
- <bitOffset>24</bitOffset>
- <bitWidth>1</bitWidth>
- <access>read-write</access>
- </field>
- <field>
- <name>PLLRDY</name>
- <description>PLL clock ready flag</description>
- <bitOffset>25</bitOffset>
- <bitWidth>1</bitWidth>
- <access>read-only</access>
- </field>
- </fields>
- </register>
- <register>
- <name>CFGR</name>
- <displayName>CFGR</displayName>
- <description>Clock configuration register
- (RCC_CFGR)</description>
- <addressOffset>0x4</addressOffset>
- <size>0x20</size>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>SW</name>
- <description>System clock Switch</description>
- <bitOffset>0</bitOffset>
- <bitWidth>2</bitWidth>
- <access>read-write</access>
- </field>
- <field>
- <name>SWS</name>
- <description>System Clock Switch Status</description>
- <bitOffset>2</bitOffset>
- <bitWidth>2</bitWidth>
- <access>read-only</access>
- </field>
- <field>
- <name>HPRE</name>
- <description>AHB prescaler</description>
- <bitOffset>4</bitOffset>
- <bitWidth>4</bitWidth>
- <access>read-write</access>
- </field>
- <field>
- <name>PPRE</name>
- <description>APB Low speed prescaler
- (APB1)</description>
- <bitOffset>8</bitOffset>
- <bitWidth>3</bitWidth>
- <access>read-write</access>
- </field>
- <field>
- <name>ADCPRE</name>
- <description>ADC prescaler</description>
- <bitOffset>14</bitOffset>
- <bitWidth>1</bitWidth>
- <access>read-write</access>
- </field>
- <field>
- <name>PLLSRC</name>
- <description>PLL input clock source</description>
- <bitOffset>15</bitOffset>
- <bitWidth>2</bitWidth>
- <access>read-write</access>
- </field>
- <field>
- <name>PLLXTPRE</name>
- <description>HSE divider for PLL entry</description>
- <bitOffset>17</bitOffset>
- <bitWidth>1</bitWidth>
- <access>read-write</access>
- </field>
- <field>
- <name>PLLMUL</name>
- <description>PLL Multiplication Factor</description>
- <bitOffset>18</bitOffset>
- <bitWidth>4</bitWidth>
- <access>read-write</access>
- </field>
- <field>
- <name>MCO</name>
- <description>Microcontroller clock
- output</description>
- <bitOffset>24</bitOffset>
- <bitWidth>3</bitWidth>
- <access>read-write</access>
- </field>
- <field>
- <name>MCOPRE</name>
- <description>Microcontroller Clock Output
- Prescaler</description>
- <bitOffset>28</bitOffset>
- <bitWidth>3</bitWidth>
- <access>read-write</access>
- </field>
- <field>
- <name>PLLNODIV</name>
- <description>PLL clock not divided for
- MCO</description>
- <bitOffset>31</bitOffset>
- <bitWidth>1</bitWidth>
- <access>read-write</access>
- </field>
- </fields>
- </register>
- <register>
- <name>CIR</name>
- <displayName>CIR</displayName>
- <description>Clock interrupt register
- (RCC_CIR)</description>
- <addressOffset>0x8</addressOffset>
- <size>0x20</size>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>LSIRDYF</name>
- <description>LSI Ready Interrupt flag</description>
- <bitOffset>0</bitOffset>
- <bitWidth>1</bitWidth>
- <access>read-only</access>
- </field>
- <field>
- <name>LSERDYF</name>
- <description>LSE Ready Interrupt flag</description>
- <bitOffset>1</bitOffset>
- <bitWidth>1</bitWidth>
- <access>read-only</access>
- </field>
- <field>
- <name>HSIRDYF</name>
- <description>HSI Ready Interrupt flag</description>
- <bitOffset>2</bitOffset>
- <bitWidth>1</bitWidth>
- <access>read-only</access>
- </field>
- <field>
- <name>HSERDYF</name>
- <description>HSE Ready Interrupt flag</description>
- <bitOffset>3</bitOffset>
- <bitWidth>1</bitWidth>
- <access>read-only</access>
- </field>
- <field>
- <name>PLLRDYF</name>
- <description>PLL Ready Interrupt flag</description>
- <bitOffset>4</bitOffset>
- <bitWidth>1</bitWidth>
- <access>read-only</access>
- </field>
- <field>
- <name>HSI14RDYF</name>
- <description>HSI14 ready interrupt flag</description>
- <bitOffset>5</bitOffset>
- <bitWidth>1</bitWidth>
- <access>read-only</access>
- </field>
- <field>
- <name>HSI48RDYF</name>
- <description>HSI48 ready interrupt flag</description>
- <bitOffset>6</bitOffset>
- <bitWidth>1</bitWidth>
- <access>read-only</access>
- </field>
- <field>
- <name>CSSF</name>
- <description>Clock Security System Interrupt
- flag</description>
- <bitOffset>7</bitOffset>
- <bitWidth>1</bitWidth>
- <access>read-only</access>
- </field>
- <field>
- <name>LSIRDYIE</name>
- <description>LSI Ready Interrupt Enable</description>
- <bitOffset>8</bitOffset>
- <bitWidth>1</bitWidth>
- <access>read-write</access>
- </field>
- <field>
- <name>LSERDYIE</name>
- <description>LSE Ready Interrupt Enable</description>
- <bitOffset>9</bitOffset>
- <bitWidth>1</bitWidth>
- <access>read-write</access>
- </field>
- <field>
- <name>HSIRDYIE</name>
- <description>HSI Ready Interrupt Enable</description>
- <bitOffset>10</bitOffset>
- <bitWidth>1</bitWidth>
- <access>read-write</access>
- </field>
- <field>
- <name>HSERDYIE</name>
- <description>HSE Ready Interrupt Enable</description>
- <bitOffset>11</bitOffset>
- <bitWidth>1</bitWidth>
- <access>read-write</access>
- </field>
- <field>
- <name>PLLRDYIE</name>
- <description>PLL Ready Interrupt Enable</description>
- <bitOffset>12</bitOffset>
- <bitWidth>1</bitWidth>
- <access>read-write</access>
- </field>
- <field>
- <name>HSI14RDYE</name>
- <description>HSI14 ready interrupt
- enable</description>
- <bitOffset>13</bitOffset>
- <bitWidth>1</bitWidth>
- <access>read-write</access>
- </field>
- <field>
- <name>HSI48RDYIE</name>
- <description>HSI48 ready interrupt
- enable</description>
- <bitOffset>14</bitOffset>
- <bitWidth>1</bitWidth>
- <access>read-write</access>
- </field>
- <field>
- <name>LSIRDYC</name>
- <description>LSI Ready Interrupt Clear</description>
- <bitOffset>16</bitOffset>
- <bitWidth>1</bitWidth>
- <access>write-only</access>
- </field>
- <field>
- <name>LSERDYC</name>
- <description>LSE Ready Interrupt Clear</description>
- <bitOffset>17</bitOffset>
- <bitWidth>1</bitWidth>
- <access>write-only</access>
- </field>
- <field>
- <name>HSIRDYC</name>
- <description>HSI Ready Interrupt Clear</description>
- <bitOffset>18</bitOffset>
- <bitWidth>1</bitWidth>
- <access>write-only</access>
- </field>
- <field>
- <name>HSERDYC</name>
- <description>HSE Ready Interrupt Clear</description>
- <bitOffset>19</bitOffset>
- <bitWidth>1</bitWidth>
- <access>write-only</access>
- </field>
- <field>
- <name>PLLRDYC</name>
- <description>PLL Ready Interrupt Clear</description>
- <bitOffset>20</bitOffset>
- <bitWidth>1</bitWidth>
- <access>write-only</access>
- </field>
- <field>
- <name>HSI14RDYC</name>
- <description>HSI 14 MHz Ready Interrupt
- Clear</description>
- <bitOffset>21</bitOffset>
- <bitWidth>1</bitWidth>
- <access>write-only</access>
- </field>
- <field>
- <name>HSI48RDYC</name>
- <description>HSI48 Ready Interrupt
- Clear</description>
- <bitOffset>22</bitOffset>
- <bitWidth>1</bitWidth>
- <access>write-only</access>
- </field>
- <field>
- <name>CSSC</name>
- <description>Clock security system interrupt
- clear</description>
- <bitOffset>23</bitOffset>
- <bitWidth>1</bitWidth>
- <access>write-only</access>
- </field>
- </fields>
- </register>
- <register>
- <name>APB2RSTR</name>
- <displayName>APB2RSTR</displayName>
- <description>APB2 peripheral reset register
- (RCC_APB2RSTR)</description>
- <addressOffset>0xC</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>SYSCFGRST</name>
- <description>SYSCFG and COMP reset</description>
- <bitOffset>0</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>ADCRST</name>
- <description>ADC interface reset</description>
- <bitOffset>9</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>TIM1RST</name>
- <description>TIM1 timer reset</description>
- <bitOffset>11</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>SPI1RST</name>
- <description>SPI 1 reset</description>
- <bitOffset>12</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>USART1RST</name>
- <description>USART1 reset</description>
- <bitOffset>14</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>TIM15RST</name>
- <description>TIM15 timer reset</description>
- <bitOffset>16</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>TIM16RST</name>
- <description>TIM16 timer reset</description>
- <bitOffset>17</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>TIM17RST</name>
- <description>TIM17 timer reset</description>
- <bitOffset>18</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>DBGMCURST</name>
- <description>Debug MCU reset</description>
- <bitOffset>22</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>APB1RSTR</name>
- <displayName>APB1RSTR</displayName>
- <description>APB1 peripheral reset register
- (RCC_APB1RSTR)</description>
- <addressOffset>0x10</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>TIM3RST</name>
- <description>Timer 3 reset</description>
- <bitOffset>1</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>TIM6RST</name>
- <description>Timer 6 reset</description>
- <bitOffset>4</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>TIM14RST</name>
- <description>Timer 14 reset</description>
- <bitOffset>8</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>WWDGRST</name>
- <description>Window watchdog reset</description>
- <bitOffset>11</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>SPI2RST</name>
- <description>SPI2 reset</description>
- <bitOffset>14</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>USART2RST</name>
- <description>USART 2 reset</description>
- <bitOffset>17</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>I2C1RST</name>
- <description>I2C1 reset</description>
- <bitOffset>21</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>I2C2RST</name>
- <description>I2C2 reset</description>
- <bitOffset>22</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>PWRRST</name>
- <description>Power interface reset</description>
- <bitOffset>28</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>AHBENR</name>
- <displayName>AHBENR</displayName>
- <description>AHB Peripheral Clock enable register
- (RCC_AHBENR)</description>
- <addressOffset>0x14</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000014</resetValue>
- <fields>
- <field>
- <name>DMAEN</name>
- <description>DMA1 clock enable</description>
- <bitOffset>0</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>SRAMEN</name>
- <description>SRAM interface clock
- enable</description>
- <bitOffset>2</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>FLITFEN</name>
- <description>FLITF clock enable</description>
- <bitOffset>4</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CRCEN</name>
- <description>CRC clock enable</description>
- <bitOffset>6</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>IOPAEN</name>
- <description>I/O port A clock enable</description>
- <bitOffset>17</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>IOPBEN</name>
- <description>I/O port B clock enable</description>
- <bitOffset>18</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>IOPCEN</name>
- <description>I/O port C clock enable</description>
- <bitOffset>19</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>IOPDEN</name>
- <description>I/O port D clock enable</description>
- <bitOffset>20</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>IOPFEN</name>
- <description>I/O port F clock enable</description>
- <bitOffset>22</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>APB2ENR</name>
- <displayName>APB2ENR</displayName>
- <description>APB2 peripheral clock enable register
- (RCC_APB2ENR)</description>
- <addressOffset>0x18</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>SYSCFGEN</name>
- <description>SYSCFG clock enable</description>
- <bitOffset>0</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>ADCEN</name>
- <description>ADC 1 interface clock
- enable</description>
- <bitOffset>9</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>TIM1EN</name>
- <description>TIM1 Timer clock enable</description>
- <bitOffset>11</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>SPI1EN</name>
- <description>SPI 1 clock enable</description>
- <bitOffset>12</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>USART1EN</name>
- <description>USART1 clock enable</description>
- <bitOffset>14</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>TIM15EN</name>
- <description>TIM15 timer clock enable</description>
- <bitOffset>16</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>TIM16EN</name>
- <description>TIM16 timer clock enable</description>
- <bitOffset>17</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>TIM17EN</name>
- <description>TIM17 timer clock enable</description>
- <bitOffset>18</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>DBGMCUEN</name>
- <description>MCU debug module clock
- enable</description>
- <bitOffset>22</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>APB1ENR</name>
- <displayName>APB1ENR</displayName>
- <description>APB1 peripheral clock enable register
- (RCC_APB1ENR)</description>
- <addressOffset>0x1C</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>TIM3EN</name>
- <description>Timer 3 clock enable</description>
- <bitOffset>1</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>TIM6EN</name>
- <description>Timer 6 clock enable</description>
- <bitOffset>4</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>TIM14EN</name>
- <description>Timer 14 clock enable</description>
- <bitOffset>8</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>WWDGEN</name>
- <description>Window watchdog clock
- enable</description>
- <bitOffset>11</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>SPI2EN</name>
- <description>SPI 2 clock enable</description>
- <bitOffset>14</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>USART2EN</name>
- <description>USART 2 clock enable</description>
- <bitOffset>17</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>I2C1EN</name>
- <description>I2C 1 clock enable</description>
- <bitOffset>21</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>I2C2EN</name>
- <description>I2C 2 clock enable</description>
- <bitOffset>22</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>PWREN</name>
- <description>Power interface clock
- enable</description>
- <bitOffset>28</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>BDCR</name>
- <displayName>BDCR</displayName>
- <description>Backup domain control register
- (RCC_BDCR)</description>
- <addressOffset>0x20</addressOffset>
- <size>0x20</size>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>LSEON</name>
- <description>External Low Speed oscillator
- enable</description>
- <bitOffset>0</bitOffset>
- <bitWidth>1</bitWidth>
- <access>read-write</access>
- </field>
- <field>
- <name>LSERDY</name>
- <description>External Low Speed oscillator
- ready</description>
- <bitOffset>1</bitOffset>
- <bitWidth>1</bitWidth>
- <access>read-only</access>
- </field>
- <field>
- <name>LSEBYP</name>
- <description>External Low Speed oscillator
- bypass</description>
- <bitOffset>2</bitOffset>
- <bitWidth>1</bitWidth>
- <access>read-write</access>
- </field>
- <field>
- <name>LSEDRV</name>
- <description>LSE oscillator drive
- capability</description>
- <bitOffset>3</bitOffset>
- <bitWidth>2</bitWidth>
- <access>read-write</access>
- </field>
- <field>
- <name>RTCSEL</name>
- <description>RTC clock source selection</description>
- <bitOffset>8</bitOffset>
- <bitWidth>2</bitWidth>
- <access>read-write</access>
- </field>
- <field>
- <name>RTCEN</name>
- <description>RTC clock enable</description>
- <bitOffset>15</bitOffset>
- <bitWidth>1</bitWidth>
- <access>read-write</access>
- </field>
- <field>
- <name>BDRST</name>
- <description>Backup domain software
- reset</description>
- <bitOffset>16</bitOffset>
- <bitWidth>1</bitWidth>
- <access>read-write</access>
- </field>
- </fields>
- </register>
- <register>
- <name>CSR</name>
- <displayName>CSR</displayName>
- <description>Control/status register
- (RCC_CSR)</description>
- <addressOffset>0x24</addressOffset>
- <size>0x20</size>
- <resetValue>0x0C000000</resetValue>
- <fields>
- <field>
- <name>LSION</name>
- <description>Internal low speed oscillator
- enable</description>
- <bitOffset>0</bitOffset>
- <bitWidth>1</bitWidth>
- <access>read-write</access>
- </field>
- <field>
- <name>LSIRDY</name>
- <description>Internal low speed oscillator
- ready</description>
- <bitOffset>1</bitOffset>
- <bitWidth>1</bitWidth>
- <access>read-only</access>
- </field>
- <field>
- <name>RMVF</name>
- <description>Remove reset flag</description>
- <bitOffset>24</bitOffset>
- <bitWidth>1</bitWidth>
- <access>read-write</access>
- </field>
- <field>
- <name>OBLRSTF</name>
- <description>Option byte loader reset
- flag</description>
- <bitOffset>25</bitOffset>
- <bitWidth>1</bitWidth>
- <access>read-write</access>
- </field>
- <field>
- <name>PINRSTF</name>
- <description>PIN reset flag</description>
- <bitOffset>26</bitOffset>
- <bitWidth>1</bitWidth>
- <access>read-write</access>
- </field>
- <field>
- <name>PORRSTF</name>
- <description>POR/PDR reset flag</description>
- <bitOffset>27</bitOffset>
- <bitWidth>1</bitWidth>
- <access>read-write</access>
- </field>
- <field>
- <name>SFTRSTF</name>
- <description>Software reset flag</description>
- <bitOffset>28</bitOffset>
- <bitWidth>1</bitWidth>
- <access>read-write</access>
- </field>
- <field>
- <name>IWDGRSTF</name>
- <description>Independent watchdog reset
- flag</description>
- <bitOffset>29</bitOffset>
- <bitWidth>1</bitWidth>
- <access>read-write</access>
- </field>
- <field>
- <name>WWDGRSTF</name>
- <description>Window watchdog reset flag</description>
- <bitOffset>30</bitOffset>
- <bitWidth>1</bitWidth>
- <access>read-write</access>
- </field>
- <field>
- <name>LPWRRSTF</name>
- <description>Low-power reset flag</description>
- <bitOffset>31</bitOffset>
- <bitWidth>1</bitWidth>
- <access>read-write</access>
- </field>
- </fields>
- </register>
- <register>
- <name>AHBRSTR</name>
- <displayName>AHBRSTR</displayName>
- <description>AHB peripheral reset register</description>
- <addressOffset>0x28</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>IOPARST</name>
- <description>I/O port A reset</description>
- <bitOffset>17</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>IOPBRST</name>
- <description>I/O port B reset</description>
- <bitOffset>18</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>IOPCRST</name>
- <description>I/O port C reset</description>
- <bitOffset>19</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>IOPDRST</name>
- <description>I/O port D reset</description>
- <bitOffset>20</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>IOPFRST</name>
- <description>I/O port F reset</description>
- <bitOffset>22</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>CFGR2</name>
- <displayName>CFGR2</displayName>
- <description>Clock configuration register 2</description>
- <addressOffset>0x2C</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>PREDIV</name>
- <description>PREDIV division factor</description>
- <bitOffset>0</bitOffset>
- <bitWidth>4</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>CFGR3</name>
- <displayName>CFGR3</displayName>
- <description>Clock configuration register 3</description>
- <addressOffset>0x30</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>USART1SW</name>
- <description>USART1 clock source
- selection</description>
- <bitOffset>0</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>I2C1SW</name>
- <description>I2C1 clock source
- selection</description>
- <bitOffset>4</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>ADCSW</name>
- <description>ADC clock source selection</description>
- <bitOffset>8</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>USART2SW</name>
- <description>USART2 clock source
- selection</description>
- <bitOffset>16</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>CR2</name>
- <displayName>CR2</displayName>
- <description>Clock control register 2</description>
- <addressOffset>0x34</addressOffset>
- <size>0x20</size>
- <resetValue>0x00000080</resetValue>
- <fields>
- <field>
- <name>HSI14ON</name>
- <description>HSI14 clock enable</description>
- <bitOffset>0</bitOffset>
- <bitWidth>1</bitWidth>
- <access>read-write</access>
- </field>
- <field>
- <name>HSI14RDY</name>
- <description>HR14 clock ready flag</description>
- <bitOffset>1</bitOffset>
- <bitWidth>1</bitWidth>
- <access>read-only</access>
- </field>
- <field>
- <name>HSI14DIS</name>
- <description>HSI14 clock request from ADC
- disable</description>
- <bitOffset>2</bitOffset>
- <bitWidth>1</bitWidth>
- <access>read-write</access>
- </field>
- <field>
- <name>HSI14TRIM</name>
- <description>HSI14 clock trimming</description>
- <bitOffset>3</bitOffset>
- <bitWidth>5</bitWidth>
- <access>read-write</access>
- </field>
- <field>
- <name>HSI14CAL</name>
- <description>HSI14 clock calibration</description>
- <bitOffset>8</bitOffset>
- <bitWidth>8</bitWidth>
- <access>read-only</access>
- </field>
- <field>
- <name>HSI48ON</name>
- <description>HSI48 clock enable</description>
- <bitOffset>16</bitOffset>
- <bitWidth>1</bitWidth>
- <access>read-write</access>
- </field>
- <field>
- <name>HSI48RDY</name>
- <description>HSI48 clock ready flag</description>
- <bitOffset>17</bitOffset>
- <bitWidth>1</bitWidth>
- <access>read-only</access>
- </field>
- <field>
- <name>HSI48CAL</name>
- <description>HSI48 factory clock
- calibration</description>
- <bitOffset>24</bitOffset>
- <bitWidth>1</bitWidth>
- <access>read-only</access>
- </field>
- </fields>
- </register>
- </registers>
- </peripheral>
- <peripheral>
- <name>SYSCFG</name>
- <description>System configuration controller</description>
- <groupName>SYSCFG</groupName>
- <baseAddress>0x40010000</baseAddress>
- <addressBlock>
- <offset>0x0</offset>
- <size>0x400</size>
- <usage>registers</usage>
- </addressBlock>
- <registers>
- <register>
- <name>CFGR1</name>
- <displayName>CFGR1</displayName>
- <description>configuration register 1</description>
- <addressOffset>0x0</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>MEM_MODE</name>
- <description>Memory mapping selection
- bits</description>
- <bitOffset>0</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>ADC_DMA_RMP</name>
- <description>ADC DMA remapping bit</description>
- <bitOffset>8</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>USART1_TX_DMA_RMP</name>
- <description>USART1_TX DMA remapping
- bit</description>
- <bitOffset>9</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>USART1_RX_DMA_RMP</name>
- <description>USART1_RX DMA request remapping
- bit</description>
- <bitOffset>10</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>TIM16_DMA_RMP</name>
- <description>TIM16 DMA request remapping
- bit</description>
- <bitOffset>11</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>TIM17_DMA_RMP</name>
- <description>TIM17 DMA request remapping
- bit</description>
- <bitOffset>12</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>I2C_PB6_FM</name>
- <description>Fast Mode Plus (FM plus) driving
- capability activation bits.</description>
- <bitOffset>16</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>I2C_PB7_FM</name>
- <description>Fast Mode Plus (FM+) driving capability
- activation bits.</description>
- <bitOffset>17</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>I2C_PB8_FM</name>
- <description>Fast Mode Plus (FM+) driving capability
- activation bits.</description>
- <bitOffset>18</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>I2C_PB9_FM</name>
- <description>Fast Mode Plus (FM+) driving capability
- activation bits.</description>
- <bitOffset>19</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>I2C1_FM_plus</name>
- <description>FM+ driving capability activation for
- I2C1</description>
- <bitOffset>20</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>I2C2_FM_plus</name>
- <description>FM+ driving capability activation for
- I2C2</description>
- <bitOffset>21</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>SPI2_DMA_RMP</name>
- <description>SPI2 DMA request remapping
- bit</description>
- <bitOffset>24</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>USART2_DMA_RMP</name>
- <description>USART2 DMA request remapping
- bit</description>
- <bitOffset>25</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>USART3_DMA_RMP</name>
- <description>USART3 DMA request remapping
- bit</description>
- <bitOffset>26</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>I2C1_DMA_RMP</name>
- <description>I2C1 DMA request remapping
- bit</description>
- <bitOffset>27</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>TIM1_DMA_RMP</name>
- <description>TIM1 DMA request remapping
- bit</description>
- <bitOffset>28</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>TIM2_DMA_RMP</name>
- <description>TIM2 DMA request remapping
- bit</description>
- <bitOffset>29</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>TIM3_DMA_RMP</name>
- <description>TIM3 DMA request remapping
- bit</description>
- <bitOffset>30</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>EXTICR1</name>
- <displayName>EXTICR1</displayName>
- <description>external interrupt configuration register
- 1</description>
- <addressOffset>0x8</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x0000</resetValue>
- <fields>
- <field>
- <name>EXTI3</name>
- <description>EXTI 3 configuration bits</description>
- <bitOffset>12</bitOffset>
- <bitWidth>4</bitWidth>
- </field>
- <field>
- <name>EXTI2</name>
- <description>EXTI 2 configuration bits</description>
- <bitOffset>8</bitOffset>
- <bitWidth>4</bitWidth>
- </field>
- <field>
- <name>EXTI1</name>
- <description>EXTI 1 configuration bits</description>
- <bitOffset>4</bitOffset>
- <bitWidth>4</bitWidth>
- </field>
- <field>
- <name>EXTI0</name>
- <description>EXTI 0 configuration bits</description>
- <bitOffset>0</bitOffset>
- <bitWidth>4</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>EXTICR2</name>
- <displayName>EXTICR2</displayName>
- <description>external interrupt configuration register
- 2</description>
- <addressOffset>0xC</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x0000</resetValue>
- <fields>
- <field>
- <name>EXTI7</name>
- <description>EXTI 7 configuration bits</description>
- <bitOffset>12</bitOffset>
- <bitWidth>4</bitWidth>
- </field>
- <field>
- <name>EXTI6</name>
- <description>EXTI 6 configuration bits</description>
- <bitOffset>8</bitOffset>
- <bitWidth>4</bitWidth>
- </field>
- <field>
- <name>EXTI5</name>
- <description>EXTI 5 configuration bits</description>
- <bitOffset>4</bitOffset>
- <bitWidth>4</bitWidth>
- </field>
- <field>
- <name>EXTI4</name>
- <description>EXTI 4 configuration bits</description>
- <bitOffset>0</bitOffset>
- <bitWidth>4</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>EXTICR3</name>
- <displayName>EXTICR3</displayName>
- <description>external interrupt configuration register
- 3</description>
- <addressOffset>0x10</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x0000</resetValue>
- <fields>
- <field>
- <name>EXTI11</name>
- <description>EXTI 11 configuration bits</description>
- <bitOffset>12</bitOffset>
- <bitWidth>4</bitWidth>
- </field>
- <field>
- <name>EXTI10</name>
- <description>EXTI 10 configuration bits</description>
- <bitOffset>8</bitOffset>
- <bitWidth>4</bitWidth>
- </field>
- <field>
- <name>EXTI9</name>
- <description>EXTI 9 configuration bits</description>
- <bitOffset>4</bitOffset>
- <bitWidth>4</bitWidth>
- </field>
- <field>
- <name>EXTI8</name>
- <description>EXTI 8 configuration bits</description>
- <bitOffset>0</bitOffset>
- <bitWidth>4</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>EXTICR4</name>
- <displayName>EXTICR4</displayName>
- <description>external interrupt configuration register
- 4</description>
- <addressOffset>0x14</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x0000</resetValue>
- <fields>
- <field>
- <name>EXTI15</name>
- <description>EXTI 15 configuration bits</description>
- <bitOffset>12</bitOffset>
- <bitWidth>4</bitWidth>
- </field>
- <field>
- <name>EXTI14</name>
- <description>EXTI 14 configuration bits</description>
- <bitOffset>8</bitOffset>
- <bitWidth>4</bitWidth>
- </field>
- <field>
- <name>EXTI13</name>
- <description>EXTI 13 configuration bits</description>
- <bitOffset>4</bitOffset>
- <bitWidth>4</bitWidth>
- </field>
- <field>
- <name>EXTI12</name>
- <description>EXTI 12 configuration bits</description>
- <bitOffset>0</bitOffset>
- <bitWidth>4</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>CFGR2</name>
- <displayName>CFGR2</displayName>
- <description>configuration register 2</description>
- <addressOffset>0x18</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x0000</resetValue>
- <fields>
- <field>
- <name>SRAM_PEF</name>
- <description>SRAM parity flag</description>
- <bitOffset>8</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>PVD_LOCK</name>
- <description>PVD lock enable bit</description>
- <bitOffset>2</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>SRAM_PARITY_LOCK</name>
- <description>SRAM parity lock bit</description>
- <bitOffset>1</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>LOCUP_LOCK</name>
- <description>Cortex-M0 LOCKUP bit enable
- bit</description>
- <bitOffset>0</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- </fields>
- </register>
- </registers>
- </peripheral>
- <peripheral>
- <name>ADC</name>
- <description>Analog-to-digital converter</description>
- <groupName>ADC</groupName>
- <baseAddress>0x40012400</baseAddress>
- <addressBlock>
- <offset>0x0</offset>
- <size>0x400</size>
- <usage>registers</usage>
- </addressBlock>
- <interrupt>
- <name>DMA_CH1</name>
- <description>DMA channel 1 interrupt</description>
- <value>9</value>
- </interrupt>
- <interrupt>
- <name>DMA_CH2_3</name>
- <description>DMA channel 2 and 3 interrupts</description>
- <value>10</value>
- </interrupt>
- <interrupt>
- <name>DMA_CH4_5_6_7</name>
- <description>DMA channel 4, 5, 6 and 7
- interrupts</description>
- <value>11</value>
- </interrupt>
- <registers>
- <register>
- <name>ISR</name>
- <displayName>ISR</displayName>
- <description>interrupt and status register</description>
- <addressOffset>0x0</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>AWD</name>
- <description>Analog watchdog flag</description>
- <bitOffset>7</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>OVR</name>
- <description>ADC overrun</description>
- <bitOffset>4</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>EOS</name>
- <description>End of sequence flag</description>
- <bitOffset>3</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>EOC</name>
- <description>End of conversion flag</description>
- <bitOffset>2</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>EOSMP</name>
- <description>End of sampling flag</description>
- <bitOffset>1</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>ADRDY</name>
- <description>ADC ready</description>
- <bitOffset>0</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>IER</name>
- <displayName>IER</displayName>
- <description>interrupt enable register</description>
- <addressOffset>0x4</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>AWDIE</name>
- <description>Analog watchdog interrupt
- enable</description>
- <bitOffset>7</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>OVRIE</name>
- <description>Overrun interrupt enable</description>
- <bitOffset>4</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>EOSIE</name>
- <description>End of conversion sequence interrupt
- enable</description>
- <bitOffset>3</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>EOCIE</name>
- <description>End of conversion interrupt
- enable</description>
- <bitOffset>2</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>EOSMPIE</name>
- <description>End of sampling flag interrupt
- enable</description>
- <bitOffset>1</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>ADRDYIE</name>
- <description>ADC ready interrupt enable</description>
- <bitOffset>0</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>CR</name>
- <displayName>CR</displayName>
- <description>control register</description>
- <addressOffset>0x8</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>ADCAL</name>
- <description>ADC calibration</description>
- <bitOffset>31</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>ADSTP</name>
- <description>ADC stop conversion
- command</description>
- <bitOffset>4</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>ADSTART</name>
- <description>ADC start conversion
- command</description>
- <bitOffset>2</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>ADDIS</name>
- <description>ADC disable command</description>
- <bitOffset>1</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>ADEN</name>
- <description>ADC enable command</description>
- <bitOffset>0</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>CFGR1</name>
- <displayName>CFGR1</displayName>
- <description>configuration register 1</description>
- <addressOffset>0xC</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>AWDCH</name>
- <description>Analog watchdog channel
- selection</description>
- <bitOffset>26</bitOffset>
- <bitWidth>5</bitWidth>
- </field>
- <field>
- <name>AWDEN</name>
- <description>Analog watchdog enable</description>
- <bitOffset>23</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>AWDSGL</name>
- <description>Enable the watchdog on a single channel
- or on all channels</description>
- <bitOffset>22</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>DISCEN</name>
- <description>Discontinuous mode</description>
- <bitOffset>16</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>AUTOFF</name>
- <description>Auto-off mode</description>
- <bitOffset>15</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>AUTDLY</name>
- <description>Auto-delayed conversion
- mode</description>
- <bitOffset>14</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CONT</name>
- <description>Single / continuous conversion
- mode</description>
- <bitOffset>13</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>OVRMOD</name>
- <description>Overrun management mode</description>
- <bitOffset>12</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>EXTEN</name>
- <description>External trigger enable and polarity
- selection</description>
- <bitOffset>10</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>EXTSEL</name>
- <description>External trigger selection</description>
- <bitOffset>6</bitOffset>
- <bitWidth>3</bitWidth>
- </field>
- <field>
- <name>ALIGN</name>
- <description>Data alignment</description>
- <bitOffset>5</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>RES</name>
- <description>Data resolution</description>
- <bitOffset>3</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>SCANDIR</name>
- <description>Scan sequence direction</description>
- <bitOffset>2</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>DMACFG</name>
- <description>Direct memery access
- configuration</description>
- <bitOffset>1</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>DMAEN</name>
- <description>Direct memory access
- enable</description>
- <bitOffset>0</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>CFGR2</name>
- <displayName>CFGR2</displayName>
- <description>configuration register 2</description>
- <addressOffset>0x10</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00008000</resetValue>
- <fields>
- <field>
- <name>JITOFF_D4</name>
- <description>JITOFF_D4</description>
- <bitOffset>31</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>JITOFF_D2</name>
- <description>JITOFF_D2</description>
- <bitOffset>30</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>SMPR</name>
- <displayName>SMPR</displayName>
- <description>sampling time register</description>
- <addressOffset>0x14</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>SMPR</name>
- <description>Sampling time selection</description>
- <bitOffset>0</bitOffset>
- <bitWidth>3</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>TR</name>
- <displayName>TR</displayName>
- <description>watchdog threshold register</description>
- <addressOffset>0x20</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000FFF</resetValue>
- <fields>
- <field>
- <name>HT</name>
- <description>Analog watchdog higher
- threshold</description>
- <bitOffset>16</bitOffset>
- <bitWidth>12</bitWidth>
- </field>
- <field>
- <name>LT</name>
- <description>Analog watchdog lower
- threshold</description>
- <bitOffset>0</bitOffset>
- <bitWidth>12</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>CHSELR</name>
- <displayName>CHSELR</displayName>
- <description>channel selection register</description>
- <addressOffset>0x28</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>CHSEL18</name>
- <description>Channel-x selection</description>
- <bitOffset>18</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CHSEL17</name>
- <description>Channel-x selection</description>
- <bitOffset>17</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CHSEL16</name>
- <description>Channel-x selection</description>
- <bitOffset>16</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CHSEL15</name>
- <description>Channel-x selection</description>
- <bitOffset>15</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CHSEL14</name>
- <description>Channel-x selection</description>
- <bitOffset>14</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CHSEL13</name>
- <description>Channel-x selection</description>
- <bitOffset>13</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CHSEL12</name>
- <description>Channel-x selection</description>
- <bitOffset>12</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CHSEL11</name>
- <description>Channel-x selection</description>
- <bitOffset>11</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CHSEL10</name>
- <description>Channel-x selection</description>
- <bitOffset>10</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CHSEL9</name>
- <description>Channel-x selection</description>
- <bitOffset>9</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CHSEL8</name>
- <description>Channel-x selection</description>
- <bitOffset>8</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CHSEL7</name>
- <description>Channel-x selection</description>
- <bitOffset>7</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CHSEL6</name>
- <description>Channel-x selection</description>
- <bitOffset>6</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CHSEL5</name>
- <description>Channel-x selection</description>
- <bitOffset>5</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CHSEL4</name>
- <description>Channel-x selection</description>
- <bitOffset>4</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CHSEL3</name>
- <description>Channel-x selection</description>
- <bitOffset>3</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CHSEL2</name>
- <description>Channel-x selection</description>
- <bitOffset>2</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CHSEL1</name>
- <description>Channel-x selection</description>
- <bitOffset>1</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CHSEL0</name>
- <description>Channel-x selection</description>
- <bitOffset>0</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>DR</name>
- <displayName>DR</displayName>
- <description>data register</description>
- <addressOffset>0x40</addressOffset>
- <size>0x20</size>
- <access>read-only</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>DATA</name>
- <description>Converted data</description>
- <bitOffset>0</bitOffset>
- <bitWidth>16</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>CCR</name>
- <displayName>CCR</displayName>
- <description>common configuration register</description>
- <addressOffset>0x308</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>VBATEN</name>
- <description>VBAT enable</description>
- <bitOffset>24</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>TSEN</name>
- <description>Temperature sensor enable</description>
- <bitOffset>23</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>VREFEN</name>
- <description>Temperature sensor and VREFINT
- enable</description>
- <bitOffset>22</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- </fields>
- </register>
- </registers>
- </peripheral>
- <peripheral>
- <name>USART1</name>
- <description>Universal synchronous asynchronous receiver
- transmitter</description>
- <groupName>USART</groupName>
- <baseAddress>0x40013800</baseAddress>
- <addressBlock>
- <offset>0x0</offset>
- <size>0x400</size>
- <usage>registers</usage>
- </addressBlock>
- <interrupt>
- <name>RCC_CRS</name>
- <description>RCC and CRS global interrupts</description>
- <value>4</value>
- </interrupt>
- <registers>
- <register>
- <name>CR1</name>
- <displayName>CR1</displayName>
- <description>Control register 1</description>
- <addressOffset>0x0</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x0000</resetValue>
- <fields>
- <field>
- <name>UE</name>
- <description>USART enable</description>
- <bitOffset>0</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>UESM</name>
- <description>USART enable in Stop mode</description>
- <bitOffset>1</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>RE</name>
- <description>Receiver enable</description>
- <bitOffset>2</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>TE</name>
- <description>Transmitter enable</description>
- <bitOffset>3</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>IDLEIE</name>
- <description>IDLE interrupt enable</description>
- <bitOffset>4</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>RXNEIE</name>
- <description>RXNE interrupt enable</description>
- <bitOffset>5</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>TCIE</name>
- <description>Transmission complete interrupt
- enable</description>
- <bitOffset>6</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>TXEIE</name>
- <description>interrupt enable</description>
- <bitOffset>7</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>PEIE</name>
- <description>PE interrupt enable</description>
- <bitOffset>8</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>PS</name>
- <description>Parity selection</description>
- <bitOffset>9</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>PCE</name>
- <description>Parity control enable</description>
- <bitOffset>10</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>WAKE</name>
- <description>Receiver wakeup method</description>
- <bitOffset>11</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>M</name>
- <description>Word length</description>
- <bitOffset>12</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>MME</name>
- <description>Mute mode enable</description>
- <bitOffset>13</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CMIE</name>
- <description>Character match interrupt
- enable</description>
- <bitOffset>14</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>OVER8</name>
- <description>Oversampling mode</description>
- <bitOffset>15</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>DEDT</name>
- <description>Driver Enable deassertion
- time</description>
- <bitOffset>16</bitOffset>
- <bitWidth>5</bitWidth>
- </field>
- <field>
- <name>DEAT</name>
- <description>Driver Enable assertion
- time</description>
- <bitOffset>21</bitOffset>
- <bitWidth>5</bitWidth>
- </field>
- <field>
- <name>RTOIE</name>
- <description>Receiver timeout interrupt
- enable</description>
- <bitOffset>26</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>EOBIE</name>
- <description>End of Block interrupt
- enable</description>
- <bitOffset>27</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>M1</name>
- <description>Word length</description>
- <bitOffset>28</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>CR2</name>
- <displayName>CR2</displayName>
- <description>Control register 2</description>
- <addressOffset>0x4</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x0000</resetValue>
- <fields>
- <field>
- <name>ADD4</name>
- <description>Address of the USART node</description>
- <bitOffset>28</bitOffset>
- <bitWidth>4</bitWidth>
- </field>
- <field>
- <name>ADD0</name>
- <description>Address of the USART node</description>
- <bitOffset>24</bitOffset>
- <bitWidth>4</bitWidth>
- </field>
- <field>
- <name>RTOEN</name>
- <description>Receiver timeout enable</description>
- <bitOffset>23</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>ABRMOD</name>
- <description>Auto baud rate mode</description>
- <bitOffset>21</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>ABREN</name>
- <description>Auto baud rate enable</description>
- <bitOffset>20</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>MSBFIRST</name>
- <description>Most significant bit first</description>
- <bitOffset>19</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>DATAINV</name>
- <description>Binary data inversion</description>
- <bitOffset>18</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>TXINV</name>
- <description>TX pin active level
- inversion</description>
- <bitOffset>17</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>RXINV</name>
- <description>RX pin active level
- inversion</description>
- <bitOffset>16</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>SWAP</name>
- <description>Swap TX/RX pins</description>
- <bitOffset>15</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>LINEN</name>
- <description>LIN mode enable</description>
- <bitOffset>14</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>STOP</name>
- <description>STOP bits</description>
- <bitOffset>12</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>CLKEN</name>
- <description>Clock enable</description>
- <bitOffset>11</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CPOL</name>
- <description>Clock polarity</description>
- <bitOffset>10</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CPHA</name>
- <description>Clock phase</description>
- <bitOffset>9</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>LBCL</name>
- <description>Last bit clock pulse</description>
- <bitOffset>8</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>LBDIE</name>
- <description>LIN break detection interrupt
- enable</description>
- <bitOffset>6</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>LBDL</name>
- <description>LIN break detection length</description>
- <bitOffset>5</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>ADDM7</name>
- <description>7-bit Address Detection/4-bit Address
- Detection</description>
- <bitOffset>4</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>CR3</name>
- <displayName>CR3</displayName>
- <description>Control register 3</description>
- <addressOffset>0x8</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x0000</resetValue>
- <fields>
- <field>
- <name>WUFIE</name>
- <description>Wakeup from Stop mode interrupt
- enable</description>
- <bitOffset>22</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>WUS</name>
- <description>Wakeup from Stop mode interrupt flag
- selection</description>
- <bitOffset>20</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>SCARCNT</name>
- <description>Smartcard auto-retry count</description>
- <bitOffset>17</bitOffset>
- <bitWidth>3</bitWidth>
- </field>
- <field>
- <name>DEP</name>
- <description>Driver enable polarity
- selection</description>
- <bitOffset>15</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>DEM</name>
- <description>Driver enable mode</description>
- <bitOffset>14</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>DDRE</name>
- <description>DMA Disable on Reception
- Error</description>
- <bitOffset>13</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>OVRDIS</name>
- <description>Overrun Disable</description>
- <bitOffset>12</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>ONEBIT</name>
- <description>One sample bit method
- enable</description>
- <bitOffset>11</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CTSIE</name>
- <description>CTS interrupt enable</description>
- <bitOffset>10</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CTSE</name>
- <description>CTS enable</description>
- <bitOffset>9</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>RTSE</name>
- <description>RTS enable</description>
- <bitOffset>8</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>DMAT</name>
- <description>DMA enable transmitter</description>
- <bitOffset>7</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>DMAR</name>
- <description>DMA enable receiver</description>
- <bitOffset>6</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>SCEN</name>
- <description>Smartcard mode enable</description>
- <bitOffset>5</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>NACK</name>
- <description>Smartcard NACK enable</description>
- <bitOffset>4</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>HDSEL</name>
- <description>Half-duplex selection</description>
- <bitOffset>3</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>IRLP</name>
- <description>IrDA low-power</description>
- <bitOffset>2</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>IREN</name>
- <description>IrDA mode enable</description>
- <bitOffset>1</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>EIE</name>
- <description>Error interrupt enable</description>
- <bitOffset>0</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>BRR</name>
- <displayName>BRR</displayName>
- <description>Baud rate register</description>
- <addressOffset>0xC</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x0000</resetValue>
- <fields>
- <field>
- <name>DIV_Mantissa</name>
- <description>mantissa of USARTDIV</description>
- <bitOffset>4</bitOffset>
- <bitWidth>12</bitWidth>
- </field>
- <field>
- <name>DIV_Fraction</name>
- <description>fraction of USARTDIV</description>
- <bitOffset>0</bitOffset>
- <bitWidth>4</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>GTPR</name>
- <displayName>GTPR</displayName>
- <description>Guard time and prescaler
- register</description>
- <addressOffset>0x10</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x0000</resetValue>
- <fields>
- <field>
- <name>GT</name>
- <description>Guard time value</description>
- <bitOffset>8</bitOffset>
- <bitWidth>8</bitWidth>
- </field>
- <field>
- <name>PSC</name>
- <description>Prescaler value</description>
- <bitOffset>0</bitOffset>
- <bitWidth>8</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>RTOR</name>
- <displayName>RTOR</displayName>
- <description>Receiver timeout register</description>
- <addressOffset>0x14</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x0000</resetValue>
- <fields>
- <field>
- <name>BLEN</name>
- <description>Block Length</description>
- <bitOffset>24</bitOffset>
- <bitWidth>8</bitWidth>
- </field>
- <field>
- <name>RTO</name>
- <description>Receiver timeout value</description>
- <bitOffset>0</bitOffset>
- <bitWidth>24</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>RQR</name>
- <displayName>RQR</displayName>
- <description>Request register</description>
- <addressOffset>0x18</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x0000</resetValue>
- <fields>
- <field>
- <name>TXFRQ</name>
- <description>Transmit data flush
- request</description>
- <bitOffset>4</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>RXFRQ</name>
- <description>Receive data flush request</description>
- <bitOffset>3</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>MMRQ</name>
- <description>Mute mode request</description>
- <bitOffset>2</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>SBKRQ</name>
- <description>Send break request</description>
- <bitOffset>1</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>ABRRQ</name>
- <description>Auto baud rate request</description>
- <bitOffset>0</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>ISR</name>
- <displayName>ISR</displayName>
- <description>Interrupt & status
- register</description>
- <addressOffset>0x1C</addressOffset>
- <size>0x20</size>
- <access>read-only</access>
- <resetValue>0x00C0</resetValue>
- <fields>
- <field>
- <name>REACK</name>
- <description>Receive enable acknowledge
- flag</description>
- <bitOffset>22</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>TEACK</name>
- <description>Transmit enable acknowledge
- flag</description>
- <bitOffset>21</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>WUF</name>
- <description>Wakeup from Stop mode flag</description>
- <bitOffset>20</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>RWU</name>
- <description>Receiver wakeup from Mute
- mode</description>
- <bitOffset>19</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>SBKF</name>
- <description>Send break flag</description>
- <bitOffset>18</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CMF</name>
- <description>character match flag</description>
- <bitOffset>17</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>BUSY</name>
- <description>Busy flag</description>
- <bitOffset>16</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>ABRF</name>
- <description>Auto baud rate flag</description>
- <bitOffset>15</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>ABRE</name>
- <description>Auto baud rate error</description>
- <bitOffset>14</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>EOBF</name>
- <description>End of block flag</description>
- <bitOffset>12</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>RTOF</name>
- <description>Receiver timeout</description>
- <bitOffset>11</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CTS</name>
- <description>CTS flag</description>
- <bitOffset>10</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CTSIF</name>
- <description>CTS interrupt flag</description>
- <bitOffset>9</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>LBDF</name>
- <description>LIN break detection flag</description>
- <bitOffset>8</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>TXE</name>
- <description>Transmit data register
- empty</description>
- <bitOffset>7</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>TC</name>
- <description>Transmission complete</description>
- <bitOffset>6</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>RXNE</name>
- <description>Read data register not
- empty</description>
- <bitOffset>5</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>IDLE</name>
- <description>Idle line detected</description>
- <bitOffset>4</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>ORE</name>
- <description>Overrun error</description>
- <bitOffset>3</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>NF</name>
- <description>Noise detected flag</description>
- <bitOffset>2</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>FE</name>
- <description>Framing error</description>
- <bitOffset>1</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>PE</name>
- <description>Parity error</description>
- <bitOffset>0</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>ICR</name>
- <displayName>ICR</displayName>
- <description>Interrupt flag clear register</description>
- <addressOffset>0x20</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x0000</resetValue>
- <fields>
- <field>
- <name>WUCF</name>
- <description>Wakeup from Stop mode clear
- flag</description>
- <bitOffset>20</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CMCF</name>
- <description>Character match clear flag</description>
- <bitOffset>17</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>EOBCF</name>
- <description>End of timeout clear flag</description>
- <bitOffset>12</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>RTOCF</name>
- <description>Receiver timeout clear
- flag</description>
- <bitOffset>11</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CTSCF</name>
- <description>CTS clear flag</description>
- <bitOffset>9</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>LBDCF</name>
- <description>LIN break detection clear
- flag</description>
- <bitOffset>8</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>TCCF</name>
- <description>Transmission complete clear
- flag</description>
- <bitOffset>6</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>IDLECF</name>
- <description>Idle line detected clear
- flag</description>
- <bitOffset>4</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>ORECF</name>
- <description>Overrun error clear flag</description>
- <bitOffset>3</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>NCF</name>
- <description>Noise detected clear flag</description>
- <bitOffset>2</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>FECF</name>
- <description>Framing error clear flag</description>
- <bitOffset>1</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>PECF</name>
- <description>Parity error clear flag</description>
- <bitOffset>0</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>RDR</name>
- <displayName>RDR</displayName>
- <description>Receive data register</description>
- <addressOffset>0x24</addressOffset>
- <size>0x20</size>
- <access>read-only</access>
- <resetValue>0x0000</resetValue>
- <fields>
- <field>
- <name>RDR</name>
- <description>Receive data value</description>
- <bitOffset>0</bitOffset>
- <bitWidth>9</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>TDR</name>
- <displayName>TDR</displayName>
- <description>Transmit data register</description>
- <addressOffset>0x28</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x0000</resetValue>
- <fields>
- <field>
- <name>TDR</name>
- <description>Transmit data value</description>
- <bitOffset>0</bitOffset>
- <bitWidth>9</bitWidth>
- </field>
- </fields>
- </register>
- </registers>
- </peripheral>
- <peripheral derivedFrom="USART1">
- <name>USART2</name>
- <baseAddress>0x40004400</baseAddress>
- </peripheral>
- <peripheral>
- <name>RTC</name>
- <description>Real-time clock</description>
- <groupName>RTC</groupName>
- <baseAddress>0x40002800</baseAddress>
- <addressBlock>
- <offset>0x0</offset>
- <size>0x400</size>
- <usage>registers</usage>
- </addressBlock>
- <interrupt>
- <name>ADC_COMP</name>
- <description>ADC and comparator interrupts</description>
- <value>12</value>
- </interrupt>
- <registers>
- <register>
- <name>TR</name>
- <displayName>TR</displayName>
- <description>time register</description>
- <addressOffset>0x0</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>PM</name>
- <description>AM/PM notation</description>
- <bitOffset>22</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>HT</name>
- <description>Hour tens in BCD format</description>
- <bitOffset>20</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>HU</name>
- <description>Hour units in BCD format</description>
- <bitOffset>16</bitOffset>
- <bitWidth>4</bitWidth>
- </field>
- <field>
- <name>MNT</name>
- <description>Minute tens in BCD format</description>
- <bitOffset>12</bitOffset>
- <bitWidth>3</bitWidth>
- </field>
- <field>
- <name>MNU</name>
- <description>Minute units in BCD format</description>
- <bitOffset>8</bitOffset>
- <bitWidth>4</bitWidth>
- </field>
- <field>
- <name>ST</name>
- <description>Second tens in BCD format</description>
- <bitOffset>4</bitOffset>
- <bitWidth>3</bitWidth>
- </field>
- <field>
- <name>SU</name>
- <description>Second units in BCD format</description>
- <bitOffset>0</bitOffset>
- <bitWidth>4</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>DR</name>
- <displayName>DR</displayName>
- <description>date register</description>
- <addressOffset>0x4</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00002101</resetValue>
- <fields>
- <field>
- <name>YT</name>
- <description>Year tens in BCD format</description>
- <bitOffset>20</bitOffset>
- <bitWidth>4</bitWidth>
- </field>
- <field>
- <name>YU</name>
- <description>Year units in BCD format</description>
- <bitOffset>16</bitOffset>
- <bitWidth>4</bitWidth>
- </field>
- <field>
- <name>WDU</name>
- <description>Week day units</description>
- <bitOffset>13</bitOffset>
- <bitWidth>3</bitWidth>
- </field>
- <field>
- <name>MT</name>
- <description>Month tens in BCD format</description>
- <bitOffset>12</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>MU</name>
- <description>Month units in BCD format</description>
- <bitOffset>8</bitOffset>
- <bitWidth>4</bitWidth>
- </field>
- <field>
- <name>DT</name>
- <description>Date tens in BCD format</description>
- <bitOffset>4</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>DU</name>
- <description>Date units in BCD format</description>
- <bitOffset>0</bitOffset>
- <bitWidth>4</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>CR</name>
- <displayName>CR</displayName>
- <description>control register</description>
- <addressOffset>0x8</addressOffset>
- <size>0x20</size>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>TSEDGE</name>
- <description>Time-stamp event active
- edge</description>
- <bitOffset>3</bitOffset>
- <bitWidth>1</bitWidth>
- <access>read-write</access>
- </field>
- <field>
- <name>REFCKON</name>
- <description>RTC_REFIN reference clock detection
- enable (50 or 60 Hz)</description>
- <bitOffset>4</bitOffset>
- <bitWidth>1</bitWidth>
- <access>read-write</access>
- </field>
- <field>
- <name>BYPSHAD</name>
- <description>Bypass the shadow
- registers</description>
- <bitOffset>5</bitOffset>
- <bitWidth>1</bitWidth>
- <access>read-write</access>
- </field>
- <field>
- <name>FMT</name>
- <description>Hour format</description>
- <bitOffset>6</bitOffset>
- <bitWidth>1</bitWidth>
- <access>read-write</access>
- </field>
- <field>
- <name>ALRAE</name>
- <description>Alarm A enable</description>
- <bitOffset>8</bitOffset>
- <bitWidth>1</bitWidth>
- <access>read-write</access>
- </field>
- <field>
- <name>TSE</name>
- <description>timestamp enable</description>
- <bitOffset>11</bitOffset>
- <bitWidth>1</bitWidth>
- <access>read-write</access>
- </field>
- <field>
- <name>ALRAIE</name>
- <description>Alarm A interrupt enable</description>
- <bitOffset>12</bitOffset>
- <bitWidth>1</bitWidth>
- <access>read-write</access>
- </field>
- <field>
- <name>TSIE</name>
- <description>Time-stamp interrupt
- enable</description>
- <bitOffset>15</bitOffset>
- <bitWidth>1</bitWidth>
- <access>read-write</access>
- </field>
- <field>
- <name>ADD1H</name>
- <description>Add 1 hour (summer time
- change)</description>
- <bitOffset>16</bitOffset>
- <bitWidth>1</bitWidth>
- <access>write-only</access>
- </field>
- <field>
- <name>SUB1H</name>
- <description>Subtract 1 hour (winter time
- change)</description>
- <bitOffset>17</bitOffset>
- <bitWidth>1</bitWidth>
- <access>write-only</access>
- </field>
- <field>
- <name>BKP</name>
- <description>Backup</description>
- <bitOffset>18</bitOffset>
- <bitWidth>1</bitWidth>
- <access>read-write</access>
- </field>
- <field>
- <name>COSEL</name>
- <description>Calibration output
- selection</description>
- <bitOffset>19</bitOffset>
- <bitWidth>1</bitWidth>
- <access>read-write</access>
- </field>
- <field>
- <name>POL</name>
- <description>Output polarity</description>
- <bitOffset>20</bitOffset>
- <bitWidth>1</bitWidth>
- <access>read-write</access>
- </field>
- <field>
- <name>OSEL</name>
- <description>Output selection</description>
- <bitOffset>21</bitOffset>
- <bitWidth>2</bitWidth>
- <access>read-write</access>
- </field>
- <field>
- <name>COE</name>
- <description>Calibration output enable</description>
- <bitOffset>23</bitOffset>
- <bitWidth>1</bitWidth>
- <access>read-write</access>
- </field>
- </fields>
- </register>
- <register>
- <name>ISR</name>
- <displayName>ISR</displayName>
- <description>initialization and status
- register</description>
- <addressOffset>0xC</addressOffset>
- <size>0x20</size>
- <resetValue>0x00000007</resetValue>
- <fields>
- <field>
- <name>ALRAWF</name>
- <description>Alarm A write flag</description>
- <bitOffset>0</bitOffset>
- <bitWidth>1</bitWidth>
- <access>read-only</access>
- </field>
- <field>
- <name>SHPF</name>
- <description>Shift operation pending</description>
- <bitOffset>3</bitOffset>
- <bitWidth>1</bitWidth>
- <access>read-write</access>
- </field>
- <field>
- <name>INITS</name>
- <description>Initialization status flag</description>
- <bitOffset>4</bitOffset>
- <bitWidth>1</bitWidth>
- <access>read-only</access>
- </field>
- <field>
- <name>RSF</name>
- <description>Registers synchronization
- flag</description>
- <bitOffset>5</bitOffset>
- <bitWidth>1</bitWidth>
- <access>read-write</access>
- </field>
- <field>
- <name>INITF</name>
- <description>Initialization flag</description>
- <bitOffset>6</bitOffset>
- <bitWidth>1</bitWidth>
- <access>read-only</access>
- </field>
- <field>
- <name>INIT</name>
- <description>Initialization mode</description>
- <bitOffset>7</bitOffset>
- <bitWidth>1</bitWidth>
- <access>read-write</access>
- </field>
- <field>
- <name>ALRAF</name>
- <description>Alarm A flag</description>
- <bitOffset>8</bitOffset>
- <bitWidth>1</bitWidth>
- <access>read-write</access>
- </field>
- <field>
- <name>TSF</name>
- <description>Time-stamp flag</description>
- <bitOffset>11</bitOffset>
- <bitWidth>1</bitWidth>
- <access>read-write</access>
- </field>
- <field>
- <name>TSOVF</name>
- <description>Time-stamp overflow flag</description>
- <bitOffset>12</bitOffset>
- <bitWidth>1</bitWidth>
- <access>read-write</access>
- </field>
- <field>
- <name>TAMP1F</name>
- <description>RTC_TAMP1 detection flag</description>
- <bitOffset>13</bitOffset>
- <bitWidth>1</bitWidth>
- <access>read-write</access>
- </field>
- <field>
- <name>TAMP2F</name>
- <description>RTC_TAMP2 detection flag</description>
- <bitOffset>14</bitOffset>
- <bitWidth>1</bitWidth>
- <access>read-write</access>
- </field>
- <field>
- <name>RECALPF</name>
- <description>Recalibration pending Flag</description>
- <bitOffset>16</bitOffset>
- <bitWidth>1</bitWidth>
- <access>read-only</access>
- </field>
- </fields>
- </register>
- <register>
- <name>PRER</name>
- <displayName>PRER</displayName>
- <description>prescaler register</description>
- <addressOffset>0x10</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x007F00FF</resetValue>
- <fields>
- <field>
- <name>PREDIV_A</name>
- <description>Asynchronous prescaler
- factor</description>
- <bitOffset>16</bitOffset>
- <bitWidth>7</bitWidth>
- </field>
- <field>
- <name>PREDIV_S</name>
- <description>Synchronous prescaler
- factor</description>
- <bitOffset>0</bitOffset>
- <bitWidth>15</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>ALRMAR</name>
- <displayName>ALRMAR</displayName>
- <description>alarm A register</description>
- <addressOffset>0x1C</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>MSK4</name>
- <description>Alarm A date mask</description>
- <bitOffset>31</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>WDSEL</name>
- <description>Week day selection</description>
- <bitOffset>30</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>DT</name>
- <description>Date tens in BCD format.</description>
- <bitOffset>28</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>DU</name>
- <description>Date units or day in BCD
- format.</description>
- <bitOffset>24</bitOffset>
- <bitWidth>4</bitWidth>
- </field>
- <field>
- <name>MSK3</name>
- <description>Alarm A hours mask</description>
- <bitOffset>23</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>PM</name>
- <description>AM/PM notation</description>
- <bitOffset>22</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>HT</name>
- <description>Hour tens in BCD format.</description>
- <bitOffset>20</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>HU</name>
- <description>Hour units in BCD format.</description>
- <bitOffset>16</bitOffset>
- <bitWidth>4</bitWidth>
- </field>
- <field>
- <name>MSK2</name>
- <description>Alarm A minutes mask</description>
- <bitOffset>15</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>MNT</name>
- <description>Minute tens in BCD format.</description>
- <bitOffset>12</bitOffset>
- <bitWidth>3</bitWidth>
- </field>
- <field>
- <name>MNU</name>
- <description>Minute units in BCD
- format.</description>
- <bitOffset>8</bitOffset>
- <bitWidth>4</bitWidth>
- </field>
- <field>
- <name>MSK1</name>
- <description>Alarm A seconds mask</description>
- <bitOffset>7</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>ST</name>
- <description>Second tens in BCD format.</description>
- <bitOffset>4</bitOffset>
- <bitWidth>3</bitWidth>
- </field>
- <field>
- <name>SU</name>
- <description>Second units in BCD
- format.</description>
- <bitOffset>0</bitOffset>
- <bitWidth>4</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>WPR</name>
- <displayName>WPR</displayName>
- <description>write protection register</description>
- <addressOffset>0x24</addressOffset>
- <size>0x20</size>
- <access>write-only</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>KEY</name>
- <description>Write protection key</description>
- <bitOffset>0</bitOffset>
- <bitWidth>8</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>SSR</name>
- <displayName>SSR</displayName>
- <description>sub second register</description>
- <addressOffset>0x28</addressOffset>
- <size>0x20</size>
- <access>read-only</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>SS</name>
- <description>Sub second value</description>
- <bitOffset>0</bitOffset>
- <bitWidth>16</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>SHIFTR</name>
- <displayName>SHIFTR</displayName>
- <description>shift control register</description>
- <addressOffset>0x2C</addressOffset>
- <size>0x20</size>
- <access>write-only</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>ADD1S</name>
- <description>Reserved</description>
- <bitOffset>31</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>SUBFS</name>
- <description>Subtract a fraction of a
- second</description>
- <bitOffset>0</bitOffset>
- <bitWidth>15</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>TSTR</name>
- <displayName>TSTR</displayName>
- <description>timestamp time register</description>
- <addressOffset>0x30</addressOffset>
- <size>0x20</size>
- <access>read-only</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>PM</name>
- <description>AM/PM notation</description>
- <bitOffset>22</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>HT</name>
- <description>Hour tens in BCD format.</description>
- <bitOffset>20</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>HU</name>
- <description>Hour units in BCD format.</description>
- <bitOffset>16</bitOffset>
- <bitWidth>4</bitWidth>
- </field>
- <field>
- <name>MNT</name>
- <description>Minute tens in BCD format.</description>
- <bitOffset>12</bitOffset>
- <bitWidth>3</bitWidth>
- </field>
- <field>
- <name>MNU</name>
- <description>Minute units in BCD
- format.</description>
- <bitOffset>8</bitOffset>
- <bitWidth>4</bitWidth>
- </field>
- <field>
- <name>ST</name>
- <description>Second tens in BCD format.</description>
- <bitOffset>4</bitOffset>
- <bitWidth>3</bitWidth>
- </field>
- <field>
- <name>SU</name>
- <description>Second units in BCD
- format.</description>
- <bitOffset>0</bitOffset>
- <bitWidth>4</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>TSDR</name>
- <displayName>TSDR</displayName>
- <description>timestamp date register</description>
- <addressOffset>0x34</addressOffset>
- <size>0x20</size>
- <access>read-only</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>WDU</name>
- <description>Week day units</description>
- <bitOffset>13</bitOffset>
- <bitWidth>3</bitWidth>
- </field>
- <field>
- <name>MT</name>
- <description>Month tens in BCD format</description>
- <bitOffset>12</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>MU</name>
- <description>Month units in BCD format</description>
- <bitOffset>8</bitOffset>
- <bitWidth>4</bitWidth>
- </field>
- <field>
- <name>DT</name>
- <description>Date tens in BCD format</description>
- <bitOffset>4</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>DU</name>
- <description>Date units in BCD format</description>
- <bitOffset>0</bitOffset>
- <bitWidth>4</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>TSSSR</name>
- <displayName>TSSSR</displayName>
- <description>time-stamp sub second register</description>
- <addressOffset>0x38</addressOffset>
- <size>0x20</size>
- <access>read-only</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>SS</name>
- <description>Sub second value</description>
- <bitOffset>0</bitOffset>
- <bitWidth>16</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>CALR</name>
- <displayName>CALR</displayName>
- <description>calibration register</description>
- <addressOffset>0x3C</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>CALP</name>
- <description>Use an 8-second calibration cycle
- period</description>
- <bitOffset>15</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CALW8</name>
- <description>Use a 16-second calibration cycle
- period</description>
- <bitOffset>14</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CALW16</name>
- <description>Reserved</description>
- <bitOffset>13</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CALM</name>
- <description>Calibration minus</description>
- <bitOffset>0</bitOffset>
- <bitWidth>9</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>TAFCR</name>
- <displayName>TAFCR</displayName>
- <description>tamper and alternate function configuration
- register</description>
- <addressOffset>0x40</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>PC15MODE</name>
- <description>PC15 mode</description>
- <bitOffset>23</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>PC15VALUE</name>
- <description>PC15 value</description>
- <bitOffset>22</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>PC14MODE</name>
- <description>PC14 mode</description>
- <bitOffset>21</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>PC14VALUE</name>
- <description>PC14 value</description>
- <bitOffset>20</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>PC13MODE</name>
- <description>PC13 mode</description>
- <bitOffset>19</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>PC13VALUE</name>
- <description>RTC_ALARM output type/PC13
- value</description>
- <bitOffset>18</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>TAMP_PUDIS</name>
- <description>RTC_TAMPx pull-up disable</description>
- <bitOffset>15</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>TAMP_PRCH</name>
- <description>RTC_TAMPx precharge
- duration</description>
- <bitOffset>13</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>TAMPFLT</name>
- <description>RTC_TAMPx filter count</description>
- <bitOffset>11</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>TAMPFREQ</name>
- <description>Tamper sampling frequency</description>
- <bitOffset>8</bitOffset>
- <bitWidth>3</bitWidth>
- </field>
- <field>
- <name>TAMPTS</name>
- <description>Activate timestamp on tamper detection
- event</description>
- <bitOffset>7</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>TAMP2_TRG</name>
- <description>Active level for RTC_TAMP2
- input</description>
- <bitOffset>4</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>TAMP2E</name>
- <description>RTC_TAMP2 input detection
- enable</description>
- <bitOffset>3</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>TAMPIE</name>
- <description>Tamper interrupt enable</description>
- <bitOffset>2</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>TAMP1TRG</name>
- <description>Active level for RTC_TAMP1
- input</description>
- <bitOffset>1</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>TAMP1E</name>
- <description>RTC_TAMP1 input detection
- enable</description>
- <bitOffset>0</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>ALRMASSR</name>
- <displayName>ALRMASSR</displayName>
- <description>alarm A sub second register</description>
- <addressOffset>0x44</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>MASKSS</name>
- <description>Mask the most-significant bits starting
- at this bit</description>
- <bitOffset>24</bitOffset>
- <bitWidth>4</bitWidth>
- </field>
- <field>
- <name>SS</name>
- <description>Sub seconds value</description>
- <bitOffset>0</bitOffset>
- <bitWidth>15</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>BKP0R</name>
- <displayName>BKP0R</displayName>
- <description>backup register</description>
- <addressOffset>0x50</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>BKP</name>
- <description>BKP</description>
- <bitOffset>0</bitOffset>
- <bitWidth>32</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>BKP1R</name>
- <displayName>BKP1R</displayName>
- <description>backup register</description>
- <addressOffset>0x54</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>BKP</name>
- <description>BKP</description>
- <bitOffset>0</bitOffset>
- <bitWidth>32</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>BKP2R</name>
- <displayName>BKP2R</displayName>
- <description>backup register</description>
- <addressOffset>0x58</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>BKP</name>
- <description>BKP</description>
- <bitOffset>0</bitOffset>
- <bitWidth>32</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>BKP3R</name>
- <displayName>BKP3R</displayName>
- <description>backup register</description>
- <addressOffset>0x5C</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>BKP</name>
- <description>BKP</description>
- <bitOffset>0</bitOffset>
- <bitWidth>32</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>BKP4R</name>
- <displayName>BKP4R</displayName>
- <description>backup register</description>
- <addressOffset>0x60</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>BKP</name>
- <description>BKP</description>
- <bitOffset>0</bitOffset>
- <bitWidth>32</bitWidth>
- </field>
- </fields>
- </register>
- </registers>
- </peripheral>
- <peripheral>
- <name>TIM15</name>
- <description>General-purpose-timers</description>
- <groupName>TIM</groupName>
- <baseAddress>0x40014000</baseAddress>
- <addressBlock>
- <offset>0x0</offset>
- <size>0x400</size>
- <usage>registers</usage>
- </addressBlock>
- <interrupt>
- <name>USART1</name>
- <description>USART1 global interrupt</description>
- <value>27</value>
- </interrupt>
- <registers>
- <register>
- <name>CR1</name>
- <displayName>CR1</displayName>
- <description>control register 1</description>
- <addressOffset>0x0</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x0000</resetValue>
- <fields>
- <field>
- <name>CKD</name>
- <description>Clock division</description>
- <bitOffset>8</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>ARPE</name>
- <description>Auto-reload preload enable</description>
- <bitOffset>7</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>OPM</name>
- <description>One-pulse mode</description>
- <bitOffset>3</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>URS</name>
- <description>Update request source</description>
- <bitOffset>2</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>UDIS</name>
- <description>Update disable</description>
- <bitOffset>1</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CEN</name>
- <description>Counter enable</description>
- <bitOffset>0</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>CR2</name>
- <displayName>CR2</displayName>
- <description>control register 2</description>
- <addressOffset>0x4</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x0000</resetValue>
- <fields>
- <field>
- <name>OIS2</name>
- <description>Output Idle state 2</description>
- <bitOffset>10</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>OIS1N</name>
- <description>Output Idle state 1</description>
- <bitOffset>9</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>OIS1</name>
- <description>Output Idle state 1</description>
- <bitOffset>8</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>MMS</name>
- <description>Master mode selection</description>
- <bitOffset>4</bitOffset>
- <bitWidth>3</bitWidth>
- </field>
- <field>
- <name>CCDS</name>
- <description>Capture/compare DMA
- selection</description>
- <bitOffset>3</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CCUS</name>
- <description>Capture/compare control update
- selection</description>
- <bitOffset>2</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CCPC</name>
- <description>Capture/compare preloaded
- control</description>
- <bitOffset>0</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>SMCR</name>
- <displayName>SMCR</displayName>
- <description>slave mode control register</description>
- <addressOffset>0x8</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x0000</resetValue>
- <fields>
- <field>
- <name>MSM</name>
- <description>Master/Slave mode</description>
- <bitOffset>7</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>TS</name>
- <description>Trigger selection</description>
- <bitOffset>4</bitOffset>
- <bitWidth>3</bitWidth>
- </field>
- <field>
- <name>SMS</name>
- <description>Slave mode selection</description>
- <bitOffset>0</bitOffset>
- <bitWidth>3</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>DIER</name>
- <displayName>DIER</displayName>
- <description>DMA/Interrupt enable register</description>
- <addressOffset>0xC</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x0000</resetValue>
- <fields>
- <field>
- <name>TDE</name>
- <description>Trigger DMA request enable</description>
- <bitOffset>14</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CC2DE</name>
- <description>Capture/Compare 2 DMA request
- enable</description>
- <bitOffset>10</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CC1DE</name>
- <description>Capture/Compare 1 DMA request
- enable</description>
- <bitOffset>9</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>UDE</name>
- <description>Update DMA request enable</description>
- <bitOffset>8</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>BIE</name>
- <description>Break interrupt enable</description>
- <bitOffset>7</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>TIE</name>
- <description>Trigger interrupt enable</description>
- <bitOffset>6</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>COMIE</name>
- <description>COM interrupt enable</description>
- <bitOffset>5</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CC2IE</name>
- <description>Capture/Compare 2 interrupt
- enable</description>
- <bitOffset>2</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CC1IE</name>
- <description>Capture/Compare 1 interrupt
- enable</description>
- <bitOffset>1</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>UIE</name>
- <description>Update interrupt enable</description>
- <bitOffset>0</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>SR</name>
- <displayName>SR</displayName>
- <description>status register</description>
- <addressOffset>0x10</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x0000</resetValue>
- <fields>
- <field>
- <name>CC2OF</name>
- <description>Capture/compare 2 overcapture
- flag</description>
- <bitOffset>10</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CC1OF</name>
- <description>Capture/Compare 1 overcapture
- flag</description>
- <bitOffset>9</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>BIF</name>
- <description>Break interrupt flag</description>
- <bitOffset>7</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>TIF</name>
- <description>Trigger interrupt flag</description>
- <bitOffset>6</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>COMIF</name>
- <description>COM interrupt flag</description>
- <bitOffset>5</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CC2IF</name>
- <description>Capture/Compare 2 interrupt
- flag</description>
- <bitOffset>2</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CC1IF</name>
- <description>Capture/compare 1 interrupt
- flag</description>
- <bitOffset>1</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>UIF</name>
- <description>Update interrupt flag</description>
- <bitOffset>0</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>EGR</name>
- <displayName>EGR</displayName>
- <description>event generation register</description>
- <addressOffset>0x14</addressOffset>
- <size>0x20</size>
- <access>write-only</access>
- <resetValue>0x0000</resetValue>
- <fields>
- <field>
- <name>BG</name>
- <description>Break generation</description>
- <bitOffset>7</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>TG</name>
- <description>Trigger generation</description>
- <bitOffset>6</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>COMG</name>
- <description>Capture/Compare control update
- generation</description>
- <bitOffset>5</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CC2G</name>
- <description>Capture/compare 2
- generation</description>
- <bitOffset>2</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CC1G</name>
- <description>Capture/compare 1
- generation</description>
- <bitOffset>1</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>UG</name>
- <description>Update generation</description>
- <bitOffset>0</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>CCMR1_Output</name>
- <displayName>CCMR1_Output</displayName>
- <description>capture/compare mode register (output
- mode)</description>
- <addressOffset>0x18</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>OC2M</name>
- <description>Output Compare 2 mode</description>
- <bitOffset>12</bitOffset>
- <bitWidth>3</bitWidth>
- </field>
- <field>
- <name>OC2PE</name>
- <description>Output Compare 2 preload
- enable</description>
- <bitOffset>11</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>OC2FE</name>
- <description>Output Compare 2 fast
- enable</description>
- <bitOffset>10</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CC2S</name>
- <description>Capture/Compare 2
- selection</description>
- <bitOffset>8</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>OC1M</name>
- <description>Output Compare 1 mode</description>
- <bitOffset>4</bitOffset>
- <bitWidth>3</bitWidth>
- </field>
- <field>
- <name>OC1PE</name>
- <description>Output Compare 1 preload
- enable</description>
- <bitOffset>3</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>OC1FE</name>
- <description>Output Compare 1 fast
- enable</description>
- <bitOffset>2</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CC1S</name>
- <description>Capture/Compare 1
- selection</description>
- <bitOffset>0</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>CCMR1_Input</name>
- <displayName>CCMR1_Input</displayName>
- <description>capture/compare mode register 1 (input
- mode)</description>
- <alternateRegister>CCMR1_Output</alternateRegister>
- <addressOffset>0x18</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>IC2F</name>
- <description>Input capture 2 filter</description>
- <bitOffset>12</bitOffset>
- <bitWidth>4</bitWidth>
- </field>
- <field>
- <name>IC2PSC</name>
- <description>Input capture 2 prescaler</description>
- <bitOffset>10</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>CC2S</name>
- <description>Capture/Compare 2
- selection</description>
- <bitOffset>8</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>IC1F</name>
- <description>Input capture 1 filter</description>
- <bitOffset>4</bitOffset>
- <bitWidth>4</bitWidth>
- </field>
- <field>
- <name>IC1PSC</name>
- <description>Input capture 1 prescaler</description>
- <bitOffset>2</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>CC1S</name>
- <description>Capture/Compare 1
- selection</description>
- <bitOffset>0</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>CCER</name>
- <displayName>CCER</displayName>
- <description>capture/compare enable
- register</description>
- <addressOffset>0x20</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x0000</resetValue>
- <fields>
- <field>
- <name>CC2NP</name>
- <description>Capture/Compare 2 output
- Polarity</description>
- <bitOffset>7</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CC2P</name>
- <description>Capture/Compare 2 output
- Polarity</description>
- <bitOffset>5</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CC2E</name>
- <description>Capture/Compare 2 output
- enable</description>
- <bitOffset>4</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CC1NP</name>
- <description>Capture/Compare 1 output
- Polarity</description>
- <bitOffset>3</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CC1NE</name>
- <description>Capture/Compare 1 complementary output
- enable</description>
- <bitOffset>2</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CC1P</name>
- <description>Capture/Compare 1 output
- Polarity</description>
- <bitOffset>1</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CC1E</name>
- <description>Capture/Compare 1 output
- enable</description>
- <bitOffset>0</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>CNT</name>
- <displayName>CNT</displayName>
- <description>counter</description>
- <addressOffset>0x24</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>CNT</name>
- <description>counter value</description>
- <bitOffset>0</bitOffset>
- <bitWidth>16</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>PSC</name>
- <displayName>PSC</displayName>
- <description>prescaler</description>
- <addressOffset>0x28</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x0000</resetValue>
- <fields>
- <field>
- <name>PSC</name>
- <description>Prescaler value</description>
- <bitOffset>0</bitOffset>
- <bitWidth>16</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>ARR</name>
- <displayName>ARR</displayName>
- <description>auto-reload register</description>
- <addressOffset>0x2C</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>ARR</name>
- <description>Auto-reload value</description>
- <bitOffset>0</bitOffset>
- <bitWidth>16</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>RCR</name>
- <displayName>RCR</displayName>
- <description>repetition counter register</description>
- <addressOffset>0x30</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x0000</resetValue>
- <fields>
- <field>
- <name>REP</name>
- <description>Repetition counter value</description>
- <bitOffset>0</bitOffset>
- <bitWidth>8</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>CCR1</name>
- <displayName>CCR1</displayName>
- <description>capture/compare register 1</description>
- <addressOffset>0x34</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>CCR1</name>
- <description>Capture/Compare 1 value</description>
- <bitOffset>0</bitOffset>
- <bitWidth>16</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>CCR2</name>
- <displayName>CCR2</displayName>
- <description>capture/compare register 2</description>
- <addressOffset>0x38</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>CCR2</name>
- <description>Capture/Compare 2 value</description>
- <bitOffset>0</bitOffset>
- <bitWidth>16</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>BDTR</name>
- <displayName>BDTR</displayName>
- <description>break and dead-time register</description>
- <addressOffset>0x44</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x0000</resetValue>
- <fields>
- <field>
- <name>MOE</name>
- <description>Main output enable</description>
- <bitOffset>15</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>AOE</name>
- <description>Automatic output enable</description>
- <bitOffset>14</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>BKP</name>
- <description>Break polarity</description>
- <bitOffset>13</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>BKE</name>
- <description>Break enable</description>
- <bitOffset>12</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>OSSR</name>
- <description>Off-state selection for Run
- mode</description>
- <bitOffset>11</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>OSSI</name>
- <description>Off-state selection for Idle
- mode</description>
- <bitOffset>10</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>LOCK</name>
- <description>Lock configuration</description>
- <bitOffset>8</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>DTG</name>
- <description>Dead-time generator setup</description>
- <bitOffset>0</bitOffset>
- <bitWidth>8</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>DCR</name>
- <displayName>DCR</displayName>
- <description>DMA control register</description>
- <addressOffset>0x48</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x0000</resetValue>
- <fields>
- <field>
- <name>DBL</name>
- <description>DMA burst length</description>
- <bitOffset>8</bitOffset>
- <bitWidth>5</bitWidth>
- </field>
- <field>
- <name>DBA</name>
- <description>DMA base address</description>
- <bitOffset>0</bitOffset>
- <bitWidth>5</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>DMAR</name>
- <displayName>DMAR</displayName>
- <description>DMA address for full transfer</description>
- <addressOffset>0x4C</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x0000</resetValue>
- <fields>
- <field>
- <name>DMAB</name>
- <description>DMA register for burst
- accesses</description>
- <bitOffset>0</bitOffset>
- <bitWidth>16</bitWidth>
- </field>
- </fields>
- </register>
- </registers>
- </peripheral>
- <peripheral>
- <name>TIM16</name>
- <description>General-purpose-timers</description>
- <groupName>TIM</groupName>
- <baseAddress>0x40014400</baseAddress>
- <addressBlock>
- <offset>0x0</offset>
- <size>0x400</size>
- <usage>registers</usage>
- </addressBlock>
- <interrupt>
- <name>USART2</name>
- <description>USART2 global interrupt</description>
- <value>28</value>
- </interrupt>
- <registers>
- <register>
- <name>CR1</name>
- <displayName>CR1</displayName>
- <description>control register 1</description>
- <addressOffset>0x0</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x0000</resetValue>
- <fields>
- <field>
- <name>CKD</name>
- <description>Clock division</description>
- <bitOffset>8</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>ARPE</name>
- <description>Auto-reload preload enable</description>
- <bitOffset>7</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>OPM</name>
- <description>One-pulse mode</description>
- <bitOffset>3</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>URS</name>
- <description>Update request source</description>
- <bitOffset>2</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>UDIS</name>
- <description>Update disable</description>
- <bitOffset>1</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CEN</name>
- <description>Counter enable</description>
- <bitOffset>0</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>CR2</name>
- <displayName>CR2</displayName>
- <description>control register 2</description>
- <addressOffset>0x4</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x0000</resetValue>
- <fields>
- <field>
- <name>OIS1N</name>
- <description>Output Idle state 1</description>
- <bitOffset>9</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>OIS1</name>
- <description>Output Idle state 1</description>
- <bitOffset>8</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CCDS</name>
- <description>Capture/compare DMA
- selection</description>
- <bitOffset>3</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CCUS</name>
- <description>Capture/compare control update
- selection</description>
- <bitOffset>2</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CCPC</name>
- <description>Capture/compare preloaded
- control</description>
- <bitOffset>0</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>DIER</name>
- <displayName>DIER</displayName>
- <description>DMA/Interrupt enable register</description>
- <addressOffset>0xC</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x0000</resetValue>
- <fields>
- <field>
- <name>TDE</name>
- <description>Trigger DMA request enable</description>
- <bitOffset>14</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CC1DE</name>
- <description>Capture/Compare 1 DMA request
- enable</description>
- <bitOffset>9</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>UDE</name>
- <description>Update DMA request enable</description>
- <bitOffset>8</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>BIE</name>
- <description>Break interrupt enable</description>
- <bitOffset>7</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>TIE</name>
- <description>Trigger interrupt enable</description>
- <bitOffset>6</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>COMIE</name>
- <description>COM interrupt enable</description>
- <bitOffset>5</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CC1IE</name>
- <description>Capture/Compare 1 interrupt
- enable</description>
- <bitOffset>1</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>UIE</name>
- <description>Update interrupt enable</description>
- <bitOffset>0</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>SR</name>
- <displayName>SR</displayName>
- <description>status register</description>
- <addressOffset>0x10</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x0000</resetValue>
- <fields>
- <field>
- <name>CC1OF</name>
- <description>Capture/Compare 1 overcapture
- flag</description>
- <bitOffset>9</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>BIF</name>
- <description>Break interrupt flag</description>
- <bitOffset>7</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>TIF</name>
- <description>Trigger interrupt flag</description>
- <bitOffset>6</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>COMIF</name>
- <description>COM interrupt flag</description>
- <bitOffset>5</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CC1IF</name>
- <description>Capture/compare 1 interrupt
- flag</description>
- <bitOffset>1</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>UIF</name>
- <description>Update interrupt flag</description>
- <bitOffset>0</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>EGR</name>
- <displayName>EGR</displayName>
- <description>event generation register</description>
- <addressOffset>0x14</addressOffset>
- <size>0x20</size>
- <access>write-only</access>
- <resetValue>0x0000</resetValue>
- <fields>
- <field>
- <name>BG</name>
- <description>Break generation</description>
- <bitOffset>7</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>TG</name>
- <description>Trigger generation</description>
- <bitOffset>6</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>COMG</name>
- <description>Capture/Compare control update
- generation</description>
- <bitOffset>5</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CC1G</name>
- <description>Capture/compare 1
- generation</description>
- <bitOffset>1</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>UG</name>
- <description>Update generation</description>
- <bitOffset>0</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>CCMR1_Output</name>
- <displayName>CCMR1_Output</displayName>
- <description>capture/compare mode register (output
- mode)</description>
- <addressOffset>0x18</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>OC1M</name>
- <description>Output Compare 1 mode</description>
- <bitOffset>4</bitOffset>
- <bitWidth>3</bitWidth>
- </field>
- <field>
- <name>OC1PE</name>
- <description>Output Compare 1 preload
- enable</description>
- <bitOffset>3</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>OC1FE</name>
- <description>Output Compare 1 fast
- enable</description>
- <bitOffset>2</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CC1S</name>
- <description>Capture/Compare 1
- selection</description>
- <bitOffset>0</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>CCMR1_Input</name>
- <displayName>CCMR1_Input</displayName>
- <description>capture/compare mode register 1 (input
- mode)</description>
- <alternateRegister>CCMR1_Output</alternateRegister>
- <addressOffset>0x18</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>IC1F</name>
- <description>Input capture 1 filter</description>
- <bitOffset>4</bitOffset>
- <bitWidth>4</bitWidth>
- </field>
- <field>
- <name>IC1PSC</name>
- <description>Input capture 1 prescaler</description>
- <bitOffset>2</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>CC1S</name>
- <description>Capture/Compare 1
- selection</description>
- <bitOffset>0</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>CCER</name>
- <displayName>CCER</displayName>
- <description>capture/compare enable
- register</description>
- <addressOffset>0x20</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x0000</resetValue>
- <fields>
- <field>
- <name>CC1NP</name>
- <description>Capture/Compare 1 output
- Polarity</description>
- <bitOffset>3</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CC1NE</name>
- <description>Capture/Compare 1 complementary output
- enable</description>
- <bitOffset>2</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CC1P</name>
- <description>Capture/Compare 1 output
- Polarity</description>
- <bitOffset>1</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>CC1E</name>
- <description>Capture/Compare 1 output
- enable</description>
- <bitOffset>0</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>CNT</name>
- <displayName>CNT</displayName>
- <description>counter</description>
- <addressOffset>0x24</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>CNT</name>
- <description>counter value</description>
- <bitOffset>0</bitOffset>
- <bitWidth>16</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>PSC</name>
- <displayName>PSC</displayName>
- <description>prescaler</description>
- <addressOffset>0x28</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x0000</resetValue>
- <fields>
- <field>
- <name>PSC</name>
- <description>Prescaler value</description>
- <bitOffset>0</bitOffset>
- <bitWidth>16</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>ARR</name>
- <displayName>ARR</displayName>
- <description>auto-reload register</description>
- <addressOffset>0x2C</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>ARR</name>
- <description>Auto-reload value</description>
- <bitOffset>0</bitOffset>
- <bitWidth>16</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>RCR</name>
- <displayName>RCR</displayName>
- <description>repetition counter register</description>
- <addressOffset>0x30</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x0000</resetValue>
- <fields>
- <field>
- <name>REP</name>
- <description>Repetition counter value</description>
- <bitOffset>0</bitOffset>
- <bitWidth>8</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>CCR1</name>
- <displayName>CCR1</displayName>
- <description>capture/compare register 1</description>
- <addressOffset>0x34</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>CCR1</name>
- <description>Capture/Compare 1 value</description>
- <bitOffset>0</bitOffset>
- <bitWidth>16</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>BDTR</name>
- <displayName>BDTR</displayName>
- <description>break and dead-time register</description>
- <addressOffset>0x44</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x0000</resetValue>
- <fields>
- <field>
- <name>MOE</name>
- <description>Main output enable</description>
- <bitOffset>15</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>AOE</name>
- <description>Automatic output enable</description>
- <bitOffset>14</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>BKP</name>
- <description>Break polarity</description>
- <bitOffset>13</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>BKE</name>
- <description>Break enable</description>
- <bitOffset>12</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>OSSR</name>
- <description>Off-state selection for Run
- mode</description>
- <bitOffset>11</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>OSSI</name>
- <description>Off-state selection for Idle
- mode</description>
- <bitOffset>10</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>LOCK</name>
- <description>Lock configuration</description>
- <bitOffset>8</bitOffset>
- <bitWidth>2</bitWidth>
- </field>
- <field>
- <name>DTG</name>
- <description>Dead-time generator setup</description>
- <bitOffset>0</bitOffset>
- <bitWidth>8</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>DCR</name>
- <displayName>DCR</displayName>
- <description>DMA control register</description>
- <addressOffset>0x48</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x0000</resetValue>
- <fields>
- <field>
- <name>DBL</name>
- <description>DMA burst length</description>
- <bitOffset>8</bitOffset>
- <bitWidth>5</bitWidth>
- </field>
- <field>
- <name>DBA</name>
- <description>DMA base address</description>
- <bitOffset>0</bitOffset>
- <bitWidth>5</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>DMAR</name>
- <displayName>DMAR</displayName>
- <description>DMA address for full transfer</description>
- <addressOffset>0x4C</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x0000</resetValue>
- <fields>
- <field>
- <name>DMAB</name>
- <description>DMA register for burst
- accesses</description>
- <bitOffset>0</bitOffset>
- <bitWidth>16</bitWidth>
- </field>
- </fields>
- </register>
- </registers>
- </peripheral>
- <peripheral derivedFrom="TIM16">
- <name>TIM17</name>
- <baseAddress>0x40014800</baseAddress>
- <interrupt>
- <name>USART3_4</name>
- <description>USART3 and USART4 global
- interrupt</description>
- <value>29</value>
- </interrupt>
- </peripheral>
- <peripheral>
- <name>Flash</name>
- <description>Flash</description>
- <groupName>Flash</groupName>
- <baseAddress>0x40022000</baseAddress>
- <addressBlock>
- <offset>0x0</offset>
- <size>0x400</size>
- <usage>registers</usage>
- </addressBlock>
- <interrupt>
- <name>USART3_4</name>
- <description>USART3 and USART4 global
- interrupt</description>
- <value>29</value>
- </interrupt>
- <registers>
- <register>
- <name>ACR</name>
- <displayName>ACR</displayName>
- <description>Flash access control register</description>
- <addressOffset>0x0</addressOffset>
- <size>0x20</size>
- <resetValue>0x00000030</resetValue>
- <fields>
- <field>
- <name>LATENCY</name>
- <description>LATENCY</description>
- <bitOffset>0</bitOffset>
- <bitWidth>3</bitWidth>
- <access>read-write</access>
- </field>
- <field>
- <name>PRFTBE</name>
- <description>PRFTBE</description>
- <bitOffset>4</bitOffset>
- <bitWidth>1</bitWidth>
- <access>read-write</access>
- </field>
- <field>
- <name>PRFTBS</name>
- <description>PRFTBS</description>
- <bitOffset>5</bitOffset>
- <bitWidth>1</bitWidth>
- <access>read-only</access>
- </field>
- </fields>
- </register>
- <register>
- <name>KEYR</name>
- <displayName>KEYR</displayName>
- <description>Flash key register</description>
- <addressOffset>0x4</addressOffset>
- <size>0x20</size>
- <access>write-only</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>FKEYR</name>
- <description>Flash Key</description>
- <bitOffset>0</bitOffset>
- <bitWidth>32</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>OPTKEYR</name>
- <displayName>OPTKEYR</displayName>
- <description>Flash option key register</description>
- <addressOffset>0x8</addressOffset>
- <size>0x20</size>
- <access>write-only</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>OPTKEYR</name>
- <description>Option byte key</description>
- <bitOffset>0</bitOffset>
- <bitWidth>32</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>SR</name>
- <displayName>SR</displayName>
- <description>Flash status register</description>
- <addressOffset>0xC</addressOffset>
- <size>0x20</size>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>EOP</name>
- <description>End of operation</description>
- <bitOffset>5</bitOffset>
- <bitWidth>1</bitWidth>
- <access>read-write</access>
- </field>
- <field>
- <name>WRPRT</name>
- <description>Write protection error</description>
- <bitOffset>4</bitOffset>
- <bitWidth>1</bitWidth>
- <access>read-write</access>
- </field>
- <field>
- <name>PGERR</name>
- <description>Programming error</description>
- <bitOffset>2</bitOffset>
- <bitWidth>1</bitWidth>
- <access>read-write</access>
- </field>
- <field>
- <name>BSY</name>
- <description>Busy</description>
- <bitOffset>0</bitOffset>
- <bitWidth>1</bitWidth>
- <access>read-only</access>
- </field>
- </fields>
- </register>
- <register>
- <name>CR</name>
- <displayName>CR</displayName>
- <description>Flash control register</description>
- <addressOffset>0x10</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x00000080</resetValue>
- <fields>
- <field>
- <name>FORCE_OPTLOAD</name>
- <description>Force option byte loading</description>
- <bitOffset>13</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>EOPIE</name>
- <description>End of operation interrupt
- enable</description>
- <bitOffset>12</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>ERRIE</name>
- <description>Error interrupt enable</description>
- <bitOffset>10</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>OPTWRE</name>
- <description>Option bytes write enable</description>
- <bitOffset>9</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>LOCK</name>
- <description>Lock</description>
- <bitOffset>7</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>STRT</name>
- <description>Start</description>
- <bitOffset>6</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>OPTER</name>
- <description>Option byte erase</description>
- <bitOffset>5</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>OPTPG</name>
- <description>Option byte programming</description>
- <bitOffset>4</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>MER</name>
- <description>Mass erase</description>
- <bitOffset>2</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>PER</name>
- <description>Page erase</description>
- <bitOffset>1</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>PG</name>
- <description>Programming</description>
- <bitOffset>0</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>AR</name>
- <displayName>AR</displayName>
- <description>Flash address register</description>
- <addressOffset>0x14</addressOffset>
- <size>0x20</size>
- <access>write-only</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>FAR</name>
- <description>Flash address</description>
- <bitOffset>0</bitOffset>
- <bitWidth>32</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>OBR</name>
- <displayName>OBR</displayName>
- <description>Option byte register</description>
- <addressOffset>0x1C</addressOffset>
- <size>0x20</size>
- <access>read-only</access>
- <resetValue>0x03FFFFF2</resetValue>
- <fields>
- <field>
- <name>Data1</name>
- <description>Data1</description>
- <bitOffset>24</bitOffset>
- <bitWidth>8</bitWidth>
- </field>
- <field>
- <name>Data0</name>
- <description>Data0</description>
- <bitOffset>16</bitOffset>
- <bitWidth>8</bitWidth>
- </field>
- <field>
- <name>VDDA_MONITOR</name>
- <description>VDDA_MONITOR</description>
- <bitOffset>13</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>BOOT1</name>
- <description>BOOT1</description>
- <bitOffset>12</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>nRST_STDBY</name>
- <description>nRST_STDBY</description>
- <bitOffset>10</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>nRST_STOP</name>
- <description>nRST_STOP</description>
- <bitOffset>9</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>WDG_SW</name>
- <description>WDG_SW</description>
- <bitOffset>8</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>LEVEL2_PROT</name>
- <description>Level 2 protection status</description>
- <bitOffset>2</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>LEVEL1_PROT</name>
- <description>Level 1 protection status</description>
- <bitOffset>1</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>OPTERR</name>
- <description>Option byte error</description>
- <bitOffset>0</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>WRPR</name>
- <displayName>WRPR</displayName>
- <description>Write protection register</description>
- <addressOffset>0x20</addressOffset>
- <size>0x20</size>
- <access>read-only</access>
- <resetValue>0xFFFFFFFF</resetValue>
- <fields>
- <field>
- <name>WRP</name>
- <description>Write protect</description>
- <bitOffset>0</bitOffset>
- <bitWidth>32</bitWidth>
- </field>
- </fields>
- </register>
- </registers>
- </peripheral>
- <peripheral>
- <name>DBGMCU</name>
- <description>Debug support</description>
- <groupName>DBGMCU</groupName>
- <baseAddress>0x40015800</baseAddress>
- <addressBlock>
- <offset>0x0</offset>
- <size>0x400</size>
- <usage>registers</usage>
- </addressBlock>
- <interrupt>
- <name>ADC_COMP</name>
- <description>ADC and comparator interrupts</description>
- <value>12</value>
- </interrupt>
- <registers>
- <register>
- <name>IDCODE</name>
- <displayName>IDCODE</displayName>
- <description>MCU Device ID Code Register</description>
- <addressOffset>0x0</addressOffset>
- <size>0x20</size>
- <access>read-only</access>
- <resetValue>0x0</resetValue>
- <fields>
- <field>
- <name>DEV_ID</name>
- <description>Device Identifier</description>
- <bitOffset>0</bitOffset>
- <bitWidth>12</bitWidth>
- </field>
- <field>
- <name>DIV_ID</name>
- <description>Division Identifier</description>
- <bitOffset>12</bitOffset>
- <bitWidth>4</bitWidth>
- </field>
- <field>
- <name>REV_ID</name>
- <description>Revision Identifier</description>
- <bitOffset>16</bitOffset>
- <bitWidth>16</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>CR</name>
- <displayName>CR</displayName>
- <description>Debug MCU Configuration
- Register</description>
- <addressOffset>0x4</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x0</resetValue>
- <fields>
- <field>
- <name>DBG_STOP</name>
- <description>Debug Stop Mode</description>
- <bitOffset>1</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>DBG_STANDBY</name>
- <description>Debug Standby Mode</description>
- <bitOffset>2</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>APBLFZ</name>
- <displayName>APBLFZ</displayName>
- <description>APB Low Freeze Register</description>
- <addressOffset>0x8</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x0</resetValue>
- <fields>
- <field>
- <name>DBG_TIMER2_STOP</name>
- <description>Debug Timer 2 stopped when Core is
- halted</description>
- <bitOffset>0</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>DBG_TIMER3_STOP</name>
- <description>Debug Timer 3 stopped when Core is
- halted</description>
- <bitOffset>1</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>DBG_TIMER6_STOP</name>
- <description>Debug Timer 6 stopped when Core is
- halted</description>
- <bitOffset>4</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>DBG_TIMER14_STOP</name>
- <description>Debug Timer 14 stopped when Core is
- halted</description>
- <bitOffset>8</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>DBG_RTC_STOP</name>
- <description>Debug RTC stopped when Core is
- halted</description>
- <bitOffset>10</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>DBG_WWDG_STOP</name>
- <description>Debug Window Wachdog stopped when Core
- is halted</description>
- <bitOffset>11</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>DBG_IWDG_STOP</name>
- <description>Debug Independent Wachdog stopped when
- Core is halted</description>
- <bitOffset>12</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>I2C1_SMBUS_TIMEOUT</name>
- <description>SMBUS timeout mode stopped when Core is
- halted</description>
- <bitOffset>21</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- </fields>
- </register>
- <register>
- <name>APBHFZ</name>
- <displayName>APBHFZ</displayName>
- <description>APB High Freeze Register</description>
- <addressOffset>0xC</addressOffset>
- <size>0x20</size>
- <access>read-write</access>
- <resetValue>0x0</resetValue>
- <fields>
- <field>
- <name>DBG_TIMER1_STOP</name>
- <description>Debug Timer 1 stopped when Core is
- halted</description>
- <bitOffset>11</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>DBG_TIMER15_STO</name>
- <description>Debug Timer 15 stopped when Core is
- halted</description>
- <bitOffset>16</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>DBG_TIMER16_STO</name>
- <description>Debug Timer 16 stopped when Core is
- halted</description>
- <bitOffset>17</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- <field>
- <name>DBG_TIMER17_STO</name>
- <description>Debug Timer 17 stopped when Core is
- halted</description>
- <bitOffset>18</bitOffset>
- <bitWidth>1</bitWidth>
- </field>
- </fields>
- </register>
- </registers>
- </peripheral>
- </peripherals>
- </device>
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