stm8s_adc1.h 14 KB

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  1. /**
  2. ******************************************************************************
  3. * @file stm8s_adc1.h
  4. * @author MCD Application Team
  5. * @version V2.2.0
  6. * @date 30-September-2014
  7. * @brief This file contains all the prototypes/macros for the ADC1 peripheral.
  8. ******************************************************************************
  9. * @attention
  10. *
  11. * <h2><center>&copy; COPYRIGHT 2014 STMicroelectronics</center></h2>
  12. *
  13. * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
  14. * You may not use this file except in compliance with the License.
  15. * You may obtain a copy of the License at:
  16. *
  17. * http://www.st.com/software_license_agreement_liberty_v2
  18. *
  19. * Unless required by applicable law or agreed to in writing, software
  20. * distributed under the License is distributed on an "AS IS" BASIS,
  21. * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  22. * See the License for the specific language governing permissions and
  23. * limitations under the License.
  24. *
  25. ******************************************************************************
  26. */
  27. /* Define to prevent recursive inclusion -------------------------------------*/
  28. #ifndef __STM8S_ADC1_H
  29. #define __STM8S_ADC1_H
  30. /* Includes ------------------------------------------------------------------*/
  31. #include "stm8s.h"
  32. /* Exported types ------------------------------------------------------------*/
  33. /** @addtogroup ADC1_Exported_Types
  34. * @{
  35. */
  36. /**
  37. * @brief ADC1 clock prescaler selection
  38. */
  39. typedef enum
  40. {
  41. ADC1_PRESSEL_FCPU_D2 = (uint8_t)0x00, /**< Prescaler selection fADC1 = fcpu/2 */
  42. ADC1_PRESSEL_FCPU_D3 = (uint8_t)0x10, /**< Prescaler selection fADC1 = fcpu/3 */
  43. ADC1_PRESSEL_FCPU_D4 = (uint8_t)0x20, /**< Prescaler selection fADC1 = fcpu/4 */
  44. ADC1_PRESSEL_FCPU_D6 = (uint8_t)0x30, /**< Prescaler selection fADC1 = fcpu/6 */
  45. ADC1_PRESSEL_FCPU_D8 = (uint8_t)0x40, /**< Prescaler selection fADC1 = fcpu/8 */
  46. ADC1_PRESSEL_FCPU_D10 = (uint8_t)0x50, /**< Prescaler selection fADC1 = fcpu/10 */
  47. ADC1_PRESSEL_FCPU_D12 = (uint8_t)0x60, /**< Prescaler selection fADC1 = fcpu/12 */
  48. ADC1_PRESSEL_FCPU_D18 = (uint8_t)0x70 /**< Prescaler selection fADC1 = fcpu/18 */
  49. } ADC1_PresSel_TypeDef;
  50. /**
  51. * @brief ADC1 External conversion trigger event selection
  52. */
  53. typedef enum
  54. {
  55. ADC1_EXTTRIG_TIM = (uint8_t)0x00, /**< Conversion from Internal TIM1 TRGO event */
  56. ADC1_EXTTRIG_GPIO = (uint8_t)0x10 /**< Conversion from External interrupt on ADC_ETR pin*/
  57. } ADC1_ExtTrig_TypeDef;
  58. /**
  59. * @brief ADC1 data alignment
  60. */
  61. typedef enum
  62. {
  63. ADC1_ALIGN_LEFT = (uint8_t)0x00, /**< Data alignment left */
  64. ADC1_ALIGN_RIGHT = (uint8_t)0x08 /**< Data alignment right */
  65. } ADC1_Align_TypeDef;
  66. /**
  67. * @brief ADC1 Interrupt source
  68. */
  69. typedef enum
  70. {
  71. ADC1_IT_AWDIE = (uint16_t)0x010, /**< Analog WDG interrupt enable */
  72. ADC1_IT_EOCIE = (uint16_t)0x020, /**< EOC interrupt enable */
  73. ADC1_IT_AWD = (uint16_t)0x140, /**< Analog WDG status */
  74. ADC1_IT_AWS0 = (uint16_t)0x110, /**< Analog channel 0 status */
  75. ADC1_IT_AWS1 = (uint16_t)0x111, /**< Analog channel 1 status */
  76. ADC1_IT_AWS2 = (uint16_t)0x112, /**< Analog channel 2 status */
  77. ADC1_IT_AWS3 = (uint16_t)0x113, /**< Analog channel 3 status */
  78. ADC1_IT_AWS4 = (uint16_t)0x114, /**< Analog channel 4 status */
  79. ADC1_IT_AWS5 = (uint16_t)0x115, /**< Analog channel 5 status */
  80. ADC1_IT_AWS6 = (uint16_t)0x116, /**< Analog channel 6 status */
  81. ADC1_IT_AWS7 = (uint16_t)0x117, /**< Analog channel 7 status */
  82. ADC1_IT_AWS8 = (uint16_t)0x118, /**< Analog channel 8 status */
  83. ADC1_IT_AWS9 = (uint16_t)0x119, /**< Analog channel 9 status */
  84. ADC1_IT_AWS12 = (uint16_t)0x11C, /**< Analog channel 12 status */
  85. /* refer to product datasheet for channel 12 availability */
  86. ADC1_IT_EOC = (uint16_t)0x080 /**< EOC pending bit */
  87. } ADC1_IT_TypeDef;
  88. /**
  89. * @brief ADC1 Flags
  90. */
  91. typedef enum
  92. {
  93. ADC1_FLAG_OVR = (uint8_t)0x41, /**< Overrun status flag */
  94. ADC1_FLAG_AWD = (uint8_t)0x40, /**< Analog WDG status */
  95. ADC1_FLAG_AWS0 = (uint8_t)0x10, /**< Analog channel 0 status */
  96. ADC1_FLAG_AWS1 = (uint8_t)0x11, /**< Analog channel 1 status */
  97. ADC1_FLAG_AWS2 = (uint8_t)0x12, /**< Analog channel 2 status */
  98. ADC1_FLAG_AWS3 = (uint8_t)0x13, /**< Analog channel 3 status */
  99. ADC1_FLAG_AWS4 = (uint8_t)0x14, /**< Analog channel 4 status */
  100. ADC1_FLAG_AWS5 = (uint8_t)0x15, /**< Analog channel 5 status */
  101. ADC1_FLAG_AWS6 = (uint8_t)0x16, /**< Analog channel 6 status */
  102. ADC1_FLAG_AWS7 = (uint8_t)0x17, /**< Analog channel 7 status */
  103. ADC1_FLAG_AWS8 = (uint8_t)0x18, /**< Analog channel 8 status*/
  104. ADC1_FLAG_AWS9 = (uint8_t)0x19, /**< Analog channel 9 status */
  105. ADC1_FLAG_AWS12 = (uint8_t)0x1C, /**< Analog channel 12 status */
  106. /* refer to product datasheet for channel 12 availability */
  107. ADC1_FLAG_EOC = (uint8_t)0x80 /**< EOC falg */
  108. }ADC1_Flag_TypeDef;
  109. /**
  110. * @brief ADC1 schmitt Trigger
  111. */
  112. typedef enum
  113. {
  114. ADC1_SCHMITTTRIG_CHANNEL0 = (uint8_t)0x00, /**< Schmitt trigger disable on AIN0 */
  115. ADC1_SCHMITTTRIG_CHANNEL1 = (uint8_t)0x01, /**< Schmitt trigger disable on AIN1 */
  116. ADC1_SCHMITTTRIG_CHANNEL2 = (uint8_t)0x02, /**< Schmitt trigger disable on AIN2 */
  117. ADC1_SCHMITTTRIG_CHANNEL3 = (uint8_t)0x03, /**< Schmitt trigger disable on AIN3 */
  118. ADC1_SCHMITTTRIG_CHANNEL4 = (uint8_t)0x04, /**< Schmitt trigger disable on AIN4 */
  119. ADC1_SCHMITTTRIG_CHANNEL5 = (uint8_t)0x05, /**< Schmitt trigger disable on AIN5 */
  120. ADC1_SCHMITTTRIG_CHANNEL6 = (uint8_t)0x06, /**< Schmitt trigger disable on AIN6 */
  121. ADC1_SCHMITTTRIG_CHANNEL7 = (uint8_t)0x07, /**< Schmitt trigger disable on AIN7 */
  122. ADC1_SCHMITTTRIG_CHANNEL8 = (uint8_t)0x08, /**< Schmitt trigger disable on AIN8 */
  123. ADC1_SCHMITTTRIG_CHANNEL9 = (uint8_t)0x09, /**< Schmitt trigger disable on AIN9 */
  124. ADC1_SCHMITTTRIG_CHANNEL12 = (uint8_t)0x0C, /**< Schmitt trigger disable on AIN12 */
  125. /* refer to product datasheet for channel 12 availability */
  126. ADC1_SCHMITTTRIG_ALL = (uint8_t)0xFF /**< Schmitt trigger disable on All channels */
  127. } ADC1_SchmittTrigg_TypeDef;
  128. /**
  129. * @brief ADC1 conversion mode selection
  130. */
  131. typedef enum
  132. {
  133. ADC1_CONVERSIONMODE_SINGLE = (uint8_t)0x00, /**< Single conversion mode */
  134. ADC1_CONVERSIONMODE_CONTINUOUS = (uint8_t)0x01 /**< Continuous conversion mode */
  135. } ADC1_ConvMode_TypeDef;
  136. /**
  137. * @brief ADC1 analog channel selection
  138. */
  139. typedef enum
  140. {
  141. ADC1_CHANNEL_0 = (uint8_t)0x00, /**< Analog channel 0 */
  142. ADC1_CHANNEL_1 = (uint8_t)0x01, /**< Analog channel 1 */
  143. ADC1_CHANNEL_2 = (uint8_t)0x02, /**< Analog channel 2 */
  144. ADC1_CHANNEL_3 = (uint8_t)0x03, /**< Analog channel 3 */
  145. ADC1_CHANNEL_4 = (uint8_t)0x04, /**< Analog channel 4 */
  146. ADC1_CHANNEL_5 = (uint8_t)0x05, /**< Analog channel 5 */
  147. ADC1_CHANNEL_6 = (uint8_t)0x06, /**< Analog channel 6 */
  148. ADC1_CHANNEL_7 = (uint8_t)0x07, /**< Analog channel 7 */
  149. ADC1_CHANNEL_8 = (uint8_t)0x08, /**< Analog channel 8 */
  150. ADC1_CHANNEL_9 = (uint8_t)0x09, /**< Analog channel 9 */
  151. ADC1_CHANNEL_12 = (uint8_t)0x0C /**< Analog channel 12 */
  152. /* refer to product datasheet for channel 12 availability */
  153. } ADC1_Channel_TypeDef;
  154. /**
  155. * @}
  156. */
  157. /* Exported constants --------------------------------------------------------*/
  158. /* Exported macros ------------------------------------------------------------*/
  159. /* Private macros ------------------------------------------------------------*/
  160. /** @addtogroup ADC1_Private_Macros
  161. * @brief Macros used by the assert function to check the different functions parameters.
  162. * @{
  163. */
  164. /**
  165. * @brief Macro used by the assert function to check the different prescaler's values.
  166. */
  167. #define IS_ADC1_PRESSEL_OK(PRESCALER) (((PRESCALER) == ADC1_PRESSEL_FCPU_D2) || \
  168. ((PRESCALER) == ADC1_PRESSEL_FCPU_D3) || \
  169. ((PRESCALER) == ADC1_PRESSEL_FCPU_D4) || \
  170. ((PRESCALER) == ADC1_PRESSEL_FCPU_D6) || \
  171. ((PRESCALER) == ADC1_PRESSEL_FCPU_D8) || \
  172. ((PRESCALER) == ADC1_PRESSEL_FCPU_D10) || \
  173. ((PRESCALER) == ADC1_PRESSEL_FCPU_D12) || \
  174. ((PRESCALER) == ADC1_PRESSEL_FCPU_D18))
  175. /**
  176. * @brief Macro used by the assert function to check the different external trigger values.
  177. */
  178. #define IS_ADC1_EXTTRIG_OK(EXTRIG) (((EXTRIG) == ADC1_EXTTRIG_TIM) || \
  179. ((EXTRIG) == ADC1_EXTTRIG_GPIO))
  180. /**
  181. * @brief Macro used by the assert function to check the different alignment modes.
  182. */
  183. #define IS_ADC1_ALIGN_OK(ALIGN) (((ALIGN) == ADC1_ALIGN_LEFT) || \
  184. ((ALIGN) == ADC1_ALIGN_RIGHT))
  185. /**
  186. * @brief Macro used by the assert function to check the Interrupt source.
  187. */
  188. #define IS_ADC1_IT_OK(IT) (((IT) == ADC1_IT_EOCIE) || \
  189. ((IT) == ADC1_IT_AWDIE))
  190. /**
  191. * @brief Macro used by the assert function to check the ADC1 Flag.
  192. */
  193. #define IS_ADC1_FLAG_OK(FLAG) (((FLAG) == ADC1_FLAG_EOC)|| \
  194. ((FLAG) == ADC1_FLAG_OVR) || \
  195. ((FLAG) == ADC1_FLAG_AWD) || \
  196. ((FLAG) == ADC1_FLAG_AWS0) || \
  197. ((FLAG) == ADC1_FLAG_AWS1) || \
  198. ((FLAG) == ADC1_FLAG_AWS2) || \
  199. ((FLAG) == ADC1_FLAG_AWS3) || \
  200. ((FLAG) == ADC1_FLAG_AWS4) || \
  201. ((FLAG) == ADC1_FLAG_AWS5) || \
  202. ((FLAG) == ADC1_FLAG_AWS6) || \
  203. ((FLAG) == ADC1_FLAG_AWS7) || \
  204. ((FLAG) == ADC1_FLAG_AWS8) || \
  205. ((FLAG) == ADC1_FLAG_AWS9))
  206. /**
  207. * @brief Macro used by the assert function to check the ADC1 pending bits.
  208. */
  209. #define IS_ADC1_ITPENDINGBIT_OK(ITPENDINGBIT) (((ITPENDINGBIT) == ADC1_IT_EOC) || \
  210. ((ITPENDINGBIT) == ADC1_IT_AWD) || \
  211. ((ITPENDINGBIT) == ADC1_IT_AWS0) || \
  212. ((ITPENDINGBIT) == ADC1_IT_AWS1) || \
  213. ((ITPENDINGBIT) == ADC1_IT_AWS2) || \
  214. ((ITPENDINGBIT) == ADC1_IT_AWS3) || \
  215. ((ITPENDINGBIT) == ADC1_IT_AWS4) || \
  216. ((ITPENDINGBIT) == ADC1_IT_AWS5) || \
  217. ((ITPENDINGBIT) == ADC1_IT_AWS6) || \
  218. ((ITPENDINGBIT) == ADC1_IT_AWS7) || \
  219. ((ITPENDINGBIT) == ADC1_IT_AWS8) || \
  220. ((ITPENDINGBIT) == ADC1_IT_AWS12) || \
  221. ((ITPENDINGBIT) == ADC1_IT_AWS9))
  222. /**
  223. * @brief Macro used by the assert function to check the different schmitt trigger values.
  224. */
  225. #define IS_ADC1_SCHMITTTRIG_OK(SCHMITTTRIG) (((SCHMITTTRIG) == ADC1_SCHMITTTRIG_CHANNEL0) || \
  226. ((SCHMITTTRIG) == ADC1_SCHMITTTRIG_CHANNEL1) || \
  227. ((SCHMITTTRIG) == ADC1_SCHMITTTRIG_CHANNEL2) || \
  228. ((SCHMITTTRIG) == ADC1_SCHMITTTRIG_CHANNEL3) || \
  229. ((SCHMITTTRIG) == ADC1_SCHMITTTRIG_CHANNEL4) || \
  230. ((SCHMITTTRIG) == ADC1_SCHMITTTRIG_CHANNEL5) || \
  231. ((SCHMITTTRIG) == ADC1_SCHMITTTRIG_CHANNEL6) || \
  232. ((SCHMITTTRIG) == ADC1_SCHMITTTRIG_CHANNEL7) || \
  233. ((SCHMITTTRIG) == ADC1_SCHMITTTRIG_CHANNEL8) || \
  234. ((SCHMITTTRIG) == ADC1_SCHMITTTRIG_CHANNEL12) || \
  235. ((SCHMITTTRIG) == ADC1_SCHMITTTRIG_ALL) || \
  236. ((SCHMITTTRIG) == ADC1_SCHMITTTRIG_CHANNEL9))
  237. /**
  238. * @brief Macro used by the assert function to check the different conversion modes.
  239. */
  240. #define IS_ADC1_CONVERSIONMODE_OK(MODE) (((MODE) == ADC1_CONVERSIONMODE_SINGLE) || \
  241. ((MODE) == ADC1_CONVERSIONMODE_CONTINUOUS))
  242. /**
  243. * @brief Macro used by the assert function to check the different channels values.
  244. */
  245. #define IS_ADC1_CHANNEL_OK(CHANNEL) (((CHANNEL) == ADC1_CHANNEL_0) || \
  246. ((CHANNEL) == ADC1_CHANNEL_1) || \
  247. ((CHANNEL) == ADC1_CHANNEL_2) || \
  248. ((CHANNEL) == ADC1_CHANNEL_3) || \
  249. ((CHANNEL) == ADC1_CHANNEL_4) || \
  250. ((CHANNEL) == ADC1_CHANNEL_5) || \
  251. ((CHANNEL) == ADC1_CHANNEL_6) || \
  252. ((CHANNEL) == ADC1_CHANNEL_7) || \
  253. ((CHANNEL) == ADC1_CHANNEL_8) || \
  254. ((CHANNEL) == ADC1_CHANNEL_12) || \
  255. ((CHANNEL) == ADC1_CHANNEL_9))
  256. /**
  257. * @brief Macro used by the assert function to check the possible buffer values.
  258. */
  259. #define IS_ADC1_BUFFER_OK(BUFFER) ((BUFFER) <= (uint8_t)0x09)
  260. /**
  261. * @}
  262. */
  263. /* Exported functions ------------------------------------------------------- */
  264. /** @addtogroup ADC1_Exported_Functions
  265. * @{
  266. */
  267. void ADC1_DeInit(void);
  268. void ADC1_Init(ADC1_ConvMode_TypeDef ADC1_ConversionMode,
  269. ADC1_Channel_TypeDef ADC1_Channel,
  270. ADC1_PresSel_TypeDef ADC1_PrescalerSelection,
  271. ADC1_ExtTrig_TypeDef ADC1_ExtTrigger,
  272. FunctionalState ADC1_ExtTriggerState, ADC1_Align_TypeDef ADC1_Align,
  273. ADC1_SchmittTrigg_TypeDef ADC1_SchmittTriggerChannel,
  274. FunctionalState ADC1_SchmittTriggerState);
  275. void ADC1_Cmd(FunctionalState NewState);
  276. void ADC1_ScanModeCmd(FunctionalState NewState);
  277. void ADC1_DataBufferCmd(FunctionalState NewState);
  278. void ADC1_ITConfig(ADC1_IT_TypeDef ADC1_IT, FunctionalState NewState);
  279. void ADC1_PrescalerConfig(ADC1_PresSel_TypeDef ADC1_Prescaler);
  280. void ADC1_SchmittTriggerConfig(ADC1_SchmittTrigg_TypeDef ADC1_SchmittTriggerChannel,
  281. FunctionalState NewState);
  282. void ADC1_ConversionConfig(ADC1_ConvMode_TypeDef ADC1_ConversionMode,
  283. ADC1_Channel_TypeDef ADC1_Channel,
  284. ADC1_Align_TypeDef ADC1_Align);
  285. void ADC1_ExternalTriggerConfig(ADC1_ExtTrig_TypeDef ADC1_ExtTrigger, FunctionalState NewState);
  286. void ADC1_AWDChannelConfig(ADC1_Channel_TypeDef Channel, FunctionalState NewState);
  287. void ADC1_StartConversion(void);
  288. uint16_t ADC1_GetConversionValue(void);
  289. void ADC1_SetHighThreshold(uint16_t Threshold);
  290. void ADC1_SetLowThreshold(uint16_t Threshold);
  291. uint16_t ADC1_GetBufferValue(uint8_t Buffer);
  292. FlagStatus ADC1_GetAWDChannelStatus(ADC1_Channel_TypeDef Channel);
  293. FlagStatus ADC1_GetFlagStatus(ADC1_Flag_TypeDef Flag);
  294. void ADC1_ClearFlag(ADC1_Flag_TypeDef Flag);
  295. ITStatus ADC1_GetITStatus(ADC1_IT_TypeDef ITPendingBit);
  296. void ADC1_ClearITPendingBit(ADC1_IT_TypeDef ITPendingBit);
  297. /**
  298. * @}
  299. */
  300. #endif /* __STM8S_ADC1_H */
  301. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/