stm8s_uart1.c 24 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800
  1. /**
  2. ********************************************************************************
  3. * @file stm8s_uart1.c
  4. * @author MCD Application Team
  5. * @version V2.2.0
  6. * @date 30-September-2014
  7. * @brief This file contains all the functions for the UART1 peripheral.
  8. ******************************************************************************
  9. * @attention
  10. *
  11. * <h2><center>&copy; COPYRIGHT 2014 STMicroelectronics</center></h2>
  12. *
  13. * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
  14. * You may not use this file except in compliance with the License.
  15. * You may obtain a copy of the License at:
  16. *
  17. * http://www.st.com/software_license_agreement_liberty_v2
  18. *
  19. * Unless required by applicable law or agreed to in writing, software
  20. * distributed under the License is distributed on an "AS IS" BASIS,
  21. * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  22. * See the License for the specific language governing permissions and
  23. * limitations under the License.
  24. *
  25. ******************************************************************************
  26. */
  27. /* Includes ------------------------------------------------------------------*/
  28. #include "stm8s_uart1.h"
  29. /** @addtogroup STM8S_StdPeriph_Driver
  30. * @{
  31. */
  32. /* Private typedef -----------------------------------------------------------*/
  33. /* Private define ------------------------------------------------------------*/
  34. /* Private macro -------------------------------------------------------------*/
  35. /* Private variables ---------------------------------------------------------*/
  36. /* Private function prototypes -----------------------------------------------*/
  37. /* Private functions ---------------------------------------------------------*/
  38. /* Public functions ----------------------------------------------------------*/
  39. /** @}
  40. * @addtogroup UART1_Public_Functions
  41. * @{
  42. */
  43. /**
  44. * @brief Deinitializes the UART peripheral.
  45. * @param None
  46. * @retval None
  47. */
  48. void UART1_DeInit(void)
  49. {
  50. /* Clear the Idle Line Detected bit in the status register by a read
  51. to the UART1_SR register followed by a Read to the UART1_DR register */
  52. (void)UART1->SR;
  53. (void)UART1->DR;
  54. UART1->BRR2 = UART1_BRR2_RESET_VALUE; /* Set UART1_BRR2 to reset value 0x00 */
  55. UART1->BRR1 = UART1_BRR1_RESET_VALUE; /* Set UART1_BRR1 to reset value 0x00 */
  56. UART1->CR1 = UART1_CR1_RESET_VALUE; /* Set UART1_CR1 to reset value 0x00 */
  57. UART1->CR2 = UART1_CR2_RESET_VALUE; /* Set UART1_CR2 to reset value 0x00 */
  58. UART1->CR3 = UART1_CR3_RESET_VALUE; /* Set UART1_CR3 to reset value 0x00 */
  59. UART1->CR4 = UART1_CR4_RESET_VALUE; /* Set UART1_CR4 to reset value 0x00 */
  60. UART1->CR5 = UART1_CR5_RESET_VALUE; /* Set UART1_CR5 to reset value 0x00 */
  61. UART1->GTR = UART1_GTR_RESET_VALUE;
  62. UART1->PSCR = UART1_PSCR_RESET_VALUE;
  63. }
  64. /**
  65. * @brief Initializes the UART1 according to the specified parameters.
  66. * @note Configure in Push Pull or Open Drain mode the Tx pin by setting the
  67. * correct I/O Port register according the product package and line
  68. * configuration
  69. * @param BaudRate: The baudrate.
  70. * @param WordLength : This parameter can be any of the
  71. * @ref UART1_WordLength_TypeDef enumeration.
  72. * @param StopBits: This parameter can be any of the
  73. * @ref UART1_StopBits_TypeDef enumeration.
  74. * @param Parity: This parameter can be any of the
  75. * @ref UART1_Parity_TypeDef enumeration.
  76. * @param SyncMode: This parameter can be any of the
  77. * @ref UART1_SyncMode_TypeDef values.
  78. * @param Mode: This parameter can be any of the @ref UART1_Mode_TypeDef values
  79. * @retval None
  80. */
  81. void UART1_Init(uint32_t BaudRate, UART1_WordLength_TypeDef WordLength,
  82. UART1_StopBits_TypeDef StopBits, UART1_Parity_TypeDef Parity,
  83. UART1_SyncMode_TypeDef SyncMode, UART1_Mode_TypeDef Mode)
  84. {
  85. uint32_t BaudRate_Mantissa = 0, BaudRate_Mantissa100 = 0;
  86. /* Check the parameters */
  87. assert_param(IS_UART1_BAUDRATE_OK(BaudRate));
  88. assert_param(IS_UART1_WORDLENGTH_OK(WordLength));
  89. assert_param(IS_UART1_STOPBITS_OK(StopBits));
  90. assert_param(IS_UART1_PARITY_OK(Parity));
  91. assert_param(IS_UART1_MODE_OK((uint8_t)Mode));
  92. assert_param(IS_UART1_SYNCMODE_OK((uint8_t)SyncMode));
  93. /* Clear the word length bit */
  94. UART1->CR1 &= (uint8_t)(~UART1_CR1_M);
  95. /* Set the word length bit according to UART1_WordLength value */
  96. UART1->CR1 |= (uint8_t)WordLength;
  97. /* Clear the STOP bits */
  98. UART1->CR3 &= (uint8_t)(~UART1_CR3_STOP);
  99. /* Set the STOP bits number according to UART1_StopBits value */
  100. UART1->CR3 |= (uint8_t)StopBits;
  101. /* Clear the Parity Control bit */
  102. UART1->CR1 &= (uint8_t)(~(UART1_CR1_PCEN | UART1_CR1_PS ));
  103. /* Set the Parity Control bit to UART1_Parity value */
  104. UART1->CR1 |= (uint8_t)Parity;
  105. /* Clear the LSB mantissa of UART1DIV */
  106. UART1->BRR1 &= (uint8_t)(~UART1_BRR1_DIVM);
  107. /* Clear the MSB mantissa of UART1DIV */
  108. UART1->BRR2 &= (uint8_t)(~UART1_BRR2_DIVM);
  109. /* Clear the Fraction bits of UART1DIV */
  110. UART1->BRR2 &= (uint8_t)(~UART1_BRR2_DIVF);
  111. /* Set the UART1 BaudRates in BRR1 and BRR2 registers according to UART1_BaudRate value */
  112. BaudRate_Mantissa = ((uint32_t)CLK_GetClockFreq() / (BaudRate << 4));
  113. BaudRate_Mantissa100 = (((uint32_t)CLK_GetClockFreq() * 100) / (BaudRate << 4));
  114. /* Set the fraction of UART1DIV */
  115. UART1->BRR2 |= (uint8_t)((uint8_t)(((BaudRate_Mantissa100 - (BaudRate_Mantissa * 100)) << 4) / 100) & (uint8_t)0x0F);
  116. /* Set the MSB mantissa of UART1DIV */
  117. UART1->BRR2 |= (uint8_t)((BaudRate_Mantissa >> 4) & (uint8_t)0xF0);
  118. /* Set the LSB mantissa of UART1DIV */
  119. UART1->BRR1 |= (uint8_t)BaudRate_Mantissa;
  120. /* Disable the Transmitter and Receiver before setting the LBCL, CPOL and CPHA bits */
  121. UART1->CR2 &= (uint8_t)~(UART1_CR2_TEN | UART1_CR2_REN);
  122. /* Clear the Clock Polarity, lock Phase, Last Bit Clock pulse */
  123. UART1->CR3 &= (uint8_t)~(UART1_CR3_CPOL | UART1_CR3_CPHA | UART1_CR3_LBCL);
  124. /* Set the Clock Polarity, lock Phase, Last Bit Clock pulse */
  125. UART1->CR3 |= (uint8_t)((uint8_t)SyncMode & (uint8_t)(UART1_CR3_CPOL |
  126. UART1_CR3_CPHA | UART1_CR3_LBCL));
  127. if ((uint8_t)(Mode & UART1_MODE_TX_ENABLE))
  128. {
  129. /* Set the Transmitter Enable bit */
  130. UART1->CR2 |= (uint8_t)UART1_CR2_TEN;
  131. }
  132. else
  133. {
  134. /* Clear the Transmitter Disable bit */
  135. UART1->CR2 &= (uint8_t)(~UART1_CR2_TEN);
  136. }
  137. if ((uint8_t)(Mode & UART1_MODE_RX_ENABLE))
  138. {
  139. /* Set the Receiver Enable bit */
  140. UART1->CR2 |= (uint8_t)UART1_CR2_REN;
  141. }
  142. else
  143. {
  144. /* Clear the Receiver Disable bit */
  145. UART1->CR2 &= (uint8_t)(~UART1_CR2_REN);
  146. }
  147. /* Set the Clock Enable bit, lock Polarity, lock Phase and Last Bit Clock
  148. pulse bits according to UART1_Mode value */
  149. if ((uint8_t)(SyncMode & UART1_SYNCMODE_CLOCK_DISABLE))
  150. {
  151. /* Clear the Clock Enable bit */
  152. UART1->CR3 &= (uint8_t)(~UART1_CR3_CKEN);
  153. }
  154. else
  155. {
  156. UART1->CR3 |= (uint8_t)((uint8_t)SyncMode & UART1_CR3_CKEN);
  157. }
  158. }
  159. /**
  160. * @brief Enable the UART1 peripheral.
  161. * @param NewState : The new state of the UART Communication.
  162. * This parameter can be any of the @ref FunctionalState enumeration.
  163. * @retval None
  164. */
  165. void UART1_Cmd(FunctionalState NewState)
  166. {
  167. if (NewState != DISABLE)
  168. {
  169. /* UART1 Enable */
  170. UART1->CR1 &= (uint8_t)(~UART1_CR1_UARTD);
  171. }
  172. else
  173. {
  174. /* UART Disable */
  175. UART1->CR1 |= UART1_CR1_UARTD;
  176. }
  177. }
  178. /**
  179. * @brief Enables or disables the specified USART interrupts.
  180. * @param UART1_IT specifies the USART interrupt sources to be enabled or disabled.
  181. * This parameter can be one of the following values:
  182. * - UART1_IT_TXE: Transmit Data Register empty interrupt
  183. * - UART1_IT_TC: Transmission complete interrupt
  184. * - UART1_IT_RXNE_OR: Receive Data register not empty and Overrun interrupt
  185. * - UART1_IT_IDLE: Idle line detection interrupt
  186. * - USRT1_IT_ERR: Error interrupt
  187. * @param NewState new state of the specified USART interrupts.
  188. * This parameter can be: ENABLE or DISABLE.
  189. * @retval None
  190. */
  191. void UART1_ITConfig(UART1_IT_TypeDef UART1_IT, FunctionalState NewState)
  192. {
  193. uint8_t uartreg = 0, itpos = 0x00;
  194. /* Check the parameters */
  195. assert_param(IS_UART1_CONFIG_IT_OK(UART1_IT));
  196. assert_param(IS_FUNCTIONALSTATE_OK(NewState));
  197. /* Get the UART1 register index */
  198. uartreg = (uint8_t)((uint16_t)UART1_IT >> 0x08);
  199. /* Get the UART1 IT index */
  200. itpos = (uint8_t)((uint8_t)1 << (uint8_t)((uint8_t)UART1_IT & (uint8_t)0x0F));
  201. if (NewState != DISABLE)
  202. {
  203. /**< Enable the Interrupt bits according to UART1_IT mask */
  204. if (uartreg == 0x01)
  205. {
  206. UART1->CR1 |= itpos;
  207. }
  208. else if (uartreg == 0x02)
  209. {
  210. UART1->CR2 |= itpos;
  211. }
  212. else
  213. {
  214. UART1->CR4 |= itpos;
  215. }
  216. }
  217. else
  218. {
  219. /**< Disable the interrupt bits according to UART1_IT mask */
  220. if (uartreg == 0x01)
  221. {
  222. UART1->CR1 &= (uint8_t)(~itpos);
  223. }
  224. else if (uartreg == 0x02)
  225. {
  226. UART1->CR2 &= (uint8_t)(~itpos);
  227. }
  228. else
  229. {
  230. UART1->CR4 &= (uint8_t)(~itpos);
  231. }
  232. }
  233. }
  234. /**
  235. * @brief Enables or disables the UART’s Half Duplex communication.
  236. * @param NewState new state of the UART Communication.
  237. * This parameter can be: ENABLE or DISABLE.
  238. * @retval None
  239. */
  240. void UART1_HalfDuplexCmd(FunctionalState NewState)
  241. {
  242. assert_param(IS_FUNCTIONALSTATE_OK(NewState));
  243. if (NewState != DISABLE)
  244. {
  245. UART1->CR5 |= UART1_CR5_HDSEL; /**< UART1 Half Duplex Enable */
  246. }
  247. else
  248. {
  249. UART1->CR5 &= (uint8_t)~UART1_CR5_HDSEL; /**< UART1 Half Duplex Disable */
  250. }
  251. }
  252. /**
  253. * @brief Configures the UART’s IrDA interface.
  254. * @param UART1_IrDAMode specifies the IrDA mode.
  255. * This parameter can be any of the @ref UART1_IrDAMode_TypeDef values.
  256. * @retval None
  257. */
  258. void UART1_IrDAConfig(UART1_IrDAMode_TypeDef UART1_IrDAMode)
  259. {
  260. assert_param(IS_UART1_IRDAMODE_OK(UART1_IrDAMode));
  261. if (UART1_IrDAMode != UART1_IRDAMODE_NORMAL)
  262. {
  263. UART1->CR5 |= UART1_CR5_IRLP;
  264. }
  265. else
  266. {
  267. UART1->CR5 &= ((uint8_t)~UART1_CR5_IRLP);
  268. }
  269. }
  270. /**
  271. * @brief Enables or disables the UART’s IrDA interface.
  272. * @param NewState new state of the IrDA mode.
  273. * This parameter can be: ENABLE or DISABLE.
  274. * @retval None
  275. */
  276. void UART1_IrDACmd(FunctionalState NewState)
  277. {
  278. /* Check parameters */
  279. assert_param(IS_FUNCTIONALSTATE_OK(NewState));
  280. if (NewState != DISABLE)
  281. {
  282. /* Enable the IrDA mode by setting the IREN bit in the CR3 register */
  283. UART1->CR5 |= UART1_CR5_IREN;
  284. }
  285. else
  286. {
  287. /* Disable the IrDA mode by clearing the IREN bit in the CR3 register */
  288. UART1->CR5 &= ((uint8_t)~UART1_CR5_IREN);
  289. }
  290. }
  291. /**
  292. * @brief Sets the UART1 LIN Break detection length.
  293. * @param UART1_LINBreakDetectionLength specifies the LIN break detection length.
  294. * This parameter can be any of the
  295. * @ref UART1_LINBreakDetectionLength_TypeDef values.
  296. * @retval None
  297. */
  298. void UART1_LINBreakDetectionConfig(UART1_LINBreakDetectionLength_TypeDef UART1_LINBreakDetectionLength)
  299. {
  300. assert_param(IS_UART1_LINBREAKDETECTIONLENGTH_OK(UART1_LINBreakDetectionLength));
  301. if (UART1_LINBreakDetectionLength != UART1_LINBREAKDETECTIONLENGTH_10BITS)
  302. {
  303. UART1->CR4 |= UART1_CR4_LBDL;
  304. }
  305. else
  306. {
  307. UART1->CR4 &= ((uint8_t)~UART1_CR4_LBDL);
  308. }
  309. }
  310. /**
  311. * @brief Enables or disables the UART1’s LIN mode.
  312. * @param NewState is new state of the UART1 LIN mode.
  313. * This parameter can be: ENABLE or DISABLE.
  314. * @retval None
  315. */
  316. void UART1_LINCmd(FunctionalState NewState)
  317. {
  318. assert_param(IS_FUNCTIONALSTATE_OK(NewState));
  319. if (NewState != DISABLE)
  320. {
  321. /* Enable the LIN mode by setting the LINE bit in the CR2 register */
  322. UART1->CR3 |= UART1_CR3_LINEN;
  323. }
  324. else
  325. {
  326. /* Disable the LIN mode by clearing the LINE bit in the CR2 register */
  327. UART1->CR3 &= ((uint8_t)~UART1_CR3_LINEN);
  328. }
  329. }
  330. /**
  331. * @brief Enables or disables the UART1 Smart Card mode.
  332. * @param NewState: new state of the Smart Card mode.
  333. * This parameter can be: ENABLE or DISABLE.
  334. * @retval None
  335. */
  336. void UART1_SmartCardCmd(FunctionalState NewState)
  337. {
  338. assert_param(IS_FUNCTIONALSTATE_OK(NewState));
  339. if (NewState != DISABLE)
  340. {
  341. /* Enable the SC mode by setting the SCEN bit in the CR5 register */
  342. UART1->CR5 |= UART1_CR5_SCEN;
  343. }
  344. else
  345. {
  346. /* Disable the SC mode by clearing the SCEN bit in the CR5 register */
  347. UART1->CR5 &= ((uint8_t)(~UART1_CR5_SCEN));
  348. }
  349. }
  350. /**
  351. * @brief Enables or disables NACK transmission.
  352. * @note This function is valid only for UART1 because is related to SmartCard mode.
  353. * @param NewState: new state of the Smart Card mode.
  354. * This parameter can be: ENABLE or DISABLE.
  355. * @retval None
  356. */
  357. void UART1_SmartCardNACKCmd(FunctionalState NewState)
  358. {
  359. assert_param(IS_FUNCTIONALSTATE_OK(NewState));
  360. if (NewState != DISABLE)
  361. {
  362. /* Enable the NACK transmission by setting the NACK bit in the CR5 register */
  363. UART1->CR5 |= UART1_CR5_NACK;
  364. }
  365. else
  366. {
  367. /* Disable the NACK transmission by clearing the NACK bit in the CR5 register */
  368. UART1->CR5 &= ((uint8_t)~(UART1_CR5_NACK));
  369. }
  370. }
  371. /**
  372. * @brief Selects the UART1 WakeUp method.
  373. * @param UART1_WakeUp: specifies the UART1 wakeup method.
  374. * This parameter can be any of the @ref UART1_WakeUp_TypeDef values.
  375. * @retval None
  376. */
  377. void UART1_WakeUpConfig(UART1_WakeUp_TypeDef UART1_WakeUp)
  378. {
  379. assert_param(IS_UART1_WAKEUP_OK(UART1_WakeUp));
  380. UART1->CR1 &= ((uint8_t)~UART1_CR1_WAKE);
  381. UART1->CR1 |= (uint8_t)UART1_WakeUp;
  382. }
  383. /**
  384. * @brief Determines if the UART1 is in mute mode or not.
  385. * @param NewState: new state of the UART1 mode.
  386. * This parameter can be: ENABLE or DISABLE.
  387. * @retval None
  388. */
  389. void UART1_ReceiverWakeUpCmd(FunctionalState NewState)
  390. {
  391. assert_param(IS_FUNCTIONALSTATE_OK(NewState));
  392. if (NewState != DISABLE)
  393. {
  394. /* Enable the mute mode UART1 by setting the RWU bit in the CR2 register */
  395. UART1->CR2 |= UART1_CR2_RWU;
  396. }
  397. else
  398. {
  399. /* Disable the mute mode UART1 by clearing the RWU bit in the CR1 register */
  400. UART1->CR2 &= ((uint8_t)~UART1_CR2_RWU);
  401. }
  402. }
  403. /**
  404. * @brief Returns the most recent received data by the UART1 peripheral.
  405. * @param None
  406. * @retval The received data.
  407. */
  408. uint8_t UART1_ReceiveData8(void)
  409. {
  410. return ((uint8_t)UART1->DR);
  411. }
  412. /**
  413. * @brief Returns the most recent received data by the UART1 peripheral.
  414. * @param None
  415. * @retval The received data.
  416. */
  417. uint16_t UART1_ReceiveData9(void)
  418. {
  419. uint16_t temp = 0;
  420. temp = (uint16_t)(((uint16_t)( (uint16_t)UART1->CR1 & (uint16_t)UART1_CR1_R8)) << 1);
  421. return (uint16_t)( (((uint16_t) UART1->DR) | temp ) & ((uint16_t)0x01FF));
  422. }
  423. /**
  424. * @brief Transmits 8 bit data through the UART1 peripheral.
  425. * @param Data: The data to transmit.
  426. * @retval None
  427. */
  428. void UART1_SendData8(uint8_t Data)
  429. {
  430. /* Transmit Data */
  431. UART1->DR = Data;
  432. }
  433. /**
  434. * @brief Transmits 9 bit data through the UART peripheral.
  435. * @param Data : The data to transmit.
  436. * This parameter should be lower than 0x1FF.
  437. * @retval None
  438. */
  439. void UART1_SendData9(uint16_t Data)
  440. {
  441. /**< Clear the transmit data bit 8 [8] */
  442. UART1->CR1 &= ((uint8_t)~UART1_CR1_T8);
  443. /**< Write the transmit data bit [8] */
  444. UART1->CR1 |= (uint8_t)(((uint8_t)(Data >> 2)) & UART1_CR1_T8);
  445. /**< Write the transmit data bit [0:7] */
  446. UART1->DR = (uint8_t)(Data);
  447. }
  448. /**
  449. * @brief Transmits break characters.
  450. * @param None
  451. * @retval None
  452. */
  453. void UART1_SendBreak(void)
  454. {
  455. UART1->CR2 |= UART1_CR2_SBK;
  456. }
  457. /**
  458. * @brief Sets the address of the UART1 node.
  459. * @param UART1_Address: Indicates the address of the UART1 node.
  460. * @retval None
  461. */
  462. void UART1_SetAddress(uint8_t UART1_Address)
  463. {
  464. /*assert_param for UART1_Address*/
  465. assert_param(IS_UART1_ADDRESS_OK(UART1_Address));
  466. /* Clear the UART1 address */
  467. UART1->CR4 &= ((uint8_t)~UART1_CR4_ADD);
  468. /* Set the UART1 address node */
  469. UART1->CR4 |= UART1_Address;
  470. }
  471. /**
  472. * @brief Sets the specified UART guard time.
  473. * @note SmartCard Mode should be Enabled
  474. * @param UART1_GuardTime: specifies the guard time.
  475. * @retval None
  476. */
  477. void UART1_SetGuardTime(uint8_t UART1_GuardTime)
  478. {
  479. /* Set the UART1 guard time */
  480. UART1->GTR = UART1_GuardTime;
  481. }
  482. /**
  483. * @brief Sets the system clock prescaler.
  484. * @note IrDA Low Power mode or smartcard mode should be enabled
  485. * @note This function is related to SmartCard and IrDa mode.
  486. * @param UART1_Prescaler: specifies the prescaler clock.
  487. * This parameter can be one of the following values:
  488. * @par IrDA Low Power Mode
  489. * The clock source is divided by the value given in the register (8 bits)
  490. * - 0000 0000 Reserved
  491. * - 0000 0001 divides the clock source by 1
  492. * - 0000 0010 divides the clock source by 2
  493. * - ...
  494. * @par Smart Card Mode
  495. * The clock source is divided by the value given in the register
  496. * (5 significant bits) multiplied by 2
  497. * - 0 0000 Reserved
  498. * - 0 0001 divides the clock source by 2
  499. * - 0 0010 divides the clock source by 4
  500. * - 0 0011 divides the clock source by 6
  501. * - ...
  502. * @retval None
  503. */
  504. void UART1_SetPrescaler(uint8_t UART1_Prescaler)
  505. {
  506. /* Load the UART1 prescaler value*/
  507. UART1->PSCR = UART1_Prescaler;
  508. }
  509. /**
  510. * @brief Checks whether the specified UART1 flag is set or not.
  511. * @param UART1_FLAG specifies the flag to check.
  512. * This parameter can be any of the @ref UART1_Flag_TypeDef enumeration.
  513. * @retval FlagStatus (SET or RESET)
  514. */
  515. FlagStatus UART1_GetFlagStatus(UART1_Flag_TypeDef UART1_FLAG)
  516. {
  517. FlagStatus status = RESET;
  518. /* Check parameters */
  519. assert_param(IS_UART1_FLAG_OK(UART1_FLAG));
  520. /* Check the status of the specified UART1 flag*/
  521. if (UART1_FLAG == UART1_FLAG_LBDF)
  522. {
  523. if ((UART1->CR4 & (uint8_t)UART1_FLAG) != (uint8_t)0x00)
  524. {
  525. /* UART1_FLAG is set*/
  526. status = SET;
  527. }
  528. else
  529. {
  530. /* UART1_FLAG is reset*/
  531. status = RESET;
  532. }
  533. }
  534. else if (UART1_FLAG == UART1_FLAG_SBK)
  535. {
  536. if ((UART1->CR2 & (uint8_t)UART1_FLAG) != (uint8_t)0x00)
  537. {
  538. /* UART1_FLAG is set*/
  539. status = SET;
  540. }
  541. else
  542. {
  543. /* UART1_FLAG is reset*/
  544. status = RESET;
  545. }
  546. }
  547. else
  548. {
  549. if ((UART1->SR & (uint8_t)UART1_FLAG) != (uint8_t)0x00)
  550. {
  551. /* UART1_FLAG is set*/
  552. status = SET;
  553. }
  554. else
  555. {
  556. /* UART1_FLAG is reset*/
  557. status = RESET;
  558. }
  559. }
  560. /* Return the UART1_FLAG status*/
  561. return status;
  562. }
  563. /**
  564. * @brief Clears the UART1 flags.
  565. * @param UART1_FLAG specifies the flag to clear
  566. * This parameter can be any combination of the following values:
  567. * - UART1_FLAG_LBDF: LIN Break detection flag.
  568. * - UART1_FLAG_RXNE: Receive data register not empty flag.
  569. * @note
  570. * - PE (Parity error), FE (Framing error), NE (Noise error),
  571. * OR (OverRun error) and IDLE (Idle line detected) flags are
  572. * cleared by software sequence: a read operation to UART1_SR register
  573. * (UART1_GetFlagStatus())followed by a read operation to UART1_DR
  574. * register(UART1_ReceiveData8() or UART1_ReceiveData9()).
  575. *
  576. * - RXNE flag can be also cleared by a read to the UART1_DR register
  577. * (UART1_ReceiveData8()or UART1_ReceiveData9()).
  578. *
  579. * - TC flag can be also cleared by software sequence: a read operation
  580. * to UART1_SR register (UART1_GetFlagStatus()) followed by a write
  581. * operation to UART1_DR register (UART1_SendData8() or UART1_SendData9()).
  582. *
  583. * - TXE flag is cleared only by a write to the UART1_DR register
  584. * (UART1_SendData8() or UART1_SendData9()).
  585. *
  586. * - SBK flag is cleared during the stop bit of break.
  587. * @retval None
  588. */
  589. void UART1_ClearFlag(UART1_Flag_TypeDef UART1_FLAG)
  590. {
  591. assert_param(IS_UART1_CLEAR_FLAG_OK(UART1_FLAG));
  592. /* Clear the Receive Register Not Empty flag */
  593. if (UART1_FLAG == UART1_FLAG_RXNE)
  594. {
  595. UART1->SR = (uint8_t)~(UART1_SR_RXNE);
  596. }
  597. /* Clear the LIN Break Detection flag */
  598. else
  599. {
  600. UART1->CR4 &= (uint8_t)~(UART1_CR4_LBDF);
  601. }
  602. }
  603. /**
  604. * @brief Checks whether the specified UART1 interrupt has occurred or not.
  605. * @param UART1_IT: Specifies the UART1 interrupt pending bit to check.
  606. * This parameter can be one of the following values:
  607. * - UART1_IT_LBDF: LIN Break detection interrupt
  608. * - UART1_IT_TXE: Transmit Data Register empty interrupt
  609. * - UART1_IT_TC: Transmission complete interrupt
  610. * - UART1_IT_RXNE: Receive Data register not empty interrupt
  611. * - UART1_IT_IDLE: Idle line detection interrupt
  612. * - UART1_IT_OR: OverRun Error interrupt
  613. * - UART1_IT_PE: Parity Error interrupt
  614. * @retval The new state of UART1_IT (SET or RESET).
  615. */
  616. ITStatus UART1_GetITStatus(UART1_IT_TypeDef UART1_IT)
  617. {
  618. ITStatus pendingbitstatus = RESET;
  619. uint8_t itpos = 0;
  620. uint8_t itmask1 = 0;
  621. uint8_t itmask2 = 0;
  622. uint8_t enablestatus = 0;
  623. /* Check parameters */
  624. assert_param(IS_UART1_GET_IT_OK(UART1_IT));
  625. /* Get the UART1 IT index */
  626. itpos = (uint8_t)((uint8_t)1 << (uint8_t)((uint8_t)UART1_IT & (uint8_t)0x0F));
  627. /* Get the UART1 IT index */
  628. itmask1 = (uint8_t)((uint8_t)UART1_IT >> (uint8_t)4);
  629. /* Set the IT mask*/
  630. itmask2 = (uint8_t)((uint8_t)1 << itmask1);
  631. /* Check the status of the specified UART1 pending bit*/
  632. if (UART1_IT == UART1_IT_PE)
  633. {
  634. /* Get the UART1_IT enable bit status*/
  635. enablestatus = (uint8_t)((uint8_t)UART1->CR1 & itmask2);
  636. /* Check the status of the specified UART1 interrupt*/
  637. if (((UART1->SR & itpos) != (uint8_t)0x00) && enablestatus)
  638. {
  639. /* Interrupt occurred*/
  640. pendingbitstatus = SET;
  641. }
  642. else
  643. {
  644. /* Interrupt not occurred*/
  645. pendingbitstatus = RESET;
  646. }
  647. }
  648. else if (UART1_IT == UART1_IT_LBDF)
  649. {
  650. /* Get the UART1_IT enable bit status*/
  651. enablestatus = (uint8_t)((uint8_t)UART1->CR4 & itmask2);
  652. /* Check the status of the specified UART1 interrupt*/
  653. if (((UART1->CR4 & itpos) != (uint8_t)0x00) && enablestatus)
  654. {
  655. /* Interrupt occurred*/
  656. pendingbitstatus = SET;
  657. }
  658. else
  659. {
  660. /* Interrupt not occurred*/
  661. pendingbitstatus = RESET;
  662. }
  663. }
  664. else
  665. {
  666. /* Get the UART1_IT enable bit status*/
  667. enablestatus = (uint8_t)((uint8_t)UART1->CR2 & itmask2);
  668. /* Check the status of the specified UART1 interrupt*/
  669. if (((UART1->SR & itpos) != (uint8_t)0x00) && enablestatus)
  670. {
  671. /* Interrupt occurred*/
  672. pendingbitstatus = SET;
  673. }
  674. else
  675. {
  676. /* Interrupt not occurred*/
  677. pendingbitstatus = RESET;
  678. }
  679. }
  680. /* Return the UART1_IT status*/
  681. return pendingbitstatus;
  682. }
  683. /**
  684. * @brief Clears the UART1 pending flags.
  685. * @param UART1_IT specifies the pending bit to clear
  686. * This parameter can be one of the following values:
  687. * - UART1_IT_LBDF: LIN Break detection interrupt
  688. * - UART1_IT_RXNE: Receive Data register not empty interrupt.
  689. * @note
  690. * - PE (Parity error), FE (Framing error), NE (Noise error),
  691. * OR (OverRun error) and IDLE (Idle line detected) pending bits are
  692. * cleared by software sequence: a read operation to UART1_SR register
  693. * (UART1_GetITStatus()) followed by a read operation to UART1_DR register
  694. * (UART1_ReceiveData8() or UART1_ReceiveData9()).
  695. *
  696. * - RXNE pending bit can be also cleared by a read to the UART1_DR register
  697. * (UART1_ReceiveData8() or UART1_ReceiveData9()).
  698. *
  699. * - TC (Transmit complete) pending bit can be cleared by software
  700. * sequence: a read operation to UART1_SR register (UART1_GetITStatus())
  701. * followed by a write operation to UART1_DR register (UART1_SendData8()
  702. * or UART1_SendData9()).
  703. *
  704. * - TXE pending bit is cleared only by a write to the UART1_DR register
  705. * (UART1_SendData8() or UART1_SendData9()).
  706. * @retval None
  707. */
  708. void UART1_ClearITPendingBit(UART1_IT_TypeDef UART1_IT)
  709. {
  710. assert_param(IS_UART1_CLEAR_IT_OK(UART1_IT));
  711. /* Clear the Receive Register Not Empty pending bit */
  712. if (UART1_IT == UART1_IT_RXNE)
  713. {
  714. UART1->SR = (uint8_t)~(UART1_SR_RXNE);
  715. }
  716. /* Clear the LIN Break Detection pending bit */
  717. else
  718. {
  719. UART1->CR4 &= (uint8_t)~(UART1_CR4_LBDF);
  720. }
  721. }
  722. /**
  723. * @}
  724. */
  725. /**
  726. * @}
  727. */
  728. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/